SG73389A1 - Method of connecting tab tape to semiconductor chip and bump sheet and bumped tape used in the method - Google Patents

Method of connecting tab tape to semiconductor chip and bump sheet and bumped tape used in the method

Info

Publication number
SG73389A1
SG73389A1 SG1996005005A SG1996005005A SG73389A1 SG 73389 A1 SG73389 A1 SG 73389A1 SG 1996005005 A SG1996005005 A SG 1996005005A SG 1996005005 A SG1996005005 A SG 1996005005A SG 73389 A1 SG73389 A1 SG 73389A1
Authority
SG
Singapore
Prior art keywords
semiconductor chip
tape
tab tape
bumped
connecting tab
Prior art date
Application number
SG1996005005A
Other languages
English (en)
Inventor
Yasuhide Ohno
Tadakatsu Maruyama
Hiroaki Otsuka
Hiroyuki Tanahashi
Original Assignee
Nippon Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP1234915A external-priority patent/JP2780375B2/ja
Priority claimed from JP1234916A external-priority patent/JP2780376B2/ja
Application filed by Nippon Steel Corp filed Critical Nippon Steel Corp
Publication of SG73389A1 publication Critical patent/SG73389A1/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/0711Apparatus therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/453Leadframes comprising flexible metallic tapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/077Connecting of TAB connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/701Tape-automated bond [TAB] connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/012Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/012Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01221Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition
    • H10W72/01225Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition in solid form, e.g. by using a powder or by stud bumping
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251Materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49121Beam lead frame or beam lead device

Landscapes

  • Wire Bonding (AREA)
SG1996005005A 1989-09-11 1990-09-07 Method of connecting tab tape to semiconductor chip and bump sheet and bumped tape used in the method SG73389A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP23491789 1989-09-11
JP1234915A JP2780375B2 (ja) 1989-09-11 1989-09-11 Tabテープと半導体チップを接続する方法およびそれに用いるバンプシート
JP1234916A JP2780376B2 (ja) 1989-09-11 1989-09-11 バンプ付きtabテープの製造方法

Publications (1)

Publication Number Publication Date
SG73389A1 true SG73389A1 (en) 2000-06-20

Family

ID=27332202

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1996005005A SG73389A1 (en) 1989-09-11 1990-09-07 Method of connecting tab tape to semiconductor chip and bump sheet and bumped tape used in the method

Country Status (6)

Country Link
US (1) US5164336A (fr)
EP (3) EP0527387B1 (fr)
KR (1) KR940004246B1 (fr)
DE (2) DE69033078T2 (fr)
MY (1) MY106847A (fr)
SG (1) SG73389A1 (fr)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5209390A (en) * 1989-07-03 1993-05-11 General Electric Company Hermetic package and packaged semiconductor chip having closely spaced leads extending through the package lid
US5519332A (en) * 1991-06-04 1996-05-21 Micron Technology, Inc. Carrier for testing an unpackaged semiconductor die
JP2715810B2 (ja) * 1991-07-25 1998-02-18 日本電気株式会社 フィルムキャリア半導体装置とその製造方法
JP2558976B2 (ja) * 1991-11-08 1996-11-27 松下電器産業株式会社 電子部品の電極とリードとの接合方法
US5728599A (en) * 1993-10-28 1998-03-17 Lsi Logic Corporation Printable superconductive leadframes for semiconductor device assembly
US5367435A (en) * 1993-11-16 1994-11-22 International Business Machines Corporation Electronic package structure and method of making same
CA2135241C (fr) * 1993-12-17 1998-08-04 Mohi Sobhani Structure d'interconnexion a cavites et a bosses pour modules electroniques
JPH07221105A (ja) * 1994-01-31 1995-08-18 Fujitsu Ltd 半導体装置の製造方法及び半導体装置
JP2833996B2 (ja) * 1994-05-25 1998-12-09 日本電気株式会社 フレキシブルフィルム及びこれを有する半導体装置
FR2728392A1 (fr) * 1994-12-16 1996-06-21 Bull Sa Procede et support de connexion d'un circuit integre a un autre support par l'intermediaire de boules
US5899376A (en) * 1995-07-11 1999-05-04 Nippon Steel Corporation Transfer of flux onto electrodes and production of bumps on electrodes
US6008071A (en) * 1995-09-20 1999-12-28 Fujitsu Limited Method of forming solder bumps onto an integrated circuit device
US5687901A (en) * 1995-11-14 1997-11-18 Nippon Steel Corporation Process and apparatus for forming ball bumps
FR2748849B1 (fr) * 1996-05-20 1998-06-19 Commissariat Energie Atomique Systeme de composants a hybrider et procede d'hybridation autorisant des dilatations thermiques
TW344092B (en) * 1996-08-27 1998-11-01 Nippon Steel Corp Semiconductor device provided with low melting point metal bumps and process for producing same
JPH10163211A (ja) * 1996-12-02 1998-06-19 Fujitsu Ltd バンプ形成用板部材の製造方法及びバンプ形成方法
US5839191A (en) * 1997-01-24 1998-11-24 Unisys Corporation Vibrating template method of placing solder balls on the I/O pads of an integrated circuit package
US7135397B2 (en) * 2003-09-10 2006-11-14 Texas Instruments Incorporated Method and system for packaging ball grid arrays
US7404513B2 (en) * 2004-12-30 2008-07-29 Texas Instruments Incorporated Wire bonds having pressure-absorbing balls
JP2009099905A (ja) * 2007-10-19 2009-05-07 Rohm Co Ltd 半導体装置
WO2013153745A1 (fr) * 2012-04-10 2013-10-17 パナソニック株式会社 Procédé de liaison d'électrodes, procédé de fabrication d'ensemble d'électrodes et système de fabrication d'ensemble d'électrodes

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5718347A (en) * 1980-07-08 1982-01-30 Citizen Watch Co Ltd Mounting structure of ic
EP0117348B1 (fr) * 1982-12-06 1987-03-11 The Welding Institute Procédé pour souder des fils aux composants semi-conducteurs
JPS59202643A (ja) * 1983-04-30 1984-11-16 Sharp Corp Lsi接続方法
JPS6052045A (ja) * 1983-08-31 1985-03-23 Matsushita Electric Ind Co Ltd バンプ電極形成方法
JPS6149432A (ja) * 1984-08-18 1986-03-11 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
DE3685647T2 (de) * 1985-07-16 1993-01-07 Nippon Telegraph & Telephone Verbindungskontakte zwischen substraten und verfahren zur herstellung derselben.
US4814855A (en) * 1986-04-29 1989-03-21 International Business Machines Corporation Balltape structure for tape automated bonding, multilayer packaging, universal chip interconnection and energy beam processes for manufacturing balltape
EP0260490A1 (fr) * 1986-08-27 1988-03-23 Kabushiki Kaisha Toshiba Couche de liaison pour un composant électronique, et méthode pour lier ledit composant utilisant cette couche
JP2532464B2 (ja) * 1987-05-20 1996-09-11 松下電器産業株式会社 バンプの転写方法
JPS63291427A (ja) * 1987-05-23 1988-11-29 Matsushita Electric Works Ltd バンプ付フィンガ−リ−ド担持体の製法
JPH0795554B2 (ja) * 1987-09-14 1995-10-11 株式会社日立製作所 はんだ球整列装置
JPH01243554A (ja) * 1988-03-25 1989-09-28 Hitachi Ltd 半導体装置の製造方法
US5006917A (en) * 1989-08-25 1991-04-09 International Business Machines Corporation Thermocompression bonding in integrated circuit packaging

Also Published As

Publication number Publication date
DE69027448D1 (de) 1996-07-18
EP0911873A3 (fr) 1999-12-15
EP0911873A2 (fr) 1999-04-28
KR940004246B1 (ko) 1994-05-19
US5164336A (en) 1992-11-17
MY106847A (en) 1995-08-30
EP0427384A2 (fr) 1991-05-15
DE69033078T2 (de) 1999-12-23
EP0427384B1 (fr) 1999-04-28
DE69027448T2 (de) 1996-10-10
KR910007096A (ko) 1991-04-30
DE69033078D1 (de) 1999-06-02
EP0527387A1 (fr) 1993-02-17
EP0527387B1 (fr) 1996-06-12
EP0427384A3 (en) 1992-01-02

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