SG86333A1 - Static ram circuit for deffect analysis - Google Patents

Static ram circuit for deffect analysis

Info

Publication number
SG86333A1
SG86333A1 SG9802899A SG1998002899A SG86333A1 SG 86333 A1 SG86333 A1 SG 86333A1 SG 9802899 A SG9802899 A SG 9802899A SG 1998002899 A SG1998002899 A SG 1998002899A SG 86333 A1 SG86333 A1 SG 86333A1
Authority
SG
Singapore
Prior art keywords
analysis
deffect
static ram
ram circuit
contact pads
Prior art date
Application number
SG9802899A
Other languages
English (en)
Inventor
Wang Jonathan
W Vook Dietrich
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Publication of SG86333A1 publication Critical patent/SG86333A1/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2252—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using fault dictionaries

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Static Random-Access Memory (AREA)
SG9802899A 1998-04-30 1998-08-03 Static ram circuit for deffect analysis SG86333A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/070,820 US6081465A (en) 1998-04-30 1998-04-30 Static RAM circuit for defect analysis

Publications (1)

Publication Number Publication Date
SG86333A1 true SG86333A1 (en) 2002-02-19

Family

ID=22097577

Family Applications (1)

Application Number Title Priority Date Filing Date
SG9802899A SG86333A1 (en) 1998-04-30 1998-08-03 Static ram circuit for deffect analysis

Country Status (4)

Country Link
US (1) US6081465A (fr)
EP (1) EP0953989A3 (fr)
JP (1) JP2000030498A (fr)
SG (1) SG86333A1 (fr)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000322900A (ja) * 1999-05-12 2000-11-24 Mitsubishi Electric Corp 半導体記録装置
US6785413B1 (en) * 1999-08-24 2004-08-31 International Business Machines Corporation Rapid defect analysis by placement of tester fail data
JP2001167598A (ja) * 1999-12-03 2001-06-22 Mitsubishi Electric Corp 半導体装置
JP2001291385A (ja) * 2000-04-05 2001-10-19 Nec Corp 半導体記憶装置並びにその試験装置および試験方法
WO2002037130A2 (fr) * 2000-11-06 2002-05-10 Koninklijke Philips Electronics N.V. Procede d'essai de circuits integres
JP2002184198A (ja) * 2000-12-14 2002-06-28 Hitachi Ltd 半導体集積回路装置
EP1286358A1 (fr) * 2001-06-22 2003-02-26 STMicroelectronics Limited Procédé de test de bit faible
DE10211037A1 (de) * 2002-03-13 2003-06-26 Infineon Technologies Ag Anordnung von Speicherzellen und einer Teststruktur
KR100505430B1 (ko) * 2003-11-21 2005-08-04 주식회사 하이닉스반도체 에스램의 불량분석 방법
JP2006078289A (ja) * 2004-09-08 2006-03-23 Fujitsu Ltd 半導体記憶装置及びその試験方法
GB0426005D0 (en) * 2004-11-26 2004-12-29 Koninkl Philips Electronics Nv Sram test method and sram test arrangement
US7495979B2 (en) * 2005-03-25 2009-02-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method and system for in-situ parametric SRAM diagnosis
KR100691007B1 (ko) * 2005-05-11 2007-03-09 주식회사 하이닉스반도체 메모리 장치의 테스트 방법
JP2007157287A (ja) 2005-12-07 2007-06-21 Matsushita Electric Ind Co Ltd 半導体記憶装置
US20070280526A1 (en) * 2006-05-30 2007-12-06 Irfan Malik Determining Information about Defects or Binning Defects Detected on a Wafer after an Immersion Lithography Process is Performed on the Wafer
US7673195B2 (en) * 2007-10-03 2010-03-02 International Business Machines Corporation Circuits and methods for characterizing device variation in electronic memory circuits
US8437213B2 (en) * 2008-01-03 2013-05-07 Texas Instruments Incorporated Characterization of bits in a functional memory
US7724585B2 (en) * 2008-08-20 2010-05-25 International Business Machines Corporation Implementing local evaluation of domino read SRAM with enhanced SRAM cell stability
US7724586B2 (en) * 2008-08-20 2010-05-25 International Business Machines Corporation Implementing local evaluation of domino read SRAM with enhanced SRAM cell stability with minimized area usage
JP5487770B2 (ja) * 2009-07-21 2014-05-07 ソニー株式会社 固体撮像装置
US8399935B2 (en) * 2009-09-18 2013-03-19 Taiwan Semiconductor Manufacturing Company, Ltd. Embedded SRAM memory for low power applications
US9472268B2 (en) * 2010-07-16 2016-10-18 Texas Instruments Incorporated SRAM with buffered-read bit cells and its testing
US8976574B2 (en) * 2013-03-13 2015-03-10 Qualcomm Incorporated Process corner sensor for bit-cells
US9281027B1 (en) * 2014-10-10 2016-03-08 Arm Limited Test techniques in memory devices

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5428574A (en) * 1988-12-05 1995-06-27 Motorola, Inc. Static RAM with test features
US5745420A (en) * 1995-07-31 1998-04-28 Sgs-Thomson Microelectronics, Inc. Integrated memory circuit with sequenced bitlines for stress test

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5034923A (en) * 1987-09-10 1991-07-23 Motorola, Inc. Static RAM with soft defect detection
US4835458A (en) * 1987-11-09 1989-05-30 Intel Corporation Signature analysis technique for defect characterization of CMOS static RAM cell failures
JPH05166396A (ja) * 1991-12-12 1993-07-02 Mitsubishi Electric Corp 半導体メモリ装置
US5255230A (en) * 1991-12-31 1993-10-19 Intel Corporation Method and apparatus for testing the continuity of static random access memory cells
JP3001734B2 (ja) * 1992-11-30 2000-01-24 川崎製鉄株式会社 高抵抗負荷型ｓｒａｍ集積回路
KR940016288A (ko) * 1992-12-25 1994-07-22 오가 노리오 반도체메모리 및 그 선별방법
US5469076A (en) * 1993-10-20 1995-11-21 Hewlett-Packard Corporation Static current testing apparatus and method for current steering logic (CSL)
JP3226422B2 (ja) * 1994-08-01 2001-11-05 株式会社日立製作所 半導体記憶装置及びメモリセルのｄｃ電流不良検出方法
US5526314A (en) * 1994-12-09 1996-06-11 International Business Machines Corporation Two mode sense amplifier with latch
JP3565647B2 (ja) * 1996-02-02 2004-09-15 株式会社ルネサステクノロジ 半導体記憶装置
US5920517A (en) * 1996-09-30 1999-07-06 Advanced Micro Devices, Inc. Memory array test and characterization using isolated memory cell power supply

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5428574A (en) * 1988-12-05 1995-06-27 Motorola, Inc. Static RAM with test features
US5745420A (en) * 1995-07-31 1998-04-28 Sgs-Thomson Microelectronics, Inc. Integrated memory circuit with sequenced bitlines for stress test

Also Published As

Publication number Publication date
EP0953989A2 (fr) 1999-11-03
US6081465A (en) 2000-06-27
JP2000030498A (ja) 2000-01-28
EP0953989A3 (fr) 2001-11-14

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