TW201801253A - 半導體裝置及其製造方法 - Google Patents

半導體裝置及其製造方法 Download PDF

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Publication number
TW201801253A
TW201801253A TW105136178A TW105136178A TW201801253A TW 201801253 A TW201801253 A TW 201801253A TW 105136178 A TW105136178 A TW 105136178A TW 105136178 A TW105136178 A TW 105136178A TW 201801253 A TW201801253 A TW 201801253A
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Taiwan
Prior art keywords
gate electrode
film
insulating film
silicon nitride
semiconductor substrate
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TW105136178A
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English (en)
Chinese (zh)
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篠原正昭
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瑞薩電子股份有限公司
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    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
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    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
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    • G11C16/10—Programming or data input circuits
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    • G—PHYSICS
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    • H10D30/694—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/696—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes having at least one additional gate, e.g. program gate, erase gate or select gate
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    • H10D84/85—Complementary IGFETs, e.g. CMOS
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
TW105136178A 2016-02-03 2016-11-08 半導體裝置及其製造方法 TW201801253A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016018589A JP6683488B2 (ja) 2016-02-03 2016-02-03 半導体装置およびその製造方法
JP2016-018589 2016-02-03

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TW201801253A true TW201801253A (zh) 2018-01-01

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US (2) US9837427B2 (2)
JP (1) JP6683488B2 (2)
KR (1) KR20170092465A (2)
CN (1) CN107039454B (2)
TW (1) TW201801253A (2)

Families Citing this family (9)

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Publication number Priority date Publication date Assignee Title
JP6518485B2 (ja) 2015-03-30 2019-05-22 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP6917737B2 (ja) * 2017-03-13 2021-08-11 ユナイテッド・セミコンダクター・ジャパン株式会社 半導体装置の製造方法
US10297602B2 (en) * 2017-05-18 2019-05-21 Taiwan Semiconductor Manufacturing Company, Ltd. Implantations for forming source/drain regions of different transistors
US10872898B2 (en) * 2017-07-19 2020-12-22 Cypress Semiconductor Corporation Embedded non-volatile memory device and fabrication method of the same
KR102369509B1 (ko) * 2018-01-08 2022-03-02 삼성전자주식회사 반도체 장치 및 그 제조 방법
KR102542415B1 (ko) * 2019-04-16 2023-06-09 삼성전자주식회사 반도체 장치 및 그 제조 방법
JP2021027096A (ja) * 2019-08-01 2021-02-22 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
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