TW344143B - Method for manufacturing a semiconductor device - Google Patents

Method for manufacturing a semiconductor device

Info

Publication number
TW344143B
TW344143B TW086107229A TW86107229A TW344143B TW 344143 B TW344143 B TW 344143B TW 086107229 A TW086107229 A TW 086107229A TW 86107229 A TW86107229 A TW 86107229A TW 344143 B TW344143 B TW 344143B
Authority
TW
Taiwan
Prior art keywords
film
polysilicon film
convex portion
polysilicon
diffusing region
Prior art date
Application number
TW086107229A
Other languages
English (en)
Inventor
Masahiro Ono
Toshio Matsuda
Syoji Sakamura
Original Assignee
Sanyo Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co filed Critical Sanyo Electric Co
Application granted granted Critical
Publication of TW344143B publication Critical patent/TW344143B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
TW086107229A 1996-05-31 1997-05-28 Method for manufacturing a semiconductor device TW344143B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP13920796 1996-05-31
JP06504297A JP3253552B2 (ja) 1996-05-31 1997-03-18 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
TW344143B true TW344143B (en) 1998-11-01

Family

ID=26406186

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086107229A TW344143B (en) 1996-05-31 1997-05-28 Method for manufacturing a semiconductor device

Country Status (4)

Country Link
US (2) US5792695A (zh)
JP (1) JP3253552B2 (zh)
KR (1) KR100232984B1 (zh)
TW (1) TW344143B (zh)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW461052B (en) * 1998-06-18 2001-10-21 United Microelectronics Corp Manufacturing method of flash memory cell
KR100316709B1 (ko) * 1998-07-13 2001-12-12 윤종용 불휘발성 메모리 장치 제조 방법
US6284596B1 (en) * 1998-12-17 2001-09-04 Taiwan Semiconductor Manufacturing Company Method of forming split-gate flash cell for salicide and self-align contact
US6538925B2 (en) * 2000-11-09 2003-03-25 Innotech Corporation Semiconductor memory device, method of manufacturing the same and method of driving the same
JP2002198500A (ja) * 2000-12-27 2002-07-12 Mitsubishi Electric Corp 半導体集積回路装置およびその製造方法
US6821847B2 (en) * 2001-10-02 2004-11-23 Mosel Vitelic, Inc. Nonvolatile memory structures and fabrication methods
US6620635B2 (en) * 2002-02-20 2003-09-16 International Business Machines Corporation Damascene resistor and method for measuring the width of same
KR100467018B1 (ko) * 2002-06-27 2005-01-24 삼성전자주식회사 콘텍홀을 갖는 반도체 소자의 형성방법
KR100460066B1 (ko) * 2002-07-19 2004-12-04 주식회사 하이닉스반도체 반도체소자의 제조방법
US6803315B2 (en) * 2002-08-05 2004-10-12 International Business Machines Corporation Method for blocking implants from the gate of an electronic device via planarizing films
US6858494B2 (en) * 2002-08-20 2005-02-22 Taiwan Semiconductor Manufacturing Company Structure and fabricating method with self-aligned bit line contact to word line in split gate flash
US6605535B1 (en) * 2002-09-26 2003-08-12 Promos Technologies, Inc Method of filling trenches using vapor-liquid-solid mechanism
KR100576359B1 (ko) * 2003-12-04 2006-05-03 삼성전자주식회사 비대칭으로 마주보는 소오스 및 드레인 영역들이 배치된 트랜지스터를 갖는 반도체 장치들 및 그 제조 방법들
JP2006179646A (ja) * 2004-12-22 2006-07-06 Matsushita Electric Ind Co Ltd 固体撮像装置の製造方法
US20070254415A1 (en) * 2006-04-27 2007-11-01 Oh Hyun U Thin film transistor substrate, method of manufacturing the same and method of manufacturing liquid crystal display panel including the same
JP4257355B2 (ja) * 2006-09-25 2009-04-22 エルピーダメモリ株式会社 半導体装置およびその製造方法
CN104716177B (zh) * 2013-12-11 2017-10-24 上海华虹宏力半导体制造有限公司 一种改善漏电的射频ldmos器件的制造方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61134055A (ja) * 1984-12-04 1986-06-21 Sony Corp 半導体装置の製造方法
US4829024A (en) * 1988-09-02 1989-05-09 Motorola, Inc. Method of forming layered polysilicon filled contact by doping sensitive endpoint etching
US4957877A (en) * 1988-11-21 1990-09-18 Intel Corporation Process for simultaneously fabricating EEPROM cell and flash EPROM cell
US5029130A (en) * 1990-01-22 1991-07-02 Silicon Storage Technology, Inc. Single transistor non-valatile electrically alterable semiconductor memory device
US5045488A (en) * 1990-01-22 1991-09-03 Silicon Storage Technology, Inc. Method of manufacturing a single transistor non-volatile, electrically alterable semiconductor memory device
US5067108A (en) * 1990-01-22 1991-11-19 Silicon Storage Technology, Inc. Single transistor non-volatile electrically alterable semiconductor memory device with a re-crystallized floating gate
JP2825585B2 (ja) * 1990-01-29 1998-11-18 株式会社日立製作所 半導体集積回路装置及びその製造方法
US5024972A (en) * 1990-01-29 1991-06-18 Motorola, Inc. Deposition of a conductive layer for contacts
US5341014A (en) * 1992-01-07 1994-08-23 Matsushita Electric Industrial Co., Ltd. Semiconductor device and a method of fabricating the same
JP2919160B2 (ja) * 1992-03-17 1999-07-12 株式会社日立製作所 シェルフ構造体の組立て方法、組立装置及び組立治具
JP4156044B2 (ja) * 1994-12-22 2008-09-24 エスティーマイクロエレクトロニクス，インコーポレイテッド 集積回路におけるランディングパッド構成体の製造方法
US5705427A (en) * 1994-12-22 1998-01-06 Sgs-Thomson Microelectronics, Inc. Method of forming a landing pad structure in an integrated circuit
US5552331A (en) * 1995-07-11 1996-09-03 Advanced Micro Devices, Inc. Process for self-aligned source for high density memory
US5719071A (en) * 1995-12-22 1998-02-17 Sgs-Thomson Microelectronics, Inc. Method of forming a landing pad sturcture in an integrated circuit
US5759905A (en) * 1995-12-29 1998-06-02 Micron Technology, Inc. Semiconductor processing method of forming a conductively doped semiconductive material plug within a contact opening

Also Published As

Publication number Publication date
JP3253552B2 (ja) 2002-02-04
US5792695A (en) 1998-08-11
JPH1050705A (ja) 1998-02-20
KR100232984B1 (ko) 1999-12-01
US6274489B1 (en) 2001-08-14
KR970077229A (ko) 1997-12-12

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