TW357366B - Apparatus and method for a variable step address generator - Google Patents

Apparatus and method for a variable step address generator

Info

Publication number
TW357366B
TW357366B TW086100406A TW86100406A TW357366B TW 357366 B TW357366 B TW 357366B TW 086100406 A TW086100406 A TW 086100406A TW 86100406 A TW86100406 A TW 86100406A TW 357366 B TW357366 B TW 357366B
Authority
TW
Taiwan
Prior art keywords
saving
address
unit
elements
digital
Prior art date
Application number
TW086100406A
Other languages
English (en)
Inventor
Danny R Cline
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of TW357366B publication Critical patent/TW357366B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/36—Data generation devices, e.g. data inverters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
TW086100406A 1995-11-29 1997-01-16 Apparatus and method for a variable step address generator TW357366B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US767495P 1995-11-29 1995-11-29

Publications (1)

Publication Number Publication Date
TW357366B true TW357366B (en) 1999-05-01

Family

ID=21727521

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086100406A TW357366B (en) 1995-11-29 1997-01-16 Apparatus and method for a variable step address generator

Country Status (5)

Country Link
EP (1) EP0777236B1 (zh)
JP (2) JPH09204800A (zh)
KR (1) KR100491273B1 (zh)
DE (1) DE69619939T2 (zh)
TW (1) TW357366B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113270130A (zh) * 2020-05-29 2021-08-17 台湾积体电路制造股份有限公司 存储器设备

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6272655B1 (en) * 1998-06-11 2001-08-07 Actel Corporation Method of reducing test time for NVM cell-based FPGA
JP4623355B2 (ja) * 2003-04-01 2011-02-02 ソニー株式会社 半導体記憶装置及び半導体記憶装置の記憶再生方法
CN117524287B (zh) * 2024-01-04 2024-03-22 合肥奎芯集成电路设计有限公司 内存芯片自测试电路和内存芯片自测试方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62120700A (ja) * 1985-11-20 1987-06-01 Fujitsu Ltd 半導体記憶装置
US4841485A (en) * 1987-11-05 1989-06-20 International Business Machines Corporation Read/write memory device with an embedded read-only pattern and method for providing same
JPH02263400A (ja) * 1989-04-03 1990-10-26 Nec Ic Microcomput Syst Ltd 半導体集積回路
JPH03101000A (ja) * 1989-09-13 1991-04-25 Fujitsu Ltd 記憶媒体の試験方法
JP2601931B2 (ja) * 1990-04-06 1997-04-23 株式会社東芝 半導体不揮発性メモリ装置
JPH0449400A (ja) * 1990-06-15 1992-02-18 Taisei Corp エレクターのグリップ装置
JPH04232700A (ja) * 1990-12-28 1992-08-20 Matsushita Electron Corp 半導体記憶装置
EP0499131A1 (en) * 1991-02-12 1992-08-19 Texas Instruments Incorporated High efficiency row redundancy for dynamic ram
JPH05249196A (ja) * 1992-03-02 1993-09-28 Hitachi Ltd 半導体記憶装置
JP3269117B2 (ja) * 1992-05-26 2002-03-25 安藤電気株式会社 半導体メモリ用試験パターン発生器
JPH06314498A (ja) * 1993-04-30 1994-11-08 Hitachi Ltd 半導体集積回路
JPH097399A (ja) * 1995-06-15 1997-01-10 Nec Corp 半導体記憶回路装置
KR970029333A (ko) * 1995-11-24 1997-06-26 김광호 불량 메모리 소자를 이용한 압축된 오디오 신호의 기록/재생 장치 및 그 방법
JP3828222B2 (ja) * 1996-02-08 2006-10-04 株式会社日立製作所 半導体記憶装置
JP2002358797A (ja) * 2001-05-31 2002-12-13 Nec Corp 半導体集積回路

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113270130A (zh) * 2020-05-29 2021-08-17 台湾积体电路制造股份有限公司 存储器设备
TWI760866B (zh) * 2020-05-29 2022-04-11 台灣積體電路製造股份有限公司 記憶體裝置以及用於生成記憶體裝置的佈局設計的方法
US11424237B2 (en) 2020-05-29 2022-08-23 Taiwan Semiconductor Manufacturing Co., Ltd. Memory device

Also Published As

Publication number Publication date
JPH09204800A (ja) 1997-08-05
DE69619939D1 (de) 2002-04-25
JP4724722B2 (ja) 2011-07-13
EP0777236A1 (en) 1997-06-04
KR970029894A (ko) 1997-06-26
DE69619939T2 (de) 2002-11-21
EP0777236B1 (en) 2002-03-20
JP2008146827A (ja) 2008-06-26
KR100491273B1 (ko) 2005-08-11

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees