WO2003012497A1 - Element de circuit d'eclairage sur plan de quartz et procede de production de l'element - Google Patents

Element de circuit d'eclairage sur plan de quartz et procede de production de l'element Download PDF

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Publication number
WO2003012497A1
WO2003012497A1 PCT/JP2001/006600 JP0106600W WO03012497A1 WO 2003012497 A1 WO2003012497 A1 WO 2003012497A1 JP 0106600 W JP0106600 W JP 0106600W WO 03012497 A1 WO03012497 A1 WO 03012497A1
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WO
WIPO (PCT)
Prior art keywords
film
silicon dioxide
vapor deposition
substrate
cladding film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2001/006600
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English (en)
Japanese (ja)
Inventor
Fumio Matsumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ASAHI OPTRONICS Ltd
SUN INSTRUMENTS Inc
Original Assignee
ASAHI OPTRONICS Ltd
SUN INSTRUMENTS Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ASAHI OPTRONICS Ltd, SUN INSTRUMENTS Inc filed Critical ASAHI OPTRONICS Ltd
Priority to PCT/JP2001/006600 priority Critical patent/WO2003012497A1/fr
Publication of WO2003012497A1 publication Critical patent/WO2003012497A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03B—MANUFACTURE, SHAPING, OR SUPPLEMENTARY PROCESSES
    • C03B19/00—Other methods of shaping glass
    • C03B19/14—Other methods of shaping glass by gas- or vapour- phase reaction processes
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G02B6/132—Integrated optical circuits characterised by the manufacturing method by deposition of thin films
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12083—Constructional arrangements
    • G02B2006/121—Channel; buried or the like

Definitions

  • the present invention relates to a quartz planar optical circuit element necessary for realizing an arrayed optical waveguide grating element and the like indispensable for wavelength division multiplexing optical communication, and a method of manufacturing the quartz planar optical circuit element.
  • a flame deposition method is known as a method for manufacturing a quartz planar optical circuit element.
  • this flame deposition method is a method in which a plurality of substrates 33 are arranged side by side around a disk 31 rotating in the direction of arrow A, and glass fine powder containing silicon dioxide as a main component. after a 3 5 deposited on the substrate 3 3, by using oxygen (0 2) and hydrogen (H 2) and bar Na 3 7 issuing oxyhydrogen flame 3 9 for combusting a mixture of,
  • This is a method in which glass fine powder 35 is melted and vitrified at a high temperature of 1000 ° C. or higher.
  • FIG. 4 is a diagram showing a cross-sectional structure of a conventional quartz planar optical circuit element manufactured using such a flame deposition method.
  • a silicon single crystal substrate (or a synthetic quartz glass substrate) 41 in this case, the upper surface of the diagram
  • five portions of silicon dioxide A lower cladding film 43 is formed by depositing a powder containing phosphorus oxide and boron trioxide and melting and vitrifying the powder at a high temperature of 1000 ° C. or more.
  • a core film is formed by depositing a powder obtained by adding germanium dioxide further to boron and boron trioxide and melting and vitrifying at a high temperature of ⁇ 100 ° C. or higher, and then a predetermined position on the upper portion of the core film
  • a rectangular etching mask is formed using photolithography technology, and the core film is formed into a rectangular shape using reactive ion etching (RIE) to form a core portion 47.
  • RIE reactive ion etching
  • a powder obtained by adding phosphorus pentoxide and boron trioxide to silicon dioxide is deposited so as to cover the lower cladding film 43 and the core portion 47, and melted at a high temperature of 100 ° C. or more.
  • the upper clad part 45 is formed by vitrification.
  • the value of the radius of curvature r becomes negative, a tensile stress is generated in the film and the film is easily brittle, and therefore the value of r is preferably positive.
  • Thermal expansion coefficient of the general silicon single crystal substrate it is said that approximately 5 X 1 0- 6.
  • the thermal expansion coefficient of the silicon dioxide film of amorphous, approximately equal to the synthetic quartz glass board, the thermal expansion coefficient of the silicon dioxide film as crystals from 7 X 1 0- 6 in 1 4 X 1 0-6 about is there.
  • the present invention has been made to solve the above-described problems of the conventional example, and provides a quartz planar optical circuit element which is less dependent on the polarization of waveguide loss, has no substrate warpage, and is excellent in mass production.
  • the purpose is to provide. Disclosure of the invention
  • the circuit element includes a lower cladding film (13) containing silicon dioxide as a main component formed by vapor deposition on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate (11), and the lower cladding film.
  • a membrane (15).
  • the quartz planar optical circuit device further includes a strain correction film (19) containing silicon dioxide as a main component formed by vapor deposition on the surface opposite to the substrate (11).
  • the distortion correction film (19) has substantially the same thermal expansion coefficient as the material of the lower cladding film (13) and the upper cladding film (15). It consists of the material which has.
  • the material mainly composed of silicon dioxide for forming the core portion (17) is a material obtained by adding germanium dioxide to silicon dioxide.
  • the method for manufacturing a quartz planar optical circuit element of the present invention is characterized in that the lower clad film mainly composed of silicon dioxide is formed on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate (11) by vapor deposition. Forming a core film mainly composed of silicon dioxide on the lower cladding film (13) by vapor deposition; and processing the core film into a predetermined shape by anisotropic etching. Forming a core portion (17) by heating, and an upper cladding film mainly composed of silicon dioxide so as to cover the core portion (17) and the lower cladding film (13).
  • the step of forming a distortion correction film (19) containing silicon dioxide as a main component on the surface on the opposite side of the substrate (11) by vapor deposition is included.
  • a distortion correction film (19) containing silicon dioxide as a main component on the surface on the opposite side of the substrate (11) by vapor deposition is included.
  • the distortion correction film (19) is substantially the same as the material of the lower cladding film (13) and the upper cladding film (15). It is made of a material having a coefficient of thermal expansion.
  • the material containing silicon dioxide as a main component for forming the core film is a material obtained by adding germanium dioxide to silicon dioxide.
  • FIG. 1 is a cross-sectional configuration diagram of a quartz planar optical circuit device according to one embodiment of the present invention.
  • FIG. 2A is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG.
  • FIG. 2B is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG.
  • FIG. 2C is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG.
  • FIG. 2D is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG.
  • FIG. 2E is a diagram showing a step of manufacturing the quartz planar optical circuit element in FIG. 1.
  • FIG. 2F is a diagram showing a step of manufacturing the quartz planar optical circuit device in FIG. 1.
  • FIG. 2G is a diagram showing a step of manufacturing the quartz planar optical circuit device in FIG.
  • FIG. 2H is a diagram showing a step of manufacturing the quartz planar optical circuit device of FIG.
  • FIG. 3 is a view for explaining a film deposition method by a flame deposition method.
  • Fig. 4 shows a conventional quartz planar optical circuit element manufactured using the flame deposition method. It is sectional drawing. BEST MODE FOR CARRYING OUT THE INVENTION
  • the quartz planar optical circuit element of the present embodiment includes a lower clad film mainly composed of silicon dioxide formed by vapor deposition on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate, and the lower clad film. Germanium dioxide or the like is uniformly added to silicon dioxide on the upper part of the silicon dioxide, and silicon dioxide is formed so as to cover a core having a predetermined shape formed by vapor deposition and the core and the lower cladding film.
  • Phosphorus pentoxide or phosphorous pentoxide and boron trioxide are uniformly added to an upper cladding film or a silicon dioxide, and the upper cladding film formed by vapor deposition and vapor deposition on the surface opposite to the substrate And a distortion correction film containing silicon dioxide as a main component and formed by the above method.
  • the deposition material is directly ionized and adhered to the substrate by electric field acceleration (ion plating deposition method), or the ionized gas is accelerated by an electric field to collide with the deposition material and adhere the deposition material to the substrate.
  • a lower cladding film composed mainly of silicon dioxide on the substrate, and a core portion made of silicon dioxide uniformly doped with germanium dioxide, etc.
  • each film is formed at a relatively low temperature, so that the residual stress (film formation stress) of each film is reduced, the refractive index distribution of the optical waveguide is uniform, and the waveguide is formed by the film formation stress. It is possible to obtain a flat-surface circuit element having almost no polarization dependence of loss.
  • the carbon dioxide Since the coefficient of thermal expansion of the film containing silicon as the main component and the coefficient of thermal expansion of the strain correction film containing silicon dioxide as the main component on the back side of the substrate are substantially the same, the residual strain on the front side and the back side of the substrate cancel each other. Work on. For this reason, it is possible to obtain a quartz planar circuit device which hardly warps the substrate, has excellent connectivity with the optical fiber, and can obtain high mass productivity.
  • the method for manufacturing a quartz planar optical circuit element includes a step of forming a lower clad film mainly composed of silicon dioxide on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate by vapor deposition; Forming a core film on a clad film by uniformly depositing silicon dioxide with germanium dioxide or the like by vapor deposition; forming the core film by processing the core film into a predetermined shape by anisotropic etching; An upper cladding film composed mainly of silicon dioxide or an upper cladding obtained by uniformly adding phosphorus pentoxide or phosphorus pentoxide and boron trioxide to silicon dioxide so as to cover the core portion and the lower cladding film. Forming the upper clad film by heat treatment; and forming silicon dioxide as a main component on the surface on the opposite side of the substrate. And forming by vapor deposition a correction film.
  • a lower cladding film containing silicon dioxide as a main component is formed on the front side of a substrate by using an ionization vapor deposition method such as an ion plating vapor deposition method or an ion beam assisted vapor deposition method.
  • An ionization vapor deposition method such as an ion plating vapor deposition method or an ion beam assisted vapor deposition method.
  • a core film to which germanium or the like is uniformly added is formed, the core film is processed into a predetermined shape by anisotropic etching, a core portion is formed, and a carbon dioxide is formed so as to cover the core portion and the lower cladding film.
  • An upper cladding film composed mainly of silicon or an upper cladding film in which phosphorus pentoxide or phosphorus pentoxide and boron trioxide are uniformly added to silicon dioxide is formed, and the upper cladding film is melted by heat treatment.
  • a strain correction film containing silicon dioxide as a main component is formed on the opposite surface of the substrate.
  • the film mainly composed of silicon dioxide on the front side of the substrate and the distortion correction film mainly composed of silicon dioxide on the rear side of the substrate have substantially the same coefficient of thermal expansion, the front side and the rear side of the substrate The residual strains on the sides act to cancel each other. For this reason, it is possible to obtain a quartz planar circuit element that hardly warps the substrate, has excellent connectivity with an optical fiber, and can obtain high mass productivity.
  • FIG. 1 is a cross-sectional view showing one configuration example of a quartz planar optical circuit element according to the present embodiment.
  • the quartz planar optical circuit element of the present embodiment is formed on one surface (the upper surface in the figure) of a substrate 11 such as a silicon single crystal substrate or a synthetic quartz glass substrate by ionization vapor deposition ( Using ion plating deposition or ion beam deposition, a lower clad film 13 is formed by adding silicon dioxide alone or germanium dioxide or titanium dioxide to silicon dioxide uniformly, and the lower clad film 13 is formed.
  • An upper cladding film mainly composed of silicon dioxide or a rectangular core portion 17 made of silicon dioxide uniformly doped with germanium dioxide or the like is formed on the cladding film 13 by ionization vapor deposition.
  • ionization deposition on parts 17 and the lower cladding film 13 apply phosphorus pentoxide to silicon dioxide or phosphorus pentoxide and boron trioxide to silicon dioxide uniformly.
  • An upper clad film 15 is formed, and the surface opposite to the substrate 11 (the lower surface in the figure) is a distortion correction film that performs distortion correction by adding silicon dioxide alone or titanium dioxide to silicon dioxide uniformly. It is composed by arranging nineteen. Next, an example of a method for manufacturing the quartz planar optical circuit element will be described.
  • FIG. 1 2A to 2H are diagrams showing the steps of manufacturing the quartz planar optical circuit device shown in FIG.
  • one surface (upper surface) of a substrate 11 such as a silicon single crystal substrate or a synthetic quartz glass substrate is formed by ionization vapor deposition (ion plating vapor deposition). Or an ion beam assisted vapor deposition method) to form a lower clad film 13 alone of silicon dioxide or by uniformly adding germanium dioxide or titanium dioxide to silicon dioxide.
  • a core film 17 ′ having a higher refractive index obtained by uniformly adding germanium dioxide or the like to silicon dioxide was used to form a lower cladding film 13, as shown in FIG. 2B. Form on top.
  • a metal mask 21 is formed on the formed core film 17 ′ using a sputtering method, and a photoresist 23 is applied thereon.
  • An optical waveguide pattern is formed on the photo resist by an exposure device in which a photo mask is set by using a trisography technique, and a patterned photo resist 23 is formed (see FIG. 2D).
  • the metal mask 21 is patterned by reactive ion etching (RIE) using the pattern of the photoresist 23 as a mask, and the core film is further formed using the metal mask 21.
  • RIE reactive ion etching
  • the core 17 and the lower cladding film 13 were covered by ionization vapor deposition.
  • An upper clad film 15 is formed by uniformly adding phosphorus pentoxide and boron trioxide to silicon dioxide. Perform heat treatment for 0 minutes to melt and flatten the surface.
  • the upper cladding film mainly composed of silicon dioxide may be used as it is without heat treatment.
  • a silicon dioxide alone or a silicon dioxide or titanium dioxide or the like is added uniformly to provide a distortion correction film 19 9 for performing the distortion correction.
  • the material of the distortion compensation film 19 it is desirable to use a material having a thermal expansion coefficient substantially equal to that of the material of the lower cladding film 13 and the material of the upper cladding film 15.
  • the lower cladding film 13 and the upper cladding film 15 generally have a thickness of 10 to 30 ⁇ m, and the core portion 17 has a thickness of 6 to 30 ⁇ m.
  • the relative refractive index difference between the core and the cladding is 0.25 to: about 1.5%.
  • the ionization vapor deposition method is used instead of the conventional flame deposition method.
  • Film formation can be performed uniformly and continuously from a point evaporation source, and the film thickness can be made uniform, and a light guide having a uniform refractive index distribution between film formation ports and within the film formation port. Wave path can be realized.
  • the ionization deposition method used in this embodiment has a lower cladding film, a core film, and an upper cladding film at a low temperature of about 200 ° C., compared with the flame deposition method of about 100 ° C. Since the waveguide film can be formed, the film formation stress (residual stress) generated in the optical waveguide is reduced, and the polarization loss of the waveguide loss can be reduced.
  • the distortion correction film 19 having substantially the same thermal expansion coefficient as the film on the front surface side is formed on the back surface side of the substrate, it is possible to correct the warpage of the substrate, and thus more complete.
  • Optical polarization It is possible to provide a quartz planar optical circuit element having excellent connectivity with a bus and high productivity.
  • the higher the temperature at which the lower cladding film 13 is formed the greater the difference between the thermal expansion of the substrate 11 and the thermal expansion of the lower cladding 13. Becomes larger. That is, if the substrate 11 and the lower cladding film 13 are cooled to room temperature, the substrate 11 and the lower cladding film 13 shrink and the substrate 11
  • the dimension and the dimension of the lower cladding film 13 have a dimensional difference proportional to the difference between the deposition temperature and the room temperature. This causes residual stress (deposition stress) on the substrate 11 and the lower cladding film 13. ) And residual strain. This causes the polarization dependence of the waveguide loss and the warpage of the substrate.
  • the substrate 11 and the lower cladding film are used because the ionization deposition method capable of processing at about 200 ° C. is used instead of the flame deposition method of about 100 ° C. Even when the materials 13 have different coefficients of thermal expansion, the residual stress and residual strain generated in the substrate 11 and the lower cladding film 13 can be reduced. Therefore, according to this embodiment, the polarization dependence of the waveguide loss and the warpage of the substrate can be reduced.
  • a distortion correction film 19 made of a material having substantially the same thermal expansion coefficient as the material of the lower cladding film 13 is formed on the back surface of the substrate 11.
  • the distortion correction film 19 in the process of forming the distortion correction film 19, residual strain opposite to the residual strain generated in the process of forming the lower cladding film 13 is generated. Warpage can be further reduced.
  • the ion plating The lower cladding film composed mainly of silicon dioxide, the core, the upper cladding film, and the other side of the substrate are formed on one surface of the substrate by ionization vapor deposition such as ion vapor deposition or ion beam assisted vapor deposition. Since the strain correction film is formed on the surface of the optical waveguide, the refractive index distribution of the optical waveguide becomes uniform, and the polarization dependence of the waveguide loss due to the film formation stress (residual stress) and the warpage of the substrate are almost eliminated. Therefore, it has excellent connectivity with optical fibers and high mass productivity can be obtained.
  • a lower cladding film is formed on one side of the substrate using an ionization vapor deposition method such as ion plating vapor deposition or ion beam assisted vapor deposition, and a core film is formed thereon.
  • an upper cladding film is formed so as to cover the core portion and the lower cladding film, and the upper cladding film is directly or heat-treated.
  • the optical waveguide is made uniform, and the refractive index distribution of the optical waveguide becomes uniform, resulting in polarization dependence of waveguide loss due to film formation stress and substrate warpage. Is almost eliminated, excellent connectivity with optical fiber, and high mass productivity.
  • the lower cladding film (1) composed mainly of silicon dioxide formed on one surface of a silicon single crystal substrate or a synthetic quartz glass substrate (11) by vapor deposition. 3
  • Phosphorus pentoxide or phosphorus pentoxide and trioxide are added to the upper cladding film (15) or silicon dioxide mainly containing silicon dioxide so as to cover the lower cladding film (13).
  • the quartz planar optical circuit element was configured to include boron and an upper cladding film (15) formed by vapor deposition, the refractive index distribution of the optical waveguide became uniform, and film deposition stress (residual The polarization dependence of the waveguide loss due to stress) and the warpage of the substrate are almost eliminated, and the connection with the optical fiber is excellent and high productivity can be obtained.
  • a distortion correction film (19) containing silicon dioxide as a main component formed by vapor deposition is further provided on the surface on the opposite side of the substrate (11), the residual distortion of the planar optical circuit element can be reduced. It is possible to suppress the warpage of the substrate.
  • the distortion correction film (19) is made of a material having substantially the same coefficient of thermal expansion as the material of the lower cladding film (13) and the upper cladding film (15), The warpage of the substrate can be effectively prevented.

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Manufacturing & Machinery (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Optical Integrated Circuits (AREA)

Abstract

L'invention concerne un élément de circuit d'éclairage sur plan de quartz, qui comprend un substrat en silicium monocristallin ou un substrat en verre de quartz synthétique (11); un film de revêtement inférieur (13) constitué principalement de dioxyde de silicium et formé par dépôt par évaporation sous vide sur un côté du substrat (11); une partie centrale (17) présentant une forme donnée, constituée principalement de dioxyde de silicium et formée par dépôt par évaporation sous vide sur une partie du film de revêtement inférieur (13); un film de revêtement supérieur (15) formé par dépôt par évaporation sous vide de façon à recouvrir la partie centrale (17) et le film de revêtement inférieur (13), ledit film étant constitué principalement de dioxyde de silicium, ou comprenant du dioxyde de silicium et incorporant de façon uniforme soit un anhydride phosphorique soit un anhydride phosphorique et un trioxyde de bore; et un film de correction de distorsion (19) constitué principalement de dioxyde de silicium et formé par dépôt par évaporation sous vide sur l'autre côté du substrat (11).
PCT/JP2001/006600 2001-07-31 2001-07-31 Element de circuit d'eclairage sur plan de quartz et procede de production de l'element Ceased WO2003012497A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2001/006600 WO2003012497A1 (fr) 2001-07-31 2001-07-31 Element de circuit d'eclairage sur plan de quartz et procede de production de l'element

Applications Claiming Priority (1)

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PCT/JP2001/006600 WO2003012497A1 (fr) 2001-07-31 2001-07-31 Element de circuit d'eclairage sur plan de quartz et procede de production de l'element

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0304709A2 (fr) * 1987-08-28 1989-03-01 Hitachi, Ltd. Dispositif optique du type à guide d'onde
JPH08110425A (ja) * 1994-10-11 1996-04-30 Hitachi Cable Ltd 光導波路及びその製造方法並びに光伝送モジュール
JPH10104451A (ja) * 1996-09-30 1998-04-24 Shin Etsu Chem Co Ltd 光導波路用基板及びその作製方法
JPH1184157A (ja) * 1997-09-04 1999-03-26 Toyo Commun Equip Co Ltd 光導波路の製造方法
EP1074864A2 (fr) * 1999-08-06 2001-02-07 Nhk Spring Co.Ltd. Méthode de fabrication de dispositifs à guides d'ondes optiques planaires

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0304709A2 (fr) * 1987-08-28 1989-03-01 Hitachi, Ltd. Dispositif optique du type à guide d'onde
JPH08110425A (ja) * 1994-10-11 1996-04-30 Hitachi Cable Ltd 光導波路及びその製造方法並びに光伝送モジュール
JPH10104451A (ja) * 1996-09-30 1998-04-24 Shin Etsu Chem Co Ltd 光導波路用基板及びその作製方法
JPH1184157A (ja) * 1997-09-04 1999-03-26 Toyo Commun Equip Co Ltd 光導波路の製造方法
EP1074864A2 (fr) * 1999-08-06 2001-02-07 Nhk Spring Co.Ltd. Méthode de fabrication de dispositifs à guides d'ondes optiques planaires

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