WO2006009148A1 - Simox基板の製造方法 - Google Patents
Simox基板の製造方法 Download PDFInfo
- Publication number
- WO2006009148A1 WO2006009148A1 PCT/JP2005/013259 JP2005013259W WO2006009148A1 WO 2006009148 A1 WO2006009148 A1 WO 2006009148A1 JP 2005013259 W JP2005013259 W JP 2005013259W WO 2006009148 A1 WO2006009148 A1 WO 2006009148A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- heat treatment
- substrate
- oxygen
- gas
- silicon substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
- H10P30/209—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species in silicon to make buried insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P95/90—Thermal treatments, e.g. annealing or sintering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6302—Non-deposition formation processes
- H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
- H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
- H10P14/6308—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
- H10P14/6309—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6302—Non-deposition formation processes
- H10P14/6322—Formation by thermal treatments
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1908—Preparing SOI wafers using silicon implanted buried insulating layers, e.g. oxide layers [SIMOX]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
Definitions
- the present invention relates to a method for manufacturing a SIMOX substrate, which obtains a SIMOX substrate by performing a heat treatment on a silicon substrate implanted with oxygen ions.
- a SIMOX substrate is mainly known as an SOI substrate having a single crystal silicon layer on an insulator such as silicon oxide.
- the SIMOX substrate is formed by implanting oxygen ions into the single crystal silicon substrate, followed by high-temperature heat treatment in an oxidizing atmosphere, thereby chemically reacting the injected oxygen ions and silicon atoms to form a buried oxide film. It is a substrate.
- Devices formed on these SOI layers are expected to be the next-generation high-performance semiconductor substrates because they are capable of high radiation resistance, latch-up resistance, suppression of short channel effects, and low power consumption operation. .
- a mirror-polished substrate generally obtained by cleaning a silicon single crystal grown by the Chiyoklarsky method is introduced when a crystal such as COP (Crystal Originated Particle) is grown.
- COP Crystal Originated Particle
- crystal defects cause degradation of gate oxide film breakdown voltage. Therefore, device manufacturers use a substrate with reduced crystal defect density, such as a silicon epitaxial growth substrate or a substrate with greatly reduced crystal defects grown under slow pulling conditions, thereby insulating the gate oxide film. Yield improvement due to defects is being implemented.
- oxygen ions are implanted into a silicon substrate containing nitrogen, and then heat-treated at 1350 ° C with 0.5% oxygen gas for 4 hours and at an oxygen concentration of 70% for another 4 hours. It has been reported that there were no depressions called thermal pits of 0.3 m or more on the surface of the layer.
- the manufacturing method of the present invention has improved the manufacturing method of the SIMOX substrate in which a SIMOX substrate is obtained by performing heat treatment at 1300 to 1350 ° C in a mixed gas atmosphere of argon and oxygen on a silicon substrate implanted with oxygen ions. Is.
- the silicon substrate is placed in an inert gas or reducing gas or mixed gas atmosphere of inert gas and reducing gas in a range of 1 000 ° C to 1280 ° C.
- Pre-heat treatment is performed for 5 minutes to 4 hours in the temperature range of C.
- a pre-heat treatment is performed on a silicon substrate after oxygen ion implantation and before the heat treatment, so that crystal defects caused by the heat treatment in a non-oxidizing gas atmosphere, particularly grown-in
- the inner wall oxide film of a cavity defect called a defect is dissolved, and then the Grown-in defect near the surface is reduced by the hole filling effect by diffusion of interstitial silicon atoms in the cavity defect from which the inner wall oxide film is removed. Extinguish. For this reason, defects having a size of less than 0.3 ⁇ m can be eliminated.
- the silicon substrate into which the oxygen ions are implanted is composed of void defects or COPs.
- a SIMOX substrate manufacturing method in which the crystal defect density is 1 ⁇ 10 5 cm _3 or more and the maximum frequency of the crystal defect size distribution is 0.12 ⁇ m or less may be used.
- the substrate having a small crystal defect since the substrate having a small crystal defect is used, the variation in the oxygen ion range is reduced, and the buried oxide film is formed by heat treatment in a mixed gas atmosphere of argon and oxygen in the next step. There is an effect that the variation in the size can be reduced.
- the silicon substrate is cooled to 600 ° C to 1100 ° C in an inert gas or a reducing gas or a mixed gas atmosphere of an inert gas and a reducing gas, and then mixed with argon and oxygen.
- a SIMOX substrate manufacturing method that performs heat treatment in a gas atmosphere may also be used.
- the temperature can be prevented from deteriorating after the pre-heat treatment, specifically, the temperature is lowered to 1100 ° C. or lower, so that the roughness can be remarkably prevented from deteriorating. effective.
- the silicon substrate is placed in an inert gas, a reducing gas, or a mixed gas atmosphere of an inert gas and a reducing gas after oxygen ion implantation and before heat treatment.
- pre-heat treatment is performed for 5 minutes to 4 hours in the temperature range from ° C to 1280 ° C
- the grown-in defects near the surface are reduced and eliminated by the hole filling effect by diffusion of interstitial silicon atoms in the cavity defect from which the inner wall oxide film has been removed.
- a crystal defect density of oxygen ions consists Contact Keru void defect or COP in the silicon substrate to be implanted is 1 X 10 5 cm_ 3 or more and is not more than 0. 12 m maximum frequency of the size distribution of the crystal defects If there is a substrate having small crystal defects, the variation of the oxygen ion range becomes smaller, and the buried oxide film formed by the heat treatment in the mixed gas atmosphere of argon and oxygen in the next step is reduced. The noise can be reduced. On the other hand, after the heat treatment at 1 250 ° C or lower in the non-oxidizing gas atmosphere at the initial stage is completed, the gas is switched to a mixed gas atmosphere of argon and oxygen at that temperature.
- the microroughness of the silicon substrate surface is deteriorated if it is replaced, if the temperature is lowered to 1100 ° C or less after the pre-heat treatment, specifically, the deterioration of the roughness can be significantly prevented. be able to.
- FIG. 1 is a diagram showing temperature conditions in Example 1 of the present invention.
- FIG. 2 is a diagram showing temperature conditions in Example 2 of the present invention.
- FIG. 3 is a diagram showing temperature conditions in Comparative Example 1.
- FIG. 4 is a process diagram in the embodiment of the present invention.
- the present invention is a SIMOX substrate manufacturing method for obtaining a SIMOX substrate by subjecting a silicon substrate implanted with oxygen ions to heat treatment at 1300 to 1350 ° C. in a mixed gas atmosphere of argon and oxygen. Then, after the implantation of oxygen ions and before the heat treatment, the silicon substrate is placed in the temperature range of 1000 ° C to 1280 ° C in an inert gas, a reducing gas, or a mixed gas atmosphere of an inert gas and a reducing gas. It is characterized by pre-heat treatment for 5 minutes to 4 hours.
- Oxygen ions are implanted to form an oxide film, and then, as a pre-treatment of heat treatment in a mixed gas atmosphere of argon and oxygen, which has been conventionally performed, an inert gas or a reducing gas or an inert gas and a reduction In a mixed gas atmosphere with sex gas!
- a mixed gas atmosphere of argon and oxygen which has been conventionally performed
- crystal defects caused by heat treatment in a non-oxidizing gas atmosphere particularly inner wall oxide films of cavity defects called Grown-in defects
- Grown-in defects are dissolved, and then the inner wall oxide film is removed from the lattice defects.
- Grown-in defects near the surface are reduced and eliminated by the hole filling effect caused by the diffusion of interstitial silicon atoms.
- silicon-based or silica-based particles adhering by ion implantation can be reduced or eliminated at the same
- examples of the inert gas include argon gas and helium gas
- examples of the reducing gas include hydrogen gas
- examples of the mixed gas atmosphere of inert gas and reducing gas include a mixed gas atmosphere of hydrogen gas and argon gas, or helium gas and hydrogen gas.
- the mixed gas atmosphere is mentioned. In that case, the mixing ratio is not particularly limited.
- the temperature range in the pre-heat treatment is 1000 ° C to 1280 ° C, and the pre-heat treatment time is in the range of 5 minutes to 4 hours.
- the heat treatment is performed in a non-oxidizing gas atmosphere.
- the inner wall oxide film of the vacancy defect called Grown-in defect is dissolved by the crystal defect due to, and then the surface is removed by the filling effect by diffusion of interstitial silicon atoms in the cavity defect from which the inner wall oxide film has been removed. This is because it is necessary to reduce and eliminate nearby Grown-in defects.
- the temperature of the pre-heat treatment is less than 1000 degrees, it becomes difficult to eliminate crystal defects, and if the temperature exceeds 1280 ° C, the silicon atoms on the silicon surface will sublime and the roughness of the silicon substrate surface will deteriorate. There is a bug to do.
- the temperature range is 1100-1250 ° C.
- the pre-heat treatment time is less than 5 minutes, it becomes difficult to sufficiently eliminate crystal defects, and if the time exceeds 4 hours, the sublimation of silicon atoms and the outside of the implanted oxygen ions are difficult. There is a problem that the quality of the buried oxide film deteriorates due to diffusion.
- the pre-heat treatment is preferably performed for 30 to 2 hours.
- the silicon substrate which oxygen ions are implanted is a crystal defect density made of void defect or COP is 1 X 10 5 cm_ 3 or more and a maximum frequency of the size distribution of crystal defects 0. 12 m or less Preferably there is.
- a substrate having a small crystal defect is used, the variation in the oxygen ion range is reduced, and the variation in the buried oxide film due to the heat treatment in the mixed gas atmosphere of argon and oxygen in the next step is reduced. You can.
- the defect in some of the required crystal defect density 1 X 10 5 cm is less than _3 crystal defect size is increased before the heat treatment the crystal defect density of 1 X 10 5 cm_ 3 or more This is because extinction is difficult, and the preferred defect density is 10 5 cm 1 3 to 1 X 10 7 cm_ 3 .
- the reason why the maximum frequency of the size distribution of crystal defects is required to be 0.12 m or less is that when the maximum frequency exceeds 0.12 m, it becomes difficult to eliminate crystal defects sufficiently.
- the maximum frequency is more preferably 0.07 m or less.
- the silicon substrate is reduced from 600 ° C to 1100 ° C by inert gas, reducing gas, or inert gas and reducing gas. It is preferable to perform a heat treatment in a mixed gas atmosphere of argon and oxygen after the temperature is lowered in a mixed gas atmosphere with gas.
- the temperature is lowered to a temperature at which microroughness can be prevented from deteriorating, specifically 1100 ° C or lower, and a buried oxide film is formed by introducing an oxidizing gas, the same level of roughness as SIMOX products can be obtained.
- the SIMOX substrate manufacturing method described above is performed, for example, through an oxygen ion implantation step and a pre-heat treatment step, as shown in the process diagram of FIG.
- oxygen ions 2 are implanted into the silicon substrate 1.
- the silicon substrate is heated to 1000 ° C to 1280 ° C in an inert gas, a reducing gas, or a mixed gas atmosphere 3 of an inert gas and a reducing gas.
- Pre-heat treatment is performed for 5 minutes to 4 hours.
- Example 2 The same substrates as the three types of substrates in Example 1 were prepared. Oxygen ion implantation was performed on each of these three types of substrates under the same conditions as in Example 1. Next, as described in Fig. 2, after introducing 700 ° C in an Ar gas 100% atmosphere, the temperature was raised to 1150 ° C, and then After holding for 1 hour, the temperature was lowered to 1000 ° C. Thereafter, the temperature was raised to 1350 ° C in a 1% oxygen atmosphere-argon gas base, and then kept for 4 hours, and then kept for another 4 hours in a 70% oxygen atmosphere to lower the temperature to 700 ° C. After that, the surface oxide film was removed with HF aqueous solution, and the final SIMOX product was made through SC-1 cleaning. These SIMOX substrates were designated as Example 2.
- Example 1 The same substrates as the three types of substrates in Example 1 were prepared. Oxygen ion implantation was performed on each of these three types of substrates under the same conditions as in Example 1. Next, as shown in Fig. 3, 1% oxygen atmosphere was added at 700 ° C, and the temperature was raised to 1350 ° C using an argon gas base. After that, the temperature was maintained for 4 hours, and then maintained for another 4 hours in a 70% oxygen atmosphere. The temperature was lowered to ° C. Then, after removing the surface oxide film with HF aqueous solution, SC-1 cleaning was performed to make the final SIMOX product. These SIMOX substrates were designated as Comparative Example 1.
- Example 1 The substrates (1) to (3) in Example 1, Example 2 and Comparative Example 1 were observed with a surface defect detection device. The results were as follows.
- Example 1 On the other hand, in Example 1, all of the substrates (1) to (3) had a number of pits of 0.3 to 0.5 Zcm 2 , but the haze level was measured. The haze level in the sample varied in the range of about lppb to 1020 ppb in the heat treatment furnace. In particular, haze deterioration was observed toward the bottom of the boat.
- Example 2 the number of pits of all of the substrates (1) to (3) was 0.3 to 0.5 / cm 2 and the haze level was measured. As a result, the haze level was about l for all the samples. It was in the range of ⁇ 5ppb, and it was proved to be equivalent to the conventional SIMOX product.
- the crystal defects caused by heat treatment in a non-oxidizing gas atmosphere, especially the inner wall oxide film of cavity defects called Grown-in defects are dissolved, and then the inner wall oxide film is removed.
- Grown-in defects near the surface can be reduced or eliminated by the effect of hole filling by diffusion of interstitial silicon atoms in the defects.
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Abstract
Description
Claims
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP05762053A EP1786023B1 (en) | 2004-07-20 | 2005-07-19 | Simox substrate manufacturing method |
| KR1020077003782A KR100834231B1 (ko) | 2004-07-20 | 2005-07-19 | Simox 기판의 제조 방법 |
| US11/632,875 US7560363B2 (en) | 2004-07-20 | 2005-07-19 | Manufacturing method for SIMOX substrate |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004211127A JP4706199B2 (ja) | 2004-07-20 | 2004-07-20 | Simox基板の製造方法 |
| JP2004-211127 | 2004-07-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2006009148A1 true WO2006009148A1 (ja) | 2006-01-26 |
Family
ID=35785256
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2005/013259 Ceased WO2006009148A1 (ja) | 2004-07-20 | 2005-07-19 | Simox基板の製造方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7560363B2 (ja) |
| EP (1) | EP1786023B1 (ja) |
| JP (1) | JP4706199B2 (ja) |
| KR (1) | KR100834231B1 (ja) |
| CN (1) | CN100501922C (ja) |
| TW (1) | TWI270959B (ja) |
| WO (1) | WO2006009148A1 (ja) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4706199B2 (ja) * | 2004-07-20 | 2011-06-22 | 株式会社Sumco | Simox基板の製造方法 |
| JP5343371B2 (ja) * | 2008-03-05 | 2013-11-13 | 株式会社Sumco | シリコン基板とその製造方法 |
| JP5561918B2 (ja) * | 2008-07-31 | 2014-07-30 | グローバルウェーハズ・ジャパン株式会社 | シリコンウェーハの製造方法 |
| JP5498678B2 (ja) * | 2008-09-25 | 2014-05-21 | グローバルウェーハズ・ジャパン株式会社 | シリコンウェーハの製造方法 |
| JP2010135538A (ja) * | 2008-12-04 | 2010-06-17 | Sumco Corp | 貼り合わせウェーハの製造方法 |
| US8492290B2 (en) * | 2011-06-21 | 2013-07-23 | International Business Machines Corporation | Fabrication of silicon oxide and oxynitride having sub-nanometer thickness |
| JP2014168090A (ja) * | 2014-04-24 | 2014-09-11 | Globalwafers Japan Co Ltd | シリコンウェーハの製造方法 |
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| JPH01122019A (ja) * | 1987-11-06 | 1989-05-15 | Hitachi Maxell Ltd | 信号入り磁気テープ |
| JPH05335301A (ja) * | 1992-06-03 | 1993-12-17 | Oki Electric Ind Co Ltd | シリコン酸化膜の形成方法 |
| JPH07193072A (ja) * | 1993-12-27 | 1995-07-28 | Nec Corp | 半導体基板の製造方法 |
| JPH1098047A (ja) * | 1996-09-12 | 1998-04-14 | Wacker Siltronic G Fuer Halbleitermaterialien Ag | 低欠陥密度を有するシリコン半導体ウエハの製造方法 |
| JPH1140512A (ja) * | 1997-07-22 | 1999-02-12 | Komatsu Denshi Kinzoku Kk | 半導体基板の製造方法 |
| JP2001223220A (ja) * | 2000-02-08 | 2001-08-17 | Mitsubishi Materials Silicon Corp | 半導体ウェーハの熱処理方法及び半導体ウェーハ |
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| JP3995286B2 (ja) | 1996-04-26 | 2007-10-24 | Sumco Techxiv株式会社 | Simox基板の製造方法 |
| JP3583870B2 (ja) | 1996-08-19 | 2004-11-04 | 新日本製鐵株式会社 | 半導体基板及びその製造方法 |
| JPH11220019A (ja) * | 1998-02-02 | 1999-08-10 | Nippon Steel Corp | Soi基板およびその製造方法 |
| WO1999039380A1 (en) * | 1998-02-02 | 1999-08-05 | Nippon Steel Corporation | Soi substrate and method for manufacturing the same |
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| TWI313059B (ja) * | 2000-12-08 | 2009-08-01 | Sony Corporatio | |
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| WO2007007386A1 (ja) * | 2005-07-11 | 2007-01-18 | Sumitomo Mitsubishi Silicon Corporation | Simox基板の製造方法及び該方法により得られるsimox基板 |
| CN101292341A (zh) * | 2005-08-26 | 2008-10-22 | Memc电子材料有限公司 | 绝缘体上应变硅结构的制造方法 |
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2004
- 2004-07-20 JP JP2004211127A patent/JP4706199B2/ja not_active Expired - Fee Related
-
2005
- 2005-07-19 TW TW094124383A patent/TWI270959B/zh not_active IP Right Cessation
- 2005-07-19 WO PCT/JP2005/013259 patent/WO2006009148A1/ja not_active Ceased
- 2005-07-19 US US11/632,875 patent/US7560363B2/en not_active Expired - Fee Related
- 2005-07-19 CN CNB2005800246636A patent/CN100501922C/zh not_active Expired - Fee Related
- 2005-07-19 EP EP05762053A patent/EP1786023B1/en not_active Expired - Fee Related
- 2005-07-19 KR KR1020077003782A patent/KR100834231B1/ko not_active Expired - Fee Related
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6472533A (en) * | 1987-09-11 | 1989-03-17 | Nippon Telegraph & Telephone | Manufacture of single crystal semiconductor substrate |
| JPH01122019A (ja) * | 1987-11-06 | 1989-05-15 | Hitachi Maxell Ltd | 信号入り磁気テープ |
| JPH05335301A (ja) * | 1992-06-03 | 1993-12-17 | Oki Electric Ind Co Ltd | シリコン酸化膜の形成方法 |
| JPH07193072A (ja) * | 1993-12-27 | 1995-07-28 | Nec Corp | 半導体基板の製造方法 |
| JPH1098047A (ja) * | 1996-09-12 | 1998-04-14 | Wacker Siltronic G Fuer Halbleitermaterialien Ag | 低欠陥密度を有するシリコン半導体ウエハの製造方法 |
| JPH1140512A (ja) * | 1997-07-22 | 1999-02-12 | Komatsu Denshi Kinzoku Kk | 半導体基板の製造方法 |
| JP2001223220A (ja) * | 2000-02-08 | 2001-08-17 | Mitsubishi Materials Silicon Corp | 半導体ウェーハの熱処理方法及び半導体ウェーハ |
Non-Patent Citations (1)
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Also Published As
| Publication number | Publication date |
|---|---|
| EP1786023B1 (en) | 2011-11-16 |
| JP4706199B2 (ja) | 2011-06-22 |
| TW200608515A (en) | 2006-03-01 |
| JP2006032752A (ja) | 2006-02-02 |
| CN1989592A (zh) | 2007-06-27 |
| TWI270959B (en) | 2007-01-11 |
| US7560363B2 (en) | 2009-07-14 |
| EP1786023A4 (en) | 2008-08-13 |
| EP1786023A1 (en) | 2007-05-16 |
| KR20070032823A (ko) | 2007-03-22 |
| US20080090384A1 (en) | 2008-04-17 |
| CN100501922C (zh) | 2009-06-17 |
| KR100834231B1 (ko) | 2008-05-30 |
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