WO2006060983A3 - Verfahren zum aufbringen einer klebstoffschicht auf dünngeschliffene halbleiterchips eines halbleiterwafers - Google Patents

Verfahren zum aufbringen einer klebstoffschicht auf dünngeschliffene halbleiterchips eines halbleiterwafers Download PDF

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Publication number
WO2006060983A3
WO2006060983A3 PCT/DE2005/002116 DE2005002116W WO2006060983A3 WO 2006060983 A3 WO2006060983 A3 WO 2006060983A3 DE 2005002116 W DE2005002116 W DE 2005002116W WO 2006060983 A3 WO2006060983 A3 WO 2006060983A3
Authority
WO
WIPO (PCT)
Prior art keywords
adhesive layer
applying
semiconductor
semiconductor chips
semiconductor wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/DE2005/002116
Other languages
English (en)
French (fr)
Other versions
WO2006060983A2 (de
Inventor
Simon Jerebic
Peter Strobel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to US11/721,067 priority Critical patent/US20100051190A1/en
Publication of WO2006060983A2 publication Critical patent/WO2006060983A2/de
Publication of WO2006060983A3 publication Critical patent/WO2006060983A3/de
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0442—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7412—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • H10P72/7414—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support the auxiliary support including means facilitating the selective separation of some of a plurality of devices from the auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/743—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H10W72/01331—Manufacture or treatment of die-attach connectors using blanket deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • H10W72/07338—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy hardening the adhesive by curing, e.g. thermosetting

Landscapes

  • Mechanical Treatment Of Semiconductor (AREA)
  • Dicing (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

Die Erfindung betrifft ein Verfahren zum Aufbringen einer Klebstoffschicht (1) auf dünngeschliffene bzw. gedünnte Halbleiterchips (2) eines Halbleiterwafers (3). Dabei wird die Klebstoffschicht (1) mit Hilfe einer Klebstofffolie (4), die vollständig aus vorhärtbarem Klebstoff (10) aufgebaut ist, relativ früh in ein Verfahren zum Dünnschleifen, Trennen und Vereinzeln eines Halbleiterwafers zu gedünnten Halbleiterchips (2) eingebracht und schließlich in dem Halbleiterbauteil, in das der gedünnte Halbleiterchip (2) einzubauen ist, weiterverwendet.
PCT/DE2005/002116 2004-12-09 2005-11-23 Verfahren zum aufbringen einer klebstoffschicht auf dünngeschliffene halbleiterchips eines halbleiterwafers Ceased WO2006060983A2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US11/721,067 US20100051190A1 (en) 2004-12-09 2005-11-23 Method for applying an adhesive layer on thin cut semiconductor chips of semiconductor wafers

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102004059599A DE102004059599B3 (de) 2004-12-09 2004-12-09 Verfahren zum Aufbringen einer Klebstoffschicht auf dünngeschliffene Halbleiterchips eines Halbleiterwafers
DE102004059599.2 2004-12-09

Publications (2)

Publication Number Publication Date
WO2006060983A2 WO2006060983A2 (de) 2006-06-15
WO2006060983A3 true WO2006060983A3 (de) 2006-09-21

Family

ID=36578263

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2005/002116 Ceased WO2006060983A2 (de) 2004-12-09 2005-11-23 Verfahren zum aufbringen einer klebstoffschicht auf dünngeschliffene halbleiterchips eines halbleiterwafers

Country Status (3)

Country Link
US (1) US20100051190A1 (de)
DE (1) DE102004059599B3 (de)
WO (1) WO2006060983A2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7879691B2 (en) 2008-09-24 2011-02-01 Eastman Kodak Company Low cost die placement
JP2015119085A (ja) * 2013-12-19 2015-06-25 株式会社ディスコ デバイスウェーハの加工方法
US10150898B2 (en) 2014-05-28 2018-12-11 Xerox Corporation Use of epoxy film adhesive with high ink compatibility and thermal oxidative stability for printhead interstitial bonding in high density printheads
US9890306B2 (en) * 2014-05-28 2018-02-13 Xerox Corporation Use of epoxy film adhesive with high ink compatibility and thermal oxidative stability for printhead interstitial bonding in in high density printheads
TWI557831B (zh) * 2015-05-15 2016-11-11 友達光電股份有限公司 微組件的傳送方法
DE102018200656A1 (de) * 2018-01-16 2019-07-18 Disco Corporation Verfahren zum Bearbeiten eines Wafers
DE102018128616A1 (de) * 2018-06-24 2019-12-24 Besi Switzerland Ag Vorrichtung und Verfahren zum Ablösen eines Chips von einer Klebefolie
JP7623821B2 (ja) * 2020-11-09 2025-01-29 株式会社ディスコ ウエーハの加工方法及びレーザー加工装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61210650A (ja) * 1985-03-15 1986-09-18 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPH09283469A (ja) * 1996-04-17 1997-10-31 Matsushita Electron Corp 半導体装置の製造方法
JPH1126406A (ja) * 1997-07-01 1999-01-29 Lintec Corp ウエハ研削方法
JP2003324112A (ja) * 2002-04-30 2003-11-14 Lintec Corp 半導体装置の製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0715087B2 (ja) * 1988-07-21 1995-02-22 リンテック株式会社 粘接着テープおよびその使用方法
GB2263195B (en) * 1992-01-08 1996-03-20 Murata Manufacturing Co Component supply method
DE19921230B4 (de) * 1999-05-07 2009-04-02 Giesecke & Devrient Gmbh Verfahren zum Handhaben von gedünnten Chips zum Einbringen in Chipkarten
US6391220B1 (en) * 1999-08-18 2002-05-21 Fujitsu Limited, Inc. Methods for fabricating flexible circuit structures
DE10008273A1 (de) * 2000-02-23 2001-08-30 Bosch Gmbh Robert Verfahren und Vorrichtung zur Montage von durch Vereinzelung aus einem Rohstück erzeugbaren Kleinbauelementen auf einen Träger
JP3906962B2 (ja) * 2000-08-31 2007-04-18 リンテック株式会社 半導体装置の製造方法
DE10048881A1 (de) * 2000-09-29 2002-03-07 Infineon Technologies Ag Vorrichtung und Verfahren zum planen Verbinden zweier Wafer für ein Dünnschleifen und ein Trennen eines Produkt-Wafers
DE10159974C1 (de) * 2001-12-06 2003-10-23 Infineon Technologies Ag Halbleiterchip-Montageanlage mit einem Saugnippel zur Abnahme eines Halbleiterchips

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61210650A (ja) * 1985-03-15 1986-09-18 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPH09283469A (ja) * 1996-04-17 1997-10-31 Matsushita Electron Corp 半導体装置の製造方法
JPH1126406A (ja) * 1997-07-01 1999-01-29 Lintec Corp ウエハ研削方法
JP2003324112A (ja) * 2002-04-30 2003-11-14 Lintec Corp 半導体装置の製造方法

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 011, no. 046 (E - 479) 12 February 1987 (1987-02-12) *
PATENT ABSTRACTS OF JAPAN vol. 1998, no. 02 30 January 1998 (1998-01-30) *
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 04 30 April 1999 (1999-04-30) *
PATENT ABSTRACTS OF JAPAN vol. 2003, no. 12 5 December 2003 (2003-12-05) *

Also Published As

Publication number Publication date
DE102004059599B3 (de) 2006-08-17
WO2006060983A2 (de) 2006-06-15
US20100051190A1 (en) 2010-03-04

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