WO2009031856A2 - Boîtier de dispositif électroluminescent et son procédé de réalisation - Google Patents

Boîtier de dispositif électroluminescent et son procédé de réalisation Download PDF

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Publication number
WO2009031856A2
WO2009031856A2 PCT/KR2008/005264 KR2008005264W WO2009031856A2 WO 2009031856 A2 WO2009031856 A2 WO 2009031856A2 KR 2008005264 W KR2008005264 W KR 2008005264W WO 2009031856 A2 WO2009031856 A2 WO 2009031856A2
Authority
WO
WIPO (PCT)
Prior art keywords
layer
emitting device
light emitting
package body
cavity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2008/005264
Other languages
English (en)
Other versions
WO2009031856A3 (fr
Inventor
Bum Chul Cho
Geun Ho Kim
Sung Jin Son
Jin Soo Park
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LG Innotek Co Ltd
Original Assignee
LG Innotek Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LG Innotek Co Ltd filed Critical LG Innotek Co Ltd
Priority to CN200880105925.5A priority Critical patent/CN101796659B/zh
Priority to EP08793723.1A priority patent/EP2191518B1/fr
Priority to US12/676,850 priority patent/US8203163B2/en
Priority to JP2010523954A priority patent/JP5154649B2/ja
Publication of WO2009031856A2 publication Critical patent/WO2009031856A2/fr
Publication of WO2009031856A3 publication Critical patent/WO2009031856A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/8506—Containers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0364—Manufacture or treatment of packages of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • H10W72/07554—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires

Definitions

  • Embodiments relate to a light emitting device package and a method of fabricating the same.
  • a light emitting diode constitutes a light emitting source using GaAs series
  • AlGaAs series GaN series, InGaN series, or InGaAlP series compound semiconductor materials.
  • This LED is packaged and used as a light emitting device for emitting various colors, and the light emitting device is used as a light source in various fields such as an on/off display for displaying colors, an alphanumeric display, and an image display. Disclosure of Invention Technical Problem
  • Embodiments provide a light emitting device package capable of improving the soldering characteristic and light intensity of a package and a method of fabricating the same.
  • Embodiments also provide a light emitting device package capable of preventing resin material from overflowing toward the outside through an upper projection of a package body such that work yield deterioration due to the resin material can be avoided, and a method of fabricating the same.
  • An embodiment provides a light emitting device package comprising: a package body comprising a cavity; a seed layer on a surface of the package body; a conductive layer on the seed layer; a mirror layer on the conductive layer; and a light emitting device in the cavity.
  • a method of fabricating a light emitting device package comprising: forming a cavity with a predetermined depth in a package body; forming a seed layer on a surface of the package body; forming a plated layer on the seed layer at an outer circumference of the package body; forming a conductive layer on the seed layer in the cavity of the package body; electrically separating the seed layer, the plated layer, and the conductive layer by partially etching them; forming a mirror layer on the conductive layer; and mounting a light emitting device in the cavity.
  • Embodiments improve the soldering characteristic of a package.
  • Embodiments prevent resin material from overflowing through an upper projection of a package body and also prevent work yield deterioration due to resin material during soldering. [10] Embodiments improve the light intensity of a package.
  • Fig. 1 is a cross-sectional view of a light emitting device package according to an embodiment.
  • Figs. 2 to 8 are views illustrating a method of fabricating a light emitting device package according to an embodiment.
  • Fig. 9 is a flowchart illustrating a process of forming a metal layer on a package body according to an embodiment.
  • Fig. 1 is a cross-sectional view of a light emitting device package according to an embodiment.
  • a light emitting device package 100 is a silicon-based wafer level package (WLP) and uses a polyhedral (e.g., rectangular parallelepiped) package frame
  • a cavity 111 is formed in the top of the package body 110.
  • the cavity 111 may be realized with any one of a tube with an inner space, a polygonal groove, and a circular groove.
  • An inner side 114 of the cavity 111 is formed slanted at a predetermined angle or with a predetermined curvature.
  • a top 115 of the package body 110 is formed on the outside of the cavity 111, and a body side 116 is curved at a predetermined angle to be slanted toward the top and bottom directions but is not limited thereto.
  • a seed layer 122 is formed on an entire surface of the package body 110 except for open regions 131 and 132.
  • the seed layer 122 comprises a sequentially-stacked Ti layer/Cu layer or a sequentially- stacked Ti layer/Cu layer/Ti layer.
  • the seed layer 122 improves adhesiveness with respect to the package body 110, and also between other metal layers (e.g., comprising a conductive layer and a plated layer).
  • the seed layer 122 may be formed with a thickness of 1000 Ato 7000 A.
  • a plated layer 124 is formed on the seed layer 122 at the outer circumference of the package body 110.
  • the outer circumference of the package body 110 comprises the outers of a portion of the rear 118, the side 116, and the top 115 of the package body 110.
  • the plated layer 124 is formed with a thick layer through a plating method (e.g., an electrolytic or electroless plating method), such that soldering characteristic during a surface mount technology (SMT) process can be improved.
  • the plated layer 124 is formed with a thickness of 1.5 ⁇ m to 2.0 ⁇ m, for example.
  • the plated layer 124 can be formed with a multilayer comprising Cu, Ni, Au, and Ti on the seed layer 122 and, for example, comprises a sequentially- stacked Cu layer/Ni layer/ Au layer or a sequentially-stacked Ti layer/Cu layer/Ni layer/Au layer.
  • end portions 124a and 124b of the plated layer 124 are formed extending to the top 115 of the package body 110.
  • the conductive layer 126 is formed on the seed layer 122 at the cavity 111 of the package body 110.
  • the conductive layer 126 is formed extending to a bottom 112, the inner side 114, and the body top 115 of the cavity 111.
  • the conductive layer 126 is formed with a multilayer comprising Cu, Ni, Au, and Ti and, for example, comprises a sequentially-stacked Cu layer/Ni layer/Au layer or a sequentially-stacked Ti layer/Cu layer/Ni layer/Au layer.
  • end portions 126a and 126b of the conductive layer 126 extends on the end portions 124a and 124b at the body top 115 and protrudes with a projection form.
  • the end portions 126a and 126b of the conductive layer 126 prevents resin material 150 molded in the cavity 111 from overflowing, and also foreign materials from inflowing through the body side 116. Because the resin material 150 is prevented from overflowing toward the outside of the package body 110, work yield deterioration due to the resin material 150 can be avoided during the soldering of the light emitting device package 100.
  • the conductive layer 126 is formed thicker than other layers, for example, with a thickness of 1000 A to 7000 A.
  • the conductive layer 126 can improve electrical characteristic.
  • a mirror layer 128 is formed on the conductive layer 126.
  • the mirror layer 128 selectively comprises a sequentially-stacked Ti layer/ Ag layer, a sequentially- stacked Ti layer/ Al layer, an alloy of Ti and Ag, and an alloy of Ti and Al, on the conductive layer 126.
  • the mirror layer 128 is formed with a thickness of 1000 A to 4000 A, for example. Additionally, because the mirror layer 128 is formed on the conductive layer 126, metal materials can be prevented from peeling off.
  • the mirror layer 128 improves a reflected amount of the light generated from a light emitting device 140 such that the light intensity of the light emitting device package 100 can be improved.
  • the seed layer 122, the conductive layer 126, and the mirror layer 128 of the package body 110 may be deposited using an electron beam deposition method or/and a sputtering method.
  • At least one light emitting device 140 is mounted in the cavity 111 of the package body 110, and the light emitting device 140 may comprise colored LED chips such as a blue LED chip, a green LED chip, and a red LED chip, or a UV LED chip.
  • the light emitting device 140 is mounted on an electrode terminal of the cavity 111.
  • the mirror layer 128 and the conductive layer 126 formed on the bottom 112 of the cavity 111 may be used as an electrode terminal.
  • the electrode terminal in the cavity 111 is electrically connected to a portion of the rear 118 along the side 116 of the package body 110.
  • the first open region 131 is formed in the cavity 111 and the first open region 131 divides the seed layer 122, the conductive layer 126, and the mirror layer 128 into a plurality of areas.
  • the second open region 132 is formed at the rear 118 of the package body 110, and the second open region 132 divides the seed layer 122 and the plated layer 124 into a plurality of regions. That is, the first and second open regions 131 and 132 divide the electrode terminal into a plurality of electrode terminals.
  • the light emitting device 140 can be connected to the electrode terminal through a wire 142 or a flip chip method, but is not limited thereto.
  • An arrangement structure of the electrode terminal may vary based on the number of LED chips and a design method, but is not limited thereto.
  • the resin material 150 of a transparent resin material is molded in the cavity 111 and protects the light emitting device 140.
  • the resin material 150 is formed of transparent epoxy or silicon material and at least one of red, green blue fluorescent substances may be added to the resin material 150, but is not limited thereto.
  • FIGs. 2 to 8 are views illustrating a method of fabricating a light emitting device package according to an embodiment.
  • Fig. 9 is a flowchart illustrating a process of forming a metal layer on a package body according to an embodiment.
  • the cavity 111 is formed with a predetermined depth in the top of the package body 110.
  • the cavity 111 may be formed with a predetermined depth by etching the middle top of the package body 110.
  • the package body 110 is a silicon wafer.
  • the seed layer 122 is deposited on the entire surfaces 112, 114, 116, and 118 of the package body 110 in operation SlOl of Fig. 9.
  • the seed layer 122 improves adhesiveness with respect to the package body 110, and also between other metal layers.
  • the seed layer 122 may be formed with a thickness of 1000 Ato 7000 A, for example.
  • a first mask pattern Ml is formed on the seed layer 122 on top of the package body 110 in operation S 103 of Fig. 9.
  • the first mask pattern Ml is formed on the bottom 112 and the inner side 114 of the cavity 111 and a portion of the body top 115 through a photo-lithography method.
  • the plated layer 124 is deposited on the seed layer 122 at the outer circumference of the package body 110, i.e., an area except for the first mask pattern Ml.
  • the plated layer 124 may be formed with a multilayer comprising Cu, Ni, Au, and Ti on the seed layer 122, and, for example, comprises a sequentially-stacked Cu layer/Ni layer/ Au layer or a sequentially-stacked Ti layer/Cu layer/Ni layer/Au layer.
  • the plated layer 124 is formed with a thickness of 1.5 ⁇ m to 2.0 ⁇ m, for example. If the upper most layer of the seed layer 122 is a Ti layer, a Cu layer of the plated layer 124 may be formed after etching it.
  • the plated layer 124 is formed with a thick layer through a plating method such that soldering characteristic can be improved during a SMT process.
  • a second mask pattern M2 is formed in operation S 109 of Fig. 9.
  • the second mask pattern M2 is formed at the outer circumference of the package body 110, i.e., the outers of the body top 115, the body side 116, and the rear 118, through a photolithography method.
  • the conductive layer 126 is formed on the seed layer 122 in an area except for the second mask pattern M2 in operation Si l l of Fig. 9.
  • the conductive layer 126 extends from the inner circumference of the cavity 111 to the body top 115.
  • the end portions 126a and 126b of the conductive layer 126 on the body top 115 are formed on the end portions 124a and 124b of the plated layer 124.
  • the conductive layer 126 comprises a sequentially- stacked Cu layer/Ni layer/Au layer or a sequentially-stacked Ti layer/Cu layer/Ni layer/Au layer, on the seed layer
  • the conductive layer 126 is formed with a thickness of 1000 A to 7000 A, and the Ni layer or the Au layer may be formed with a thickness of 100 A to 3000 A.
  • the Au layer prevents the conductive layer 126 from being damaged by an impact or friction.
  • the conductive layer 126 is formed with a multi-metal layer, it can improve electrical characteristics. Moreover, since the end portions 126a and 126b of the conductive layer 126 protrude with a projection form on the body top 115, the resin material 150 filled in the cavity 111 can be prevented from overflowing. The resin material 150 may be molded into the cavity 111 through a dispensing process after mounting a light emitting device.
  • the second mask pattern M2 is removed in operation Sl 13 of Fig. 9, and then the first open region 131 is formed by etching the inner cir- cumference of the cavity 111 and the second open region 132 is formed by etching the body rear 118 in operation Sl 15 of Fig. 9. Because the first and second open regions 131 and 132 are etched up to the seed layer 122, at least two electrode terminals are disposed with an open structure on the both sides of the cavity 111.
  • a third mask pattern M3 can be formed on the outer circumference of the package body 110 in operation Sl 17 of Fig. 9.
  • the third mask pattern M3 can be formed through a photo-lithography method.
  • the third mask pattern M3 is formed on a upper portion of the plated layer 124, the end portions 126a and 126b of the conductive layer 126.
  • the third mask pattern M3 can be formed in a part among the end portions 126a and 126b of the conductive layer 126, on the plated layer 124, the first open region 131 of the cavity bottom 112, and the second open region 132 of the body rear 118 at least.
  • the mirror layer 128 is formed on the conductive layer 126 where no third mask pattern M3 is formed in operation Sl 19 of Fig. 9.
  • the mirror 128 comprises a sequentially-stacked Ti layer/ Ag layer, a sequentially stacked Ti layer/ Al layer, or an alloy of Ti and Al, on the conductive layer 126.
  • the mirror layer 128 is formed with a thickness of 1000 A to 4000 A.
  • a luminous efficiency of LED chip can increase.
  • an end portion of the mirror layer 128 can be formed on an end portion of the conductive layer 126 but is not limited thereto.
  • a process for forming the mirror layer 128 can be performed before forming the first and second open regions 131 and 132.
  • the light emitting device 140 is attached to the mirror layer 128 through an adhesive and then is electrically connected to the mirror layer 128 and the conductive layer 126 through the wire 142.
  • the light emitting device 140 may be connected through a flip method or a die attachment method.
  • the light emitting device 140 may comprise colored LED chips such as a blue LED chip, a green LED chip, and a red LED chip, or a UV LED chip.
  • the resin material 150 that light transmits or the resin material 150 to which at least one kind of a fluorescent substance is added is molded in the cavity 111. Additionally, a convex lens can be attached on the resin material 150.
  • Embodiments are used as a light emitting device package comprising an LED.
  • Embodiments are used as a light emitting device package of a silicon wafer.
  • Embodiments are used as a light source in various fields such as an on/off display, an alphanumeric display, and an image display by the use of a wafer level package

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  • Led Device Packages (AREA)
  • Knitting Machines (AREA)

Abstract

L'invention concerne un boîtier de dispositif électroluminescent et son procédé de réalisation. Ce boîtier de dispositif électroluminescent comprend un corps de boîtier présentant une cavité, une couche germe appliquée sur une surface du corps de boîtier, une couche conductrice appliquée sur la couche germe, une couche mirroir appliquée sur la couche conductrice et un dispositif électroluminescent monté dans la cavité.
PCT/KR2008/005264 2007-09-06 2008-09-05 Boîtier de dispositif électroluminescent et son procédé de réalisation Ceased WO2009031856A2 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN200880105925.5A CN101796659B (zh) 2007-09-06 2008-09-05 发光器件封装及其制造方法
EP08793723.1A EP2191518B1 (fr) 2007-09-06 2008-09-05 Boîtier de dispositif électroluminescent et son procédé de réalisation
US12/676,850 US8203163B2 (en) 2007-09-06 2008-09-05 Lighting emitting device package and method of fabricating the same including a plating layer at an outer circumference of the package body
JP2010523954A JP5154649B2 (ja) 2007-09-06 2008-09-05 発光デバイスパッケージ及びその製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2007-0090321 2007-09-06
KR1020070090321A KR100877881B1 (ko) 2007-09-06 2007-09-06 발광다이오드 패키지 및 그 제조방법

Publications (2)

Publication Number Publication Date
WO2009031856A2 true WO2009031856A2 (fr) 2009-03-12
WO2009031856A3 WO2009031856A3 (fr) 2009-05-07

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PCT/KR2008/005264 Ceased WO2009031856A2 (fr) 2007-09-06 2008-09-05 Boîtier de dispositif électroluminescent et son procédé de réalisation

Country Status (6)

Country Link
US (1) US8203163B2 (fr)
EP (1) EP2191518B1 (fr)
JP (1) JP5154649B2 (fr)
KR (1) KR100877881B1 (fr)
CN (1) CN101796659B (fr)
WO (1) WO2009031856A2 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110198653A1 (en) * 2010-04-28 2011-08-18 Bum Chul Cho Light emitting device package and lighting system having the same

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101045708B1 (ko) * 2009-03-13 2011-06-30 안복만 발광소자 패키지 제조방법 및 그에 따른 발광소자 패키지
KR101091304B1 (ko) * 2010-01-20 2011-12-07 엘지이노텍 주식회사 발광 소자 패키지 및 그 제조방법
KR101628381B1 (ko) * 2010-02-17 2016-06-08 엘지이노텍 주식회사 발광 소자 패키지 및 그 제조방법
WO2011122665A1 (fr) 2010-03-30 2011-10-06 大日本印刷株式会社 Conducteur-poutre ou substrat destiné à une diode électroluminescente, dispositif à semi-conducteur et procédé de fabrication de conducteur-poutre ou de substrat destiné à une diode électroluminescente
JP5857355B2 (ja) * 2010-09-16 2016-02-10 Ｓｈマテリアル株式会社 半導体発光素子搭載用基板、及びそれを用いた半導体発光装置
CN102403437A (zh) * 2010-09-16 2012-04-04 日立电线株式会社 半导体发光元件搭载用基板以及使用其的半导体发光装置
US8933548B2 (en) 2010-11-02 2015-01-13 Dai Nippon Printing Co., Ltd. Lead frame for mounting LED elements, lead frame with resin, method for manufacturing semiconductor devices, and lead frame for mounting semiconductor elements
US8907319B2 (en) * 2011-12-12 2014-12-09 Lg Innotek Co., Ltd. Light emitting device package
JP6482785B2 (ja) * 2014-07-28 2019-03-13 ローム株式会社 半導体装置および半導体装置の製造方法
KR102463880B1 (ko) * 2015-10-13 2022-11-04 쑤저우 레킨 세미컨덕터 컴퍼니 리미티드 발광소자 패키지
CN109873072B (zh) * 2017-12-01 2021-09-21 光宝科技新加坡私人有限公司 发光装置、发光二极管封装结构及其制造方法
TWI647868B (zh) * 2017-12-01 2019-01-11 新加坡商光寶新加坡有限公司 改良的發光裝置及其製造方法、改良的發光二極體封裝結構及其製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05102531A (ja) 1991-10-08 1993-04-23 Sharp Corp チツプ部品型発光ダイオード
JP2003031914A (ja) 2001-07-18 2003-01-31 Hitachi Aic Inc プリント配線板およびその製造方法
US20050051789A1 (en) 2003-09-09 2005-03-10 Negley Gerald H. Solid metal block mounting substrates for semiconductor light emitting devices, and oxidizing methods for fabricating same
EP1876653A2 (fr) 2006-07-07 2008-01-09 LG Electronics Inc. Sous-montage pour le montage d'un dispositif électroluminescent et emballage de dispositif électroluminescent

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02296064A (ja) 1989-05-11 1990-12-06 Nissan Motor Co Ltd 車両の自動変速制御装置
JPH02298084A (ja) * 1989-05-12 1990-12-10 Matsushita Electric Ind Co Ltd 発光ダイオード素子の封止方法
US6706546B2 (en) * 1998-10-09 2004-03-16 Fujitsu Limited Optical reflective structures and method for making
JP4163932B2 (ja) 2002-10-28 2008-10-08 京セラ株式会社 発光素子収納用パッケージおよび発光装置
WO2004049462A1 (fr) * 2002-11-26 2004-06-10 Stockeryale, (Irl), Limited Dispositif d'eclairage et procede de fabrication
AT501081B8 (de) * 2003-07-11 2007-02-15 Tridonic Optoelectronics Gmbh Led sowie led-lichtquelle
JP4572312B2 (ja) * 2004-02-23 2010-11-04 スタンレー電気株式会社 Ｌｅｄ及びその製造方法
KR100631521B1 (ko) * 2004-04-17 2006-10-11 엘지전자 주식회사 발광 장치 와 그의 제조방법
KR101154801B1 (ko) * 2004-12-03 2012-07-03 엔지케이 스파크 플러그 캄파니 리미티드 세라믹 기판 및 발광 소자 수납용 세라믹 패키지
US7411225B2 (en) * 2005-03-21 2008-08-12 Lg Electronics Inc. Light source apparatus
JP4452216B2 (ja) 2005-06-29 2010-04-21 日本特殊陶業株式会社 発光素子用セラミックパッケージ及びその製造方法
KR100667504B1 (ko) * 2005-06-29 2007-01-10 엘지전자 주식회사 발광 소자의 패키지 및 그의 제조 방법
JP2007134602A (ja) 2005-11-11 2007-05-31 Stanley Electric Co Ltd 表面実装型半導体発光装置
KR100746783B1 (ko) * 2006-02-28 2007-08-06 엘지전자 주식회사 발광소자 패키지 및 그 제조방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05102531A (ja) 1991-10-08 1993-04-23 Sharp Corp チツプ部品型発光ダイオード
JP2003031914A (ja) 2001-07-18 2003-01-31 Hitachi Aic Inc プリント配線板およびその製造方法
US20050051789A1 (en) 2003-09-09 2005-03-10 Negley Gerald H. Solid metal block mounting substrates for semiconductor light emitting devices, and oxidizing methods for fabricating same
EP1876653A2 (fr) 2006-07-07 2008-01-09 LG Electronics Inc. Sous-montage pour le montage d'un dispositif électroluminescent et emballage de dispositif électroluminescent

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP2191518A4

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110198653A1 (en) * 2010-04-28 2011-08-18 Bum Chul Cho Light emitting device package and lighting system having the same
US8680552B2 (en) * 2010-04-28 2014-03-25 Lg Innotek Co., Ltd. Light emitting device package including light emitting diode, and lighting system having the same

Also Published As

Publication number Publication date
KR100877881B1 (ko) 2009-01-08
WO2009031856A3 (fr) 2009-05-07
CN101796659A (zh) 2010-08-04
US20110309391A1 (en) 2011-12-22
EP2191518A4 (fr) 2013-10-23
EP2191518A2 (fr) 2010-06-02
EP2191518B1 (fr) 2016-06-15
CN101796659B (zh) 2012-09-19
US8203163B2 (en) 2012-06-19
JP2010538490A (ja) 2010-12-09
JP5154649B2 (ja) 2013-02-27

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