WO2009094575A2 - Isolation d'isolant enterré pour contacts de cellule solaire - Google Patents

Isolation d'isolant enterré pour contacts de cellule solaire Download PDF

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Publication number
WO2009094575A2
WO2009094575A2 PCT/US2009/031882 US2009031882W WO2009094575A2 WO 2009094575 A2 WO2009094575 A2 WO 2009094575A2 US 2009031882 W US2009031882 W US 2009031882W WO 2009094575 A2 WO2009094575 A2 WO 2009094575A2
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WIPO (PCT)
Prior art keywords
solar cell
insulating layer
emitter
substrate
pct
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
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PCT/US2009/031882
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English (en)
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WO2009094575A3 (fr
Inventor
Peter Borden
Li Xu
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Applied Materials Inc
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Applied Materials Inc
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Publication date
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Publication of WO2009094575A3 publication Critical patent/WO2009094575A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/12—Photovoltaic cells having only metal-insulator-semiconductor [MIS] potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/20—Electrodes
    • H10F77/206—Electrodes for devices having potential barriers
    • H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to forming contacts in a semiconductor device, and more particularly to methods and apparatuses for providing a buried insulator isolation for polysilicon emitter solar cell contacts.
  • SRV which is the rate of minority carrier recombination at the surface.
  • ⁇ 100 cm/sec provides a well passivated surface needed for a high efficiency cells.
  • a metal contact will have an SRV of 10 7 cm/sec, five orders of magnitude higher. If the metal covers 3% of the surface, then the effective surface recombination velocity is 3x10 5 cm/sec, more than 3 orders of magnitude larger than desired. Therefore, contact passivation is essential.
  • FIG. 1 One well known method to isolate the contacts from the bulk is to use a selective emitter, shown in FIG. 1. As shown in FIG. 1, the area away from the contacts 102 has a shallow emitter diffusion 106 (n-type, typically with Phosphorous doping, on a p-type substrate, for example). The shallow emitter 106 provides good blue response, as blue
  • photons are absorbed near the surface.
  • This emitter might be 0.3 to 0.5 ⁇ m thick.
  • deep diffusions 108 - 2-3 ⁇ m thick - are placed under the contacts.
  • Another method to passivate contacts is to place a thin tunnel oxide - typically
  • the present invention relates to methods and apparatuses for providing a buried insulator isolation for solar cell contacts.
  • the invention places a buried oxide under the emitter of a polysilicon emitter solar cell.
  • the oxide provides an excellent passivation layer over most of the surface. Holes in the oxide provide contact areas, increasing the current density to enhance efficiency.
  • the oxide isolates the contacts from the substrate, achieving the advantage of a selective emitter structure without requiring deep diffusions.
  • the oxide further enables use of screen printing on advanced shallow emitter cells. Positioning of the grid lines close to the openings also enables use of a very thin emitter to maximize blue response.
  • a solar cell includes an emitter layer formed on a semiconductor substrate; and an insulating layer between the emitter layer and a surface of the substrate, the insulating layer being patterned to include contact holes that allow current flow therethrough.
  • a method of fabricating a solar cell includes forming an insulating layer on a surface of a semiconductor substrate; patterning contact holes in the insulating layer that allow current flow therethrough; and forming an emitter layer on the insulating layer.
  • FIG. 1 shows a prior art selective emitter cell.
  • FIG. 2 shows a buried oxide cell structure according to embodiments of the invention.
  • FIG. 3 shows aspects of the operation of a buried oxide cell with an offset contact structure according to embodiments of the invention.
  • FIG. 4 is a flowchart showing an example buried oxide cell process flow according to embodiments of the invention.
  • the invention provides a buried oxide under the emitter of a polysilicon emitter solar cell.
  • the oxide provides an excellent passivation layer over most of the surface. Holes in the oxide provide contact areas, increasing the current density to enhance efficiency.
  • the oxide isolates the contacts from the substrate, achieving the advantage of a selective emitter structure without requiring deep diffusions.
  • the present inventors recognize that a point contact solar cell provides improved efficiency. This is because the current flow is concentrated into a small region, providing a higher current density.
  • the open circuit voltage Voc is given by the equation:
  • V 0 C kT/q In (JJJ 0 + J) Filed January 23, 2009 with PCT EFS
  • FIG. 2 shows an example cell structure in accordance with embodiments of the invention.
  • the cell structure includes an insulating (e.g. oxide) layer 214 under the doped region 210 and the contact 202. This insulating layer 214 isolates the contact 202 from the substrate 200.
  • insulating e.g. oxide
  • the solar cell surface has very good passivation and a low surface recombination velocity, both in the field region 210 and under the contacts 202.
  • Contact holes 212 are provided in the insulating layer 212 to allow for photocurrent flow. In embodiments described in more detail below, contact holes 212 include a tunnel oxide. However, this is not necessary in all embodiments.
  • substrate 200 is comprised of silicon, and is low-doped with p- or n-type impurities.
  • contact hole should be construed broadly so as to relate to many types of openings through insulating layer 214 and many types of solar cell contacts.
  • the holes can provide for point contacts or they can provide for grid line contacts.
  • solar cell contacts will appreciate how the teachings of the invention can be applied to these and other various types of contacts and openings.
  • the contacts 202 are positioned approximately in the middle between two holes 212. Photocurrent flows through contact Filed January 23, 2009 with PCT EFS
  • Typical dimensions of the openings 212 can be 20 to 200 ⁇ m and spacing between openings 212 can be 1-5 mm. The ratio of the spacing to opening width provides the concentration, which is limited by series resistance due to current crowding at the contact holes. Concentration ratios on the order of 5 to 20 are typical.
  • the openings can be lines parallel to the contact grid lines, or holes of shape such as rectangles or circles. Larger openings can be patterned without lithography, using screen printing. Laser ablation can also be used.
  • the doped region 210 is formed using polysilicon, which may be deposited at a temperature on the order of 630 0 C and is in-situ doped. A short anneal at 1050 0 C for 30 seconds after deposition activates the dopants.
  • a thin tunnel oxide may be included between the substrate 200 and the polysilicon 210 in the contact holes 212. This oxide - typically 8 to 15A thick - provides passivation between the substrate and the polysilicon, while allowing for tunnel current flow.
  • the contact lines 202 are not centered with respect to the holes, but offset so as to be closer to respective holes 212, as shown in FIG. 3.
  • This path may be typically 50 to 200 ⁇ m long, so that the metal grid lines 202 are well isolated from the contact holes 212, but the series resistance between the contact and the hole is low because of the short path length.
  • This enables use of a thinner emitter layer 210 - on the order of 500 to IOOOA thick - reducing absorption of blue light in the emitter and improving blue response.
  • the buried oxide is preferably relatively thin so that it does not provide an optical element that reduces light transmission into the cell.
  • a thickness of 100 to 150A is adequate, although thinner layers may be used.
  • a thickness >2 ⁇ A is desirable, as thinner layers may support leakage through tunnel currents. This thickness provides some contrast, so that the contact hole position can be identified for alignment of the grid lines, but has a negligible affect on light transmission into the cell.
  • FIG. 4 shows an example embodiment of the process flow for fabricating a solar cell structure according to aspects of the invention.
  • the wafer is cleaned and the buried oxide formed, using a process such as thermal oxidation or RadOx® from Applied Materials.
  • the contact holes are formed. For example, an etch mask layer is screen printed on the cell and the buried oxide is etched in HF. The resist is then removed.
  • the wafer is then cleaned and, in one embodiment shown in FIG. 4, a tunnel oxide is grown in the contact holes using a process such as ISSG or Radox in the step S406. Another embodiment does not use the tunnel oxide, and processing advances directly
  • step S408 the doped polysilicon is then deposited. On p-type substrates, this is 500 to IOOOA of n-type poly, doped with either As or P for example. On n-type substrates, the layer is doped with B for example.
  • the antireflection coating is also deposited, which may be a 750A layer of silicon nitride.
  • step S412 the wafer is then annealed at 450 0 C for 30 minutes in forming gas to provide Filed January 23, 2009 with PCT EFS
  • step S414 holes are then patterned in the AR coating using screen printing and etching, for example.
  • Plating may be used to form Ni/Ag contacts, which are then annealed.
  • silver paste is screen printed on the AR coating and fired in, with the buried oxide blocking the fired paste from reaching the substrate.
  • the described structure may be formed on the front of the cell. In an alternate embodiment, it is formed on the back of the cell. This is advantageous if the front of the cell has a texture, as the structure can be made on a planar surface.
  • the textured surface exposes the ⁇ 1 11> plane which has a higher atom density than the ⁇ 100> plane and also has 1.7 times of the area of planar surface.
  • the textured surface has a higher SRV than planar surface and is more difficult to passivate. It is desirable to form such structures on the planar surface on the back of the cell.
  • the opposite side of the cell also requires a contact structure.
  • aluminum is deposited on the back and fired in using a laser to form laser fired contacts, which are well known in the prior art.
  • the front structure is repeated on the back, using polysilicon with the same doping type as the substrate.
  • the cell operates in forward bias. For example, if the poly layer is p-type and the substrate is n-type, then the poly layer is positive with respect to the substrate. Therefore, the surface will be accumulated (high electron concentration). This provides a means to passivate the surface, as holes will not be present, and both holes and electrons are needed to recombine at interface traps.
  • the buried layer can be made of more than one material.
  • the nitride can provide charge and hydrogen, and can be an improved barrier to block metal atoms from diffusing from the contacts into the substrate when the contacts are annealed.

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  • Photovoltaic Devices (AREA)

Abstract

La présente invention concerne des procédés et appareils assurant une isolation d'isolant enterré pour des contacts de cellule solaire. Selon certains aspects, l'invention place un oxyde enterré sous l'émetteur d'une cellule solaire à émetteur de polysilicium. L'oxyde fournit une excellente couche de passivation sur la plupart de la surface. Des trous dans l'oxyde fournissent des zones de contact, ce qui augmente la densité de courant pour améliorer l'efficacité. L'oxyde isole les contacts du substrat, ce qui offre l'avantage d'une structure d'émetteur sélective sans nécessiter de diffusions en profondeur. L'oxyde permet en outre d'utiliser la sérigraphie sur des cellules d'émetteur creuses avancées. Le positionnement des lignes de grille à proximité des ouvertures permet également d'utiliser un émetteur très mince pour optimiser la réponse du bleu.
PCT/US2009/031882 2008-01-24 2009-01-23 Isolation d'isolant enterré pour contacts de cellule solaire Ceased WO2009094575A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US2335408P 2008-01-24 2008-01-24
US61/023,354 2008-01-24

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WO2009094575A2 true WO2009094575A2 (fr) 2009-07-30
WO2009094575A3 WO2009094575A3 (fr) 2009-09-24

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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7951696B2 (en) 2008-09-30 2011-05-31 Honeywell International Inc. Methods for simultaneously forming N-type and P-type doped regions using non-contact printing processes
US8053867B2 (en) 2008-08-20 2011-11-08 Honeywell International Inc. Phosphorous-comprising dopants and methods for forming phosphorous-doped regions in semiconductor substrates using phosphorous-comprising dopants
US8324089B2 (en) 2009-07-23 2012-12-04 Honeywell International Inc. Compositions for forming doped regions in semiconductor substrates, methods for fabricating such compositions, and methods for forming doped regions using such compositions
US8518170B2 (en) 2008-12-29 2013-08-27 Honeywell International Inc. Boron-comprising inks for forming boron-doped regions in semiconductor substrates using non-contact printing processes and methods for fabricating such boron-comprising inks
EP2507844A4 (fr) * 2009-12-01 2013-12-25 Sunpower Corp Formation de contacts de cellule solaire à l'aide d'une ablation par laser
US8629294B2 (en) 2011-08-25 2014-01-14 Honeywell International Inc. Borate esters, boron-comprising dopants, and methods of fabricating boron-comprising dopants
US8975170B2 (en) 2011-10-24 2015-03-10 Honeywell International Inc. Dopant ink compositions for forming doped regions in semiconductor substrates, and methods for fabricating dopant ink compositions
CN110931603A (zh) * 2019-12-11 2020-03-27 晶澳（扬州）太阳能科技有限公司 太阳能电池及其制备方法
EP3758071A1 (fr) * 2011-02-15 2020-12-30 SunPower Corporation Structures pour la fabrication de cellules solaires
EP4092757A1 (fr) * 2013-04-03 2022-11-23 Lg Electronics Inc. Procédé de fabrication d'une cellule solaire
US11735678B2 (en) 2019-03-29 2023-08-22 Maxeon Solar Pte. Ltd. Solar cells having hybrid architectures including differentiated p-type and n-type regions with offset contacts

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002222938A (ja) * 2001-01-25 2002-08-09 Rohm Co Ltd 半導体装置
TWI305927B (en) * 2001-03-29 2009-02-01 Toshiba Kk Semiconductor device and method of making the same
KR100600850B1 (ko) * 2002-08-20 2006-07-14 삼성에스디아이 주식회사 효율이 향상된 박막 실리콘 태양전지 및 그의 제조방법
JP2006237155A (ja) * 2005-02-23 2006-09-07 Matsushita Electric Ind Co Ltd バイポーラトランジスタ

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8053867B2 (en) 2008-08-20 2011-11-08 Honeywell International Inc. Phosphorous-comprising dopants and methods for forming phosphorous-doped regions in semiconductor substrates using phosphorous-comprising dopants
US7951696B2 (en) 2008-09-30 2011-05-31 Honeywell International Inc. Methods for simultaneously forming N-type and P-type doped regions using non-contact printing processes
US8518170B2 (en) 2008-12-29 2013-08-27 Honeywell International Inc. Boron-comprising inks for forming boron-doped regions in semiconductor substrates using non-contact printing processes and methods for fabricating such boron-comprising inks
US8324089B2 (en) 2009-07-23 2012-12-04 Honeywell International Inc. Compositions for forming doped regions in semiconductor substrates, methods for fabricating such compositions, and methods for forming doped regions using such compositions
EP3723141A1 (fr) * 2009-12-01 2020-10-14 SunPower Corporation Formation de contacts de cellule solaire à l'aide d'une ablation par laser
US20220029038A1 (en) * 2009-12-01 2022-01-27 Sunpower Corporation Solar cell contact formation using laser ablation
US12191404B2 (en) * 2009-12-01 2025-01-07 Maxeon Solar Pte. Ltd. Solar cell having conductive contacts in alignment with recast signatures
EP4300598A3 (fr) * 2009-12-01 2024-03-27 Maxeon Solar Pte. Ltd. Formation de contact de cellule solaire par ablation laser
EP2507844A4 (fr) * 2009-12-01 2013-12-25 Sunpower Corp Formation de contacts de cellule solaire à l'aide d'une ablation par laser
US11152518B2 (en) 2009-12-01 2021-10-19 Sunpower Corporation Solar cell having a plurality of conductive contacts
EP3758071A1 (fr) * 2011-02-15 2020-12-30 SunPower Corporation Structures pour la fabrication de cellules solaires
US11437528B2 (en) 2011-02-15 2022-09-06 Sunpower Corporation Process and structures for fabrication of solar cells
US8629294B2 (en) 2011-08-25 2014-01-14 Honeywell International Inc. Borate esters, boron-comprising dopants, and methods of fabricating boron-comprising dopants
US8975170B2 (en) 2011-10-24 2015-03-10 Honeywell International Inc. Dopant ink compositions for forming doped regions in semiconductor substrates, and methods for fabricating dopant ink compositions
EP4092757A1 (fr) * 2013-04-03 2022-11-23 Lg Electronics Inc. Procédé de fabrication d'une cellule solaire
US11735678B2 (en) 2019-03-29 2023-08-22 Maxeon Solar Pte. Ltd. Solar cells having hybrid architectures including differentiated p-type and n-type regions with offset contacts
US12230724B2 (en) 2019-03-29 2025-02-18 Maxeon Solar Pte. Ltd. Solar cells having hybrid architectures including differentiated p-type and n-type regions with offset contacts
US12563846B2 (en) 2019-03-29 2026-02-24 Maxeon Solar Pte. Ltd. Solar cells having hybrid architectures including differentiated p-type and n-type regions with offset contacts
CN110931603A (zh) * 2019-12-11 2020-03-27 晶澳（扬州）太阳能科技有限公司 太阳能电池及其制备方法

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Publication number Publication date
TW200947726A (en) 2009-11-16
WO2009094575A3 (fr) 2009-09-24

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