WO2019222330A2 - Substrats électroniques séparés sur un support souple ou rigide et procédés associés - Google Patents

Substrats électroniques séparés sur un support souple ou rigide et procédés associés Download PDF

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Publication number
WO2019222330A2
WO2019222330A2 PCT/US2019/032390 US2019032390W WO2019222330A2 WO 2019222330 A2 WO2019222330 A2 WO 2019222330A2 US 2019032390 W US2019032390 W US 2019032390W WO 2019222330 A2 WO2019222330 A2 WO 2019222330A2
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WIPO (PCT)
Prior art keywords
carrier
ceramic substrate
electronic substrates
roll
slabs
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
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PCT/US2019/032390
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English (en)
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WO2019222330A3 (fr
Inventor
Nagaraja Shashidhar
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Corning Inc
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Corning Inc
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Publication of WO2019222330A3 publication Critical patent/WO2019222330A3/fr
Anticipated expiration legal-status Critical
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistors, capacitors or inductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/007—Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0147—Carriers and holders
    • H05K2203/0156—Temporary polymeric carrier or foil, e.g. for processing or transferring
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1545—Continuous processing, i.e. involving rolls moving a band-like or solid carrier along a continuous production path
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0364—Manufacture or treatment of packages of interconnections

Definitions

  • the disclosure relates generally to a method for fabricating electronic substrates and, in particular, to a method of producing a strip of electronic substrates in a roll-to-roll format and to a method of continuously forming electronic substrates and attaching them in panels to a rigid carrier.
  • Individual electronic substrates having a polymeric substrate are often formed as part of a large group contained on a circular wafer, typically having a diameter in the range of 200 mm to 300 mm.
  • the group of electronic substrates comprising the wafer is then diced into the individual electronic substrates.
  • the electronic substrates are attached to a rolled strip for ease of dispensing at the consumer end.
  • embodiments of the disclosure relate to a method for creating a strip of electronic substrates.
  • a ribbon of ceramic substrate is provided in which the ceramic substrate defines a thickness of no more than 200 pm between a first outer surface and a second outer surface opposite of the first outer surface.
  • At least one via is formed through the thickness of the ceramic substrate.
  • a first conductive layer is applied to the first outer surface, and a second conductive layer is applied to the second outer surface such that electrical communication is established between the first conductive layer and the second conductive layer through the at least one via.
  • the steps of providing, forming, and applying are performed in a continuous fashion.
  • inventions of the disclosure relate to a roll of electronic substrates.
  • the roll includes a plurality of electronic substrates that each have a ceramic substrate.
  • the roll also includes a strip of polymeric carrier on which the plurality of electronic substrates are adhered.
  • Each ceramic substrate has a first thickness and a first flexural rigidity
  • the strip of polymeric carrier has a second thickness and a second flexural rigidity.
  • the first thickness is less than the second thickness
  • the first flexural rigidity is at least five times the second flexural rigidity.
  • inventions of the disclosure relate to a carrier system for electronic substrates.
  • the carrier system includes a carrier and a plurality of slabs attached to the carrier via an adhesive layer.
  • Each of the plurality of slabs includes a ceramic substrate having a thickness of less than 200 pm. Further, the plurality of slabs were singluated from a panel having a rectangular shape with at least one of a length or a width greater than 200 mm.
  • FIG. l is a strip of slabs for electronic substrates produced from a roll-to-roll fabrication method, according to an exemplary embodiment.
  • FIG. 2 is a top view of the strip of FIG. 1, according to an exemplary embodiment.
  • FIG. 3 is a flow diagram of a first roll-to-roll fabrication method for preparing the strip of slabs for electronic substrates, according to an exemplary embodiment.
  • FIG. 4 is a flow diagram of second roll-to-roll fabrication method for preparing the strip of slabs for electronic substrates, according to an exemplary embodiment.
  • FIG. 5 is a light emitting diode formed from a roll-to-roll fabrication method, according to an exemplary embodiment.
  • FIG. 6A is top view of a slab heater produced via a roll-to-roll fabrication method, according to an exemplary embodiment.
  • FIG. 6B is a side view of the slab heater of FIG. 6A with the addition of a dielectric element, according to an exemplary embodiment.
  • FIG. 7 is a chip resistor formed from a roll-to-roll fabrication method, according to an exemplary embodiment.
  • FIG. 8A is a multi-layer capacitor with the layers connected in series formed from a roll-to-roll fabrication method, according to an exemplary embodiment.
  • FIG. 8B is a multi-layer capacitor with the layers connected in parallel formed from a roll-to-roll fabrication method, according to an exemplary embodiment.
  • FIG. 9 depicts slabs being separated from the carrier as the carrier travels over a roller, according to an exemplary embodiment.
  • FIG. 10 depicts a strip having tracks configured to follow a sprocket for precision movement of the strip during processing, according to an exemplary embodiment.
  • FIG. 11 is a flow diagram of a first roll-to-roll fabrication method for preparing panels that are attached to a carrier and singulated into slabs on the carrier, according to an exemplary embodiment.
  • FIG. 12 depicts a panel containing a plurality of singulated slabs, according to an exemplary embodiment.
  • FIG. 13 is a side view of a slab on carrier, according to an exemplary embodiment.
  • FIGS. 14A and 14B depict the top side and the bottom side, respectively, of a fan-out slab made via a roll-to-roll fabrication method, according to an exemplary embodiment.
  • FIG. 15 depicts a side view of a chip connected to the fan-out slab of FIGS. 14A and 14B, according to an exemplary embodiment.
  • FIG. 16 depicts a sectional view of a slab having multiple conductive layers, according to an exemplary embodiment.
  • Embodiments of the present disclosure relate to a method of preparing strips of singulated electronic substrates.
  • the method is performed in a roll-to-roll fashion. That is, each fabrication step is performed in continuous and sequential steps from an initial roll of raw material, such as a ribbon of ceramic substrate, to the final singulated electronic substrates attached to a strip and rolled on a spool that is delivered to the customer.
  • the roll-to-roll fabrication method has the potential to reduce the packaging cost for certain electronic substrates, especially electronic substrates that conventionally utilize polymeric substrates, such as printed circuit board.
  • the roll-to-roll fabrication method eliminates the need to dice larger substrates of electronic substrates produced in batches.
  • the formation of the electronic substrates is performed in a continuous fashion in which an initial roll of raw material, such as a ribbon of ceramic substrate, is continuously processed to add functional elements, such as vias, patterned conductive layers, solder connections, etc. Then, the ceramic substrate is cut into panels and attached to a rigid carrier, and on the rigid carrier, the panels are singulated into individual electronic substrates.
  • the electronic substrates are provided on a rigid panel may operate better with certain existing technology for fabricating electronic substrates from such electronic substrates.
  • a variety of embodiments of the method and electronic substrates produced according to the method are provided herein. These embodiments are presented by way of example only and not by way of limitation.
  • FIG. 1 depicts a strip 10 including a carrier 12 on which several slabs 14 are mounted.
  • a“slab” refers to a singulated, thin ceramic substrate material.
  • Such slabs may include functional additions, such as conductive circuit patterns, resistors, capacitors, etc., deposited on one or both sides the ceramic material.
  • the slabs are electronic substrates upon which an electronic component can be built. In general, such slabs are less than 200 pm in thickness, have a length of less than 100 mm, and have a width less than 100 mm.
  • the slabs 14 consist of a ceramic substrate 16 having a patterned conductive layer 18 disposed on the top and/or bottom sides of the ceramic substrate 16.
  • the conductive layers 18 are connected using vias 20 that are filled with a conductive material 22.
  • the patterned conductive layer 18 on the top side of the ceramic substrate 16 is in electrical communication with the patterned conductive layer 18 on the bottom side of the ceramic substrate 16.
  • the slabs 14 are attached to the carrier 12 with temporary adhesive 24.
  • the slabs 14 are covered with a protective film 26.
  • the slabs 14 are arranged along the length L of the carrier 12.
  • the length L is several meters or hundreds of meters.
  • the length L can be at least 10 m long, at least 50 m long, or at least 100 m long, and further, in embodiments, the length L can be up to 500 m long.
  • Multiple slabs 14 can also be positioned across the width W of the carrier 12 (as is shown also in FIG. 1).
  • the width W is at least 25 mm wide, and in embodiments, the width W is up to 48 mm wide, up to 75 mm wide, up to 100 mm wide, or up to 150 mm wide, or up to 300 mm wide. In a particular embodiment, the width W of the carrier 12 is 100 mm wide.
  • the slabs 14 on the carrier 12 are spaced from each other by a predetermined amount. In embodiments, the predetermined amount of space is 0.1 mm or less, and in other embodiments, the predetermined amount of space is 20 pm or less.
  • the number of slabs 14 that a strip 10 can hold is dependent on the size of the slabs 14. Further, the size can vary widely depending on a particular application, and therefore, the slabs 14 can be quantified in lot sizes. On the strip 10, a marking can be made to demarcate each lot of slabs 14, which allows easier tracking of production. Table 1, below, provides exemplary lot sizes for strips 10 of various sizes that contain slabs 14 of various types.
  • the strip 10 is constructed in a“roll-to-roll” format on a single process line; that is, the slab 14 is constructed and attached to the carrier 12 in a continuous process beginning with a ribbon of ceramic substrate 16 and ending with a roll of the finished strip 10.
  • the method is not continuous, and certain steps of the method can be carried out across two or more process lines.
  • the method begins with constructing the slab 14 from a ribbon of ceramic substrate 16.
  • the ceramic substrate 16 is sintered alumina, partially- stabilized or fully-stabilized zirconia, titanates (especially for capacitor applications), ferrites (especially for applications involving magnetic shielding), or another ceramic material. It should be noted that, during fabrication, multiple slabs 14 can be formed across the width of the ceramic substrate 16 as well as along the length of the ceramic substrate 16. As will be discussed below, individual slabs 14 are singulated from the ribbon of ceramic substrate 16.
  • the ribbon of ceramic substrate 16 has a thickness of no more than 200 pm. In another embodiment, the ribbon of ceramic substrate 16 has a thickness of no more than 100 pm, and in still another embodiment, the ribbon of ceramic substrate 16 has a thickness of at least 10 pm. In a particular embodiment, the ceramic substrate 16 has a thickness of 40 pm.
  • vias 20 are formed in the ceramic substrate 16 in a first step 101.
  • the vias 20 are formed using a laser ablation process.
  • the laser ablation process uses nanosecond or faster laser pulses, which provides clean (i.e., smooth surfaced) holes and which does not have a significant impact on the strength of the ceramic substrate 16.
  • a chemical process such as liquid etching or reactive ion etching may be used after the location of holes are determined by laser damage process or by photo lithography.
  • the ceramic substrate can optionally be coated with an adhesion layer (not shown).
  • the adhesion layer is a thin layer (e.g., from 100 nm to 500 nm in thickness) that helps to adhere the conductive layer 18 to the ceramic substrate 16.
  • the adhesion layer is one of titanium, tungsten, titanium-tungsten alloys, titanium nitride, tantalum, tantalum nitride, chromium, or chrome-copper alloy.
  • the adhesion layer can be applied using a continuous sputtering process in which the ceramic substrate 16 is run through a sputtering chamber in which the top and/or bottom side of the ceramic substrate 16 is sputter-coated with adhesion layer.
  • the adhesion layer is followed by a thin electroless plating of copper in order to increase the efficiency of copper plating.
  • the vias 20 are sized so as to account for the conformal coating of the adhesion material (e g., sized so as to wick solder into the vias 20 during reflow soldering).
  • the conductive layer 18 or conductive layers 18 are plated onto the ceramic substrate 16 (or adhesion layer, if applied).
  • the conductive layers 18 are selected to be at least one of copper, silver, tin, or nickel, and in embodiments, the thicknesses of the conductive layers 18 are from 2 pm to 20 pm in thickness. In a particular embodiment, the conductive layers 18 are formed from copper and have a thickness of 10 pm to 12 pm. In embodiments, the conductive layers 18 are applied by electroplating the copper onto the ceramic substrate 16 (or adhesion layer). After the third step 103 of electroplating with copper, the copper plating is then covered with a mask in the portions defining a circuit pattern for the conductive layer 18, and in a fourth step 104, an etchant is applied to dissolve the regions of the copper plate outside of the circuit pattern. The mask is then removed.
  • the mask is applied by laminating a dry film over the ceramic substrate 16 or adhesion layer and then exposing the dry film to ultraviolet light to create the circuit pattern. After electroplating, removal of the mask can be accomplished using a caustic solution. In an alternate embodiment, the mask is applied prior to electroplating such that copper is only plated in regions defining the circuit pattern.
  • soldering pads are formed on or adjacent to the conductive layers 18 in a fifth step 105.
  • another dry film mask is applied over the surface of the plated ceramic substrate 16 to define open regions where the soldering pads are to be located.
  • nickel and/or gold is deposited in the open regions to form the soldering pads.
  • the soldering pads are formed through electroless plating. Further, in embodiments, the steps 103, 104, 105 are repeated as necessary to provide one or more layers of conductive layer 18 on one or both sides of the ceramic substrate 16.
  • the method of FIG. 4 begins with a first step 201 of drilling vias 20 into the ceramic substrate 16. Thereafter, in a second step 202, functional layers, such as the conductive layers 18, are printed on a first side of the ceramic substrate 16 using a roll-to-roll printing technique, such as Gravure printing, ink-jet printing, flexographic printing, or imprint lithography, among others. During the second step 202, the functional layers are also sintered into dry, solid layers. The second step 202 can be repeated as necessary to build a layered structure on the first side of the ceramic substrate 16.
  • a roll-to-roll printing technique such as Gravure printing, ink-jet printing, flexographic printing, or imprint lithography
  • a functional layer can be printed and sintered onto a second side of the ceramic substrate 16.
  • the third step 203 can be repeated as necessary to build a layered structure on the second side of the ceramic substrate 16.
  • the steps 202, 203 can be performed in an alternating manner. In such embodiments, functional layers on both sides of the ceramic substrate 16 are able to be sintered in a single step.
  • the printing technique can be used to apply various functional layers, such as conductive layers 18, resistors, multilayers of conductive circuitry separated by dielectric layers, piezo-resistors, potentiometer resistors, heater resistors, and/or NTC (negative temperature coefficient) thermistors, among others.
  • various functional layers such as conductive layers 18, resistors, multilayers of conductive circuitry separated by dielectric layers, piezo-resistors, potentiometer resistors, heater resistors, and/or NTC (negative temperature coefficient) thermistors, among others.
  • up to twenty layers can be applied to one or more sides of the ceramic substrate 16.
  • Each layer or part of the layer will go through step 202.
  • resisters and capacitors are needed, the resisters are applied by step 202.
  • dielectric componets are printed using step 202.
  • conductive circuits may be applied, also by step 202.
  • An insulating layer may also be needed over the elements applied, also by step 202.
  • the slabs 14 have essentially been constructed and only need to be singulated into individual components.
  • a temporary carrier (not shown), which may be referred to in certain contexts as“dicing tape,” is laminated to the ribbon of ceramic substrate 16 (step 106 of FIG. 3; step 205 of FIG. 4).
  • a laser then singulates the ribbon of ceramic substrate 16 into individual slabs 14 that are held together by the temporary carrier.
  • the temporary carrier is polyvinyl chloride (PVC), polyolefin, polyethylene, polyethylene terephthalate (PET), or another similar polymeric film, for example, with an adhesive surface for holding the slabs 14.
  • the temporary carrier is then stretched across its width and length (e.g., in a draw and tenter process) to create space between the laser-singulated slabs 14.
  • the spaced slabs 14 are then laminated to the carrier 12.
  • the carrier 12 is a flexible substrate made of a polymer, such as polyimide, PET, or polyethylene naphthalate (PEN).
  • the carrier 12 is a ribbon of metal, such as aluminum, stainless steel, or other metals.
  • the carrier 12 has a thickness of at least 25 pm, and in other embodiments, the carrier 12 has a thickness of at least 50 pm. In embodiments, the carrier 12 has a thickness of up to 125 pm.
  • the width W of the carrier 12 is from 25 to 150 mm. In a specific embodiment, the thickness is 40 mih, and the width W is 25 mm, and the length L is at least 100 m.
  • the adhesive 24 is sprayed, coated, deposited, or otherwise applied to the slabs 14 and/or to the carrier 12.
  • exemplary methods for applying the adhesive include slot die coating, printing, chemical vapor deposition, or physical vapor deposition
  • non-limiting examples of the adhesive 24 include at least one of an epoxy, silicone rubber, polyimide, phenylenebenzobisoxazole (PBO), or benzocyclobutene (BCB).
  • the adhesive 24 and the carrier 12 are selected for their ability to maintain their properties throughout various operations.
  • the adhesive 24 and carrier 12 should be able to withstand reflow soldering temperatures (e.g., up to 250 °C) and curing cycles (e.g., up to 150 °C) without losing adhesive strength or substantially degrading in mechanical properties, respectively.
  • reflow soldering temperatures e.g., up to 250 °C
  • curing cycles e.g., up to 150 °C
  • the adhesive 24 is selected such that it is strong enough to hold the slab 14 securely to the carrier 12 but not so strong as to make removal difficult for a user.
  • adhesion strength of the slab 14 to the carrier 12 is at least 1.6 N/cm as characterized by the 90° peel test as defined by ASTM D6862. In particular, the adhesion strength reduces to less than 0.5 N/cm at the time of debonding.
  • the reduction in adhesion strength for debonding can be accomplished through heating the tape to a high temperature; applying local ultrasonic energy, applying photo excitation (e.g., ultraviolet radiation), chemical activation or solvent swelling, or laser activation, among other means.
  • photo excitation e.g., ultraviolet radiation
  • chemical activation or solvent swelling e.g., solvent swelling
  • laser activation e.g., laser activation
  • the slabs 14 are covered by the protective film 26 (step 109 of FIG. 3 or step 208 of FIG. 4).
  • the protective film 26 is a polymer, such as PET. Further, in embodiments, the protective film 26 has a thickness of from 12.5 pm to 100 pm. In a more particular embodiment, the protective film 26 has a thickness of 25 pm.
  • the protective film 26 is configured to be peeled off of the slabs 14 prior to use. After covering with the protective film 26, the strip 10 is wound onto a reel (step 110 of FIG. 3 or step 209 of FIG. 4).
  • the strip 10 which, in embodiments, is provided in a roll, may be transported over various rollers during subsequent operations, such as during surface mounting of components onto the ceramic substrate 16.
  • a peeling stress may develop when the flexural rigidities of the ceramic substrate 16 and the carrier 12 are different.
  • the magnitude of the peeling stress developed is a function of the radius of curvature over which the strip 10 travels. A larger radius of curvature will develop lower peel stress than a smaller radius of curvature.
  • thickness of the ceramic substrate 16 is selected to be less than the thickness of the carrier 12. In doing so, the carrier 12 is able to be handled more efficiently because there is uniform stress on the carrier 12 when it undergoes the web handling process.
  • the elastic modulus of the slabs 14 should be high so that circuits with fine lines and spaces can be patterned on the substrate.
  • the ceramic substrate 16 is designed so as to have a flexural rigidity of at least five times greater than the flexural rigidity of the carrier 12. In further embodiments, the flexural rigidity of the ceramic substrate 16 is at least ten times greater than that of the carrier 12, and in still further embodiments, the flexural rigidity of the ceramic substrate 16 is at least twenty times greater that of the carrier 12.
  • the third attribute in particular, enhances the ability to handle the slabs while in a roll. In particular, it is difficult to handle the slabs 14 and separate them from the carrier 12 unless the ceramic substrate 16 of the slab 14 is rigid.
  • Table 2 below, provides the flexural rigidity of an alumina ceramic substrate 16 as compared to a conventional polyimide substrate. Table 1 also provides the rigidity ratio of the ceramic substrate 16 to the carrier 12 for polyimide carriers 12 of different thickness.
  • the thickness and the flexural rigidity of the ceramic substrate 16 enable the ceramic substrate 16 to undergo subsequent component mounting processes and module handling processes after being separated from the carrier 12.
  • Table 3 below, provides instances in which the thickness of the carrier 12 is manipulated such that the carrier 12 has the same flexural rigidity as the ceramic substrate 16.
  • a carrier 12 of polyimide would have to be 205 pm thick
  • a carrier 12 of aluminum 6061 would have to be 68 pm thick
  • a carrier 12 of stainless steel 304 would have to be 50 pm thick. If the rigidity ratio is raised to 5, the thicknesses of these materials can be much lower. As discussed above, however, the thickness of the ceramic substrate 16 is thinner than the thickness of the carrier 12 in embodiments to facilitate subsequent handling and processing of the strip 10.
  • the carrier 12 is a flexible polymer with a thickness of 75 pm.
  • a layer of adhesive 24 is applied to the carrier 12 and has a thickness of 6 pm.
  • the slabs 14 each include a ceramic substrate 16 with a thickness of 40 pm and conductive layers 18 on both the top and bottom sides with the conductive layers 18 being 10 pm thick.
  • the slabs 14 are covered with a protective film 26 having a thickness of 25 pm. Accordingly, the strip 10 has a total thickness of 166 pm.
  • a standard reel that is used in packaging electronic substrates in a tape-on-reel system has a hub diameter of 150 mm and outer diameter of 330 mm.
  • 400 m of strip 10 can be stored on the reel, which facilitates low-cost mass production of electronic substrates. Indeed, as demonstrated above in Table 1, several million slabs 14 can be provided on a strip 10 that is 400 m long (depending, in part, on the particular type of electronic component).
  • the slab 14 is formed into a light emitting diode (LED) chip 27.
  • LED light emitting diode
  • an LED 28 is mounted to the conductive layer 18 on the top side of the slab 14.
  • a phosphor 30 is coated on the LED 28 to provide light of a specific color or colors.
  • the LED chip 27 is formed during the roll-to-roll fabrication method after the step of electroless plating the solder pads or after the step of singulating the slabs 14.
  • the finished reel of strip 10 is used to create the LED chips on a separate process line.
  • the LED chips can advantageously be tested for LED performance on-line.
  • the strip 10, including the LED chips 27, can then shipped to the customer, who detaches the module when assembling products like luminaires. Further, because the strip 10 uses a slab 14 with a ceramic substrate 16, the slab 14 is better able to conduct away the heat generated from high-powered LED packages.
  • the slab 14 is a heater 31.
  • a resistive heating element 32 is deposited on the ceramic substrate 16.
  • the resistive heating element 32 has a serpentine shape with conductive elements 34a, 34b at each end.
  • a sensor 36 such as an NTR thermistor, is provided near the center of the top surface of the ceramic substrate 16.
  • Two additional conductive elements 34c, 34d are provided along with conductive traces 37 to provide for electrical communication with the sensor 36.
  • the resistive heating element 32 and sensor 36 are covered by a dielectric layer 38.
  • the sensor 36 can be positioned in a different plane from the resistive heating element 32 and/or separated from the resistive heating element 32 by the dielectric layer 38.
  • FIG. 7 provides an embodiment of the slab 14 as a chip resistor 39.
  • Conductive strips 40 are deposited on the top and bottom surface of the ceramic substrate 16.
  • the conductive strips 40 are connected by vias 20 filled with conductive material 22.
  • a resistive element 42 is deposited between the conductive strips 40.
  • a dielectric layer 38 is deposited on top of the resistive element 42.
  • a value 44 of the resistive element 42 is printed on the dielectric layer 32.
  • the resistor value 44 is 47 W.
  • the chip resistor 39 as shown and described has a low height profile.
  • the conductive strips 40, resistive element 42, dielectric layer 38, and resistor value 44 are all printed on the ceramic substrate 16 (e g., as discussed above with respect to FIG. 4).
  • multi-layer capacitors 51 are shown.
  • the ceramic substrates 16 have been screen printed with conducting layers 48 and insulating layers 50.
  • the ceramic substrates 16 function as the dielectric material of individual capacitors 52 of the multi-layer capacitor 46.
  • the conducting layers 48 and the insulating layers 50 are arranged in such a way as to join the capacitors 52 in series.
  • the conducting layers 48 and the insulating layers 50 of the multi-layer capacitor 51 are arranged in such a way as to join the capacitors 52 in parallel.
  • the multi-layer capacitors 51 of this design can be made larger in size, higher in capacitance, and better able to withstand higher breakdown voltage.
  • the slab can include an antenna that is printed on the ceramic substrate. Resistors, inductors, capacitors, and other tunable elements can also be patterned on the ceramic substrate.
  • the bottom side of the slab can include a conductive layer functioning as a ground plane.
  • the top side of the slab can have integrated circuits and other passive components mounted thereon.
  • the slab can also contain printed sensors that sense, e.g., temperature, capacitance, pressure (piezoelectric), humidity, and/or gas.
  • FIG. 9 provides an exemplary embodiment of how the slabs 14 can be removed from the carrier 12. After all of the components have been mounted on the ceramic substrate 16, the finished slab 14 is held by a pick-up tool 60 from the top as the carrier 12 is bent over a roller 62. In such an embodiment, certain factors contribute to successful separation of the slab 14 from the carrier 12: the strength of the ceramic substrate 16, the bending stress in the ceramic substrate 16, and the peel force.
  • the strength of the ceramic substrate 16 is influenced by flaws and/or defects in the material that, in some circumstances, can be introduced during the fabrication process, such as during via drilling, metallization, singulation, or handling during component assembly.
  • flaws and/or defects can be decreased by using high-speed lasers, such as femto-second lasers, during via drilling and singulation and by preventing the ceramic substrate 16 from contacting hard materials, such as other ceramics or metals, as it goes through various processing steps.
  • the carrier 12 can be moved more precisely using a sprocket track 70 with holes 72 for engaging the teeth of a sprocket. In this way, the carrier 12 can move over a roller, such as roller 62 of FIG.
  • a sprocket track 70 is useful for precisely positioning the carrier 12 while electronic substrates are assembled on the slab 14.
  • the bending stress is influenced by the elastic modulus of the ceramic substrate 16, the thickness of the ceramic substrate 16, the size of the slab 14, and the speed at which the slab 14 is separated from the carrier 12.
  • a higher elastic modulus will lead to a higher magnitude of bending stress.
  • a thinner ceramic substrate 16 will develop more bending stress than a thicker ceramic substrate 16 of the same material.
  • a larger slabs and higher separation speeds will lead to a higher bending stress.
  • the bending stress can be managed so as to avoid exceeding the strength of the ceramic substrate 14.
  • the adhesive can be weakened just prior to separation.
  • the strip can be exposed to UV light, increased temperature, moisture, magnetic fields, ultrasonic energy, and/or electrostatic forces.
  • the specific technique for weakening the adhesive minimizes or eliminates adhesive residue left behind on the slab 14 after separation.
  • the adhesive strength as measured by the 90° peel test defined in ASTM D6862, is greater than 4 N per 25 mm wide carrier and, after the weakening technique is performed, reduces to less than 0.4 N per 25 mm wide carrier.
  • the slabs are attached to a rigid carrier instead of the flexible polymeric carrier as described above.
  • the substrate is cut into panels after the continuous processing steps of forming vias, electroplating, etching, and attaching solder pads.
  • the panels are then attached to a flat, rigid carrier upon which the panel of ceramic substrate is singulated into individual slabs.
  • the slabs are not contained on a long strip that is wound into a roll. Instead, the slabs are contained on a board that is usable by certain customers whose current manufacturing setup does not allow for the use slabs taken from a rolled strip.
  • FIG. 11 depicts an embodiment of a method 300 of fabricating the slabs in the manner described.
  • the method 300 is substantially similar to the method described above and shown in FIG. 3.
  • the method begins with a first step 301 of drilling vias in the ceramic substrate, which is a ribbon of sintered alumina, partially-stabilized or fully- stabilized zirconia, titanates, ferrites, or another ceramic material.
  • the ribbon of ceramic substrate is unrolled or otherwise continuously fed into the continuous process line.
  • the ceramic substrate is coated on one or both sides with an adhesion layer of, e.g., titanium, tungsten, titanium-tungsten alloys, titanium nitride, tantalum, tantalum nitride, chromium, or chrome-copper alloy, to facilitate adherence of the conductive layer.
  • an adhesion layer of, e.g., titanium, tungsten, titanium-tungsten alloys, titanium nitride, tantalum, tantalum nitride, chromium, or chrome-copper alloy, to facilitate adherence of the conductive layer.
  • the conductive layer is electroplated onto the ceramic substrate (or adhesion layer)
  • a fourth step 104 a circuit pattern is etched into the conductive layer.
  • the mask can be applied to the substrate (or adhesion layer) so that the conductive material is only applied in regions defining the circuit pattern.
  • solder pads are deposited for making of electrical connections. In embodiments, electroless plating is used to apply the solder pads
  • the method 300 of FIG. 11 is substantially similar to the method 100 of FIG. 3. After the fifth step, however, the methods diverge.
  • the substrate is cut into panels in a sixth step 306.
  • the panels are then attached to a carrier in a seventh step 307.
  • the carrier can be a variety of suitable materials, including glass or metal sheets.
  • the carrier can be a sheet of glass from 0.5 mm to 0.7 mm thick.
  • the carrier can be a sheet of metal, such as aluminum or stainless steel, which is also 0.5 mm to 0.7 mm thick.
  • the carrier may be selected for its ability to be handled by assembly equipment, to be sent through a solder reflow oven at temperatures, e.g., of 260 °C or greater, to be transparent to UY radiation for debonding processes, and/or to be flat and have a relatively low thickness variation.
  • the panels While on the carrier, the panels are singulated into slabs in an eighth step 308, and in a ninth step 309, the slabs are covered with a protective film.
  • the initial steps of fabricating the slabs are similar to steps 201, 202, 203, and 204 of FIG. 4 in which functional layers are printed onto the ceramic substrate.
  • the functional layers may be applied using, e.g., flexography, gravure roll, and/or inkjet printing. Each functional layer applied may be sintered at 800 °C, for example, after application.
  • the functional layers can include one or more layers having that are conductive, resistive, dielectric, temperature sensing (thermistor), and/or insulating. After application of the functional layers, embodiments of the method proceed according to steps 306, 307, 308, and 309 of FIG. 11.
  • FIG. 12 provides a schematic representation of a panel 400 on a carrier 412 in which the panel 400 has been singulated into individual slabs 414 (although, the protective film is not shown for the purposes of clarity).
  • the carrier 412 has a length L and a width W that define a surface area upon which the slabs 414 are attached.
  • the slabs 414 cover substantially the entire surface area of the carrier 412 except for an optional border region 415.
  • each of the slabs 414 has a size of 2 mm by 2 mm.
  • the carrier 412 has a length L of 200 mm and a width W of 100 mm, and the slabs 414 are arranged on the carrier 412 such that the border region 415 has a width of 2 mm around the periphery of the carrier 412.
  • 4704 slabs 414 can be provided on the carrier 412. This embodiment is provided to illustrate the number of slabs 414 of a given size that can fit on a carrier 412 of a given size.
  • the panel 400 from which the slabs 414 are singulated can be the same size as the carrier 412 (i.e., no border region 415 is provided).
  • the panel can be least 200 mm long, at least 300 mm long, or at least 500 mm long, and further, in embodiments, the panel can be up to 800 mm long.
  • the panel 400 is at least 100 mm wide, at least 200 mm wide, or up to 300 mm wide.
  • rectangular ceramic panels were limited in size to a maximum of about 115 mm by 175 mm, and circular wafers were limited in size to a maximum diameter of 300 mm.
  • the panels 400 as described herein have the advantage of being able to be made in much larger sizes than were previously available.
  • the slabs 414 can vary in size from a dimension as small as 0.5 mm to a dimension as large as 50 mm.
  • the slabs 414 can be any shape, including square, rectangular, circular, triangular, or other curved or line-angle shapes.
  • the dimension can be a radius, edge length, height, etc.
  • carriers 412 can vary in size from a dimension as small as 100 mm to a dimension as large as 800 mm.
  • the carrier 412 is rectangular and has a size of from 100 mm by 300 mm to 300 mm by 800 mm.
  • FIG. 13 provides a side view of a slab 414 on the carrier 412.
  • the slab 414 includes a ceramic substrate 416 having one or more conductive layers 418.
  • the conductive layers 418 define circuit patterns, and conductive layers 418 on the top of the ceramic substrate 416 may be connected to conductive layers 418 on the bottom of the ceramic substrate 416 through vias (not shown).
  • the slab 414 is attached to the carrier 412 using an adhesive, shown as adhesive layer 424.
  • the slabs 414 do not need to have 100% of their bottom surface bonded to the carrier 412.
  • the slabs 414 can have less than 100% of their bottom surface bonded to the carrier 412, and in embodiments, the percentage can be as low as 40%.
  • only the conductive layers 418 on the bottom surface of the slab 414 are in contact with the adhesive layer 424. This property allows for easier removal of the slab 414 from the carrier 412 during later processing.
  • the bond between the slabs 414 and the carrier 412 is loosened by exposing the adhesive layer 424 to UV light, e.g., UV-A and/or UV-B radiation.
  • UV light e.g., UV-A and/or UV-B radiation.
  • Exemplary adhesives suitable for use as the adhesive layer 424 include LC-3200 and LC-4200 (available from 3M, St. Paul, MN) and BrewerBOND® 305 (available from Brewer Science, Inc., Rolla, MO).
  • the carrier 412 is made of material, such as glass, that is transparent to UV light (at least within a certain range of wavelengths). UV light is shone through the carrier 412, and the adhesive layer 424 degrades in response to exposure to the UV light.
  • the adhesive layer 424 does not completely release the slab 414, and instead, the adhesive layer retains, e g., 50%, 30%, 10%, or 5%, of its original strength (which can be determined using the peel test defined in ASTM D6862). Upon loosening of the bond created by the adhesive layer 424, the slab 414 can be removed from the carrier 412 by a surface mounting machine.
  • FIGS. 14A and 14B provide another embodiment of an electrical component that can be created from the slabs 414.
  • FIGS. 14A and 14B depict a top and a bottom view, respectively, of a fan-out interposer 450.
  • the fan-out interposer 450 includes a plurality of first contacts 452 that engage a corresponding contacts of an integrated circuit (not shown). Extending from each of the plurality of first contacts 452 are first leads 454 that connect to a plurality of vias 456. In this way, the interposer 450 effectively spreads out the contacts of the integrated circuit, essentially increasing the surface area of the integrated circuit for connection to a printed circuit board (PCB) As shown in FIG.
  • PCB printed circuit board
  • each via 456 is connected to one of a plurality of second leads 458 on the underside of the interposer 450.
  • the second leads 458 are each in turn connected to a plurality of second contacts 460.
  • the second contacts 460 are spread outwardly to a greater extent that the first contacts 452.
  • FIG. 15 depicts the interposer 450 with an integrated circuit 470 mounted thereon.
  • the integrated circuit 470 is connected to the interposer 450 via micro-bumps or copper pillars 472.
  • Under-fill polymer 474 surrounds the micro-bumps 472 and helps bond the integrated circuit 470 to the interposer 450.
  • the interposer 450 is connected to a PCB 480 via bumps 482.
  • Under-fill polymer 474 is also used to surround bumps 482 and bond the interposer 470 to the PCB 480.
  • the first and second leads 454, 458 i.e., conductive layers 418) can applied to the ceramic substrate 416 using photo-lithography as described in method 300.
  • alumina as the ceramic substrate means that the slab 414 can withstand elevated temperatures, such as the temperatures associated with lead-tin solder reflow.
  • FIG. 16 depicts a sectional view of a slab 414 having multiple conductive layers 418.
  • vias 420 are provided through the thickness of the ceramic substrate 416 to connect conductive layers 418 on the top and bottom of the ceramic substrate 416.
  • additional conductive layers 418 are built up over each other such that each layer defines its own circuit pattern.
  • the regions between the conductive material in each layer is filled with a dielectric material 490.
  • the multilayered slab redistributes connections from a high density side on the top to a low density side on the bottom.
  • the slab 414 may also contain other circuit elements, such as resistors, capacitors, inductors, etc.
  • the ceramic substrate 16, 416 is selected such that it has a higher thermal conductivity, a low dielectric loss tangent, and/or a high dielectric breakdown voltage.
  • the thermal conductivity of the ceramic substrate 16, 416 is at least 10 W/mK.
  • the thermal conductivity of the ceramic substrate 16, 416 is at least 20 W/mK, and in still further embodiments, the thermal conductivity of the ceramic substrate 16, 416 is at least 30 W/mK.
  • the dielectric loss tangent is at most 0.00008 at frequencies of 5 GHz or higher. In other embodiments, the dielectric loss tangent is at most 0.0001 at frequencies of 10-60 GHz.
  • the dielectric breakdown voltage is at least 125 kV/mm at a substrate thickness of 40 pm.
  • the aforedescribed properties of thermal conductivity, dielectric loss tangent, and/or dielectric breakdown voltage are provided in addition to the low thickness and high flexural stiffness properties described above.
  • the slabs 14, 414 made from the ceramic substrates 16, 416 in the roll-to-roll fashion provide several advantages over other manufacturing techniques and materials that could be used as the substrate material for slabs.
  • the use of a ribbon substrate in conjunction with the flexural rigidity allows for more slabs to be placed on a larger carriers.
  • the carriers 412 are over two times larger than the conventional carriers, such as alumina carriers, which allows for increased packaging efficiency.
  • the ceramic substrate 16, 416 does not shrink during processing, which allows for the incorporation of higher precision features as compared to low-temperature and high-temperature co-fired ceramics.
  • components can be mounted on a single board.
  • the ceramic substrates 16, 416 used in the slabs 14, 414 disclosed herein are real dielectrics with a higher breakdown voltage.
  • a ceramic substrate 16, 416 as described herein and made from alumina has the highest flexural rigidity among the common substrate materials provided. While 40 pm is used for comparison purposes, ribbon alumina is the only material among those listed that can actually be manufactured at that thickness while achieving the high flexural rigidity. For instance, polyimide is available at thicknesses as low as 12.5 pm, but even at a thickness of 125 pm, polyimide still has a flexural rigidity that is less than a quarter of ribbon alumina. Further, silicon can be ground down to less than 100 pm in thickness, but doing so increases yield losses. Finally, glass epoxy cannot actually be produced at thicknesses as low as 40 pm. The last column of the Table 4 provides a rigidity ratio of alumina to the other substrates to demonstrate how much more rigid the alumina is compared to the other substrate materials. Table 4. Comparison of Flexural Rigidity to other Substrate Materials

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Laminated Bodies (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

Selon certains modes de réalisation, la présente invention concerne un procédé de création d'une bande de composants électroniques. Dans le procédé, un ruban de substrat en céramique est fourni. Le substrat en céramique délimite une épaisseur ne dépassant pas 200 µm entre une première surface extérieure et une seconde surface extérieure opposée à la première surface extérieure. Une couche conductrice est appliquée sur la première surface extérieure et/ou sur la seconde surface extérieure du substrat en céramique. Le substrat électronique peut ensuite être séparé en bandes individuelles et fixé à un support flexible d'une manière rouleau à rouleau ou divisé en panneaux et fixé à un support rigide, le substrat électronique étant séparé en bandes individuelles. De plus, l'invention concerne des modes de réalisation d'un rouleau de substrats électroniques et des modes de réalisation d'un système de support pour des substrats électroniques.
PCT/US2019/032390 2018-05-17 2019-05-15 Substrats électroniques séparés sur un support souple ou rigide et procédés associés Ceased WO2019222330A2 (fr)

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TWI779973B (zh) * 2021-12-22 2022-10-01 天二科技股份有限公司 晶片電阻及其製造方法
CN115872760A (zh) * 2022-10-24 2023-03-31 西安鑫垚陶瓷复合材料股份有限公司 一种陶瓷基复合材料预制体中长条孔的填充方法

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TWI789660B (zh) * 2020-12-18 2023-01-11 財團法人工業技術研究院 軟性電子封裝裝置的製造方法
US11363724B1 (en) 2020-12-18 2022-06-14 Industrial Technology Research Institute Fabrication method of flexible electronic package device

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US5461774A (en) * 1994-03-25 1995-10-31 Motorola, Inc. Apparatus and method of elastically bowing a base plate
DE10327360B4 (de) * 2003-06-16 2012-05-24 Curamik Electronics Gmbh Verfahren zum Herstellen eines Keramik-Metall-Substrates
US8367475B2 (en) * 2011-03-25 2013-02-05 Broadcom Corporation Chip scale package assembly in reconstitution panel process format
JP2014160694A (ja) * 2013-02-19 2014-09-04 Panasonic Corp セラミック配線基板とバリスタ内蔵セラミック配線基板

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TWI779973B (zh) * 2021-12-22 2022-10-01 天二科技股份有限公司 晶片電阻及其製造方法
CN115872760A (zh) * 2022-10-24 2023-03-31 西安鑫垚陶瓷复合材料股份有限公司 一种陶瓷基复合材料预制体中长条孔的填充方法

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