WO2024252560A1

WO2024252560A1 - Method for manufacturing multilayer substrate, and semiconductor device

Info

Publication number: WO2024252560A1
Application number: PCT/JP2023/021163
Authority: WO
Inventors: 裕一乃万; 敏明白坂
Original assignee: Resonac Corp
Current assignee: Resonac Corp
Priority date: 2023-06-07
Filing date: 2023-06-07
Publication date: 2024-12-12
Anticipated expiration: 2025-12-07
Also published as: CN121014264A; JPWO2024252560A1

Abstract

In one example of this method for manufacturing a package substrate, a first substrate 30 having a cured insulating layer, a second substrate 40 having a cured insulating layer, a third substrate 50 having a cured insulating layer, and a fourth substrate 60 having a cured insulating layer are prepared. A semi-cured bonding body 70 (prepreg) is sandwiched and laminated between the first substrate 30 and the second substrate 40, and then the same is cured to form a first laminated substrate 100. Similarly, a semi-cured bonding body 80 is sandwiched and laminated between the third substrate 50 and the fourth substrate 60, and then the same is cured to form a second laminated substrate 110. Thereafter, a semi-cured bonding body 90 is sandwiched and laminated between the first laminated substrate 100 and the second laminated substrate 110, and then the same is cured to form a package substrate 1. According to this method, the steps can be shortened as compared with the case where layers are laminated one by one in order, and the shortening effect is prominent especially when the number of layers to be laminated is large.

Description

Multilayer board manufacturing method and semiconductor device

　本開示は、多層基板の製造方法に関し、特にパッケージ基板の製造方法に関する。 This disclosure relates to a method for manufacturing a multilayer substrate, and in particular to a method for manufacturing a package substrate.

　非特許文献１には、プリント配線板を一括して積層する方法が開示されている。この方法では、両面銅箔付きのコア基材をサブトラクティブ工法でエッチングし、エッチングされたコア基材をプリプレグを介して重ね合わせて加熱加圧することで積層板を形成している。その後、積層板に貫通孔を設け、貫通孔の壁面を銅めっき(スルーホールめっき)することで、上下層間の導通を確保する。このような方法は、例えば、マザーボードの作製などに用いられている。ただし、上記工法で基板を作製すると、貫通孔が基板の全層を貫通するため、一の層の中で平面方向に配線する際の制約となる。これを解決する目的で、マイクロビアと呼ばれる技術が開発されている。この技術では、基板の全層を貫通する孔を設ける代わりに、各絶縁層に孔を開けて上下層の間だけで導通を確保している（非特許文献２を参照）。また、絶縁フィルムを貼り付けた後にレーザ加工によってビアを開口し、セミアディティブ工法によって配線形成を繰り返すビルドアップ工法も知られている（非特許文献３を参照）。この方法によれば、一の層に多数の配線を形成することができる。 Non-Patent Document 1 discloses a method for laminating printed wiring boards in one go. In this method, a core substrate with copper foil on both sides is etched by a subtractive method, and the etched core substrate is stacked via a prepreg and heated and pressed to form a laminate. After that, through holes are provided in the laminate, and the walls of the through holes are copper plated (through-hole plating) to ensure electrical continuity between the upper and lower layers. This method is used, for example, in the manufacture of motherboards. However, when a board is manufactured by the above method, the through holes penetrate all layers of the board, which restricts wiring in the planar direction within one layer. In order to solve this problem, a technology called microvia has been developed. In this technology, instead of providing holes that penetrate all layers of the board, holes are opened in each insulating layer to ensure electrical continuity only between the upper and lower layers (see Non-Patent Document 2). In addition, a build-up method is also known in which vias are opened by laser processing after attaching an insulating film, and wiring formation is repeated by a semi-additive method (see Non-Patent Document 3). This method allows a large number of wirings to be formed on one layer.

　また、半導体製品の高性能化に伴い、パッケージ基板に必要とされる入出力の端子数は増加している。その一方で、一の配線に形成できる配線の本数には制約がある。そのため、パッケージ基板におけるビルドアップ層数を増加させる取り組みが行われおり、９層のビルドアップ層数を１２層へと増やすことが検討されている（非特許文献４）。しかしながら、ビルドアップ工法は、絶縁層を一層ずつ順に積層しているため、積層数に比例して基板の作製期間が延びる課題がある。これを解決する手段として、ＰＡＬＡＰ工法を用いた多層基板が開発されている（例えば、非特文献５、特許文献１及び２を参照）。この方法では、片面に銅パターンを形成した熱可塑性樹脂において銅パターンの反対側に孔を設け、導体粉末を注入した基板を複数準備する。そして、準備された複数の基板を一括積層することで、多層基板を作製している。 In addition, as semiconductor products become more powerful, the number of input/output terminals required for package substrates is increasing. On the other hand, there is a limit to the number of wiring that can be formed on one wiring. For this reason, efforts are being made to increase the number of build-up layers in package substrates, and an increase from nine build-up layers to twelve layers is being considered (Non-Patent Document 4). However, since the build-up method stacks insulating layers one by one in order, there is a problem that the manufacturing period of the substrate increases in proportion to the number of layers. As a means to solve this problem, a multilayer substrate using the PALAP method has been developed (see, for example, Non-Patent Document 5, Patent Documents 1 and 2). In this method, a thermoplastic resin with a copper pattern formed on one side is used to prepare multiple substrates in which holes are provided on the opposite side of the copper pattern and conductor powder is injected. Then, the prepared multiple substrates are stacked together to produce a multilayer substrate.

特開２００４－１４６６９４号公報JP 2004-146694 A 特開２０１１－１８７８４３号公報JP 2011-187843 A

雀部俊樹　著、「プリント配線板の歴史」、エレクトロニクス実装学会誌、Vol.16、No.6(2013)、pp.428-432Toshiki Suzumebe, "History of Printed Wiring Boards," Journal of the Japan Institute of Electronics Packaging, Vol. 16, No. 6 (2013), pp. 428-432 上田弘孝　著、「携帯電話端末機における導電性接着剤の応用と技術課題」、エレクトロニクス実装学会誌、vol.9、No.3(2006)、pp.211-218Hirotaka Ueda, "Applications and Technical Issues of Conductive Adhesives in Mobile Phone Terminals," Journal of the Japan Institute of Electronics Packaging, vol. 9, No. 3 (2006), pp. 211-218 Michio Horiuchi et al., “Metallization technologies on a smooth resin surface for the next generation of flip chip packaging”, Transactions of The Japan Institute of Electronics Packaging, vol.3, No.1(2010), pp.110-115Michio Horiuchi et al., “Metallization technologies on a smooth resin surface for the next generation of flip chip packaging”, Transactions of The Japan Institute of Electronics Packaging, vol.3, No.1(2010), pp.110-115 ＦＣ－ＢＧＡサブストレート、ロードマップ、[online]、2022年、［令和５年４月２７日検索］、インターネット＜URL:https://www.toppan.co.jp/electronics/package/fc-bga/＞FC-BGA Substrate, Roadmap, [online], 2022, [Retrieved April 27, 2023], Internet <URL: https://www.toppan.co.jp/electronics/package/fc-bga/> 矢崎芳太郎他　著、「固相拡散接合を適用したＰＡＬＡＰ多層基板の開発」、デンソーテクニカルレビュー、vol.10、No.2(2005), pp.85-89Yoshitaro Yazaki et al., "Development of PALAP Multilayer Substrates Using Solid-Phase Diffusion Bonding," DENSO Technical Review, vol. 10, No. 2 (2005), pp. 85-89

　上述したようにビルドアップ工法では、絶縁層を一層ずつ順に積層していくため、積層数に比例して、基板を作製する期間が長期化してしまう。一方、ＰＡＬＡＰのような一括積層工法の場合、各配線の間で位置ずれが生じることがある。そこで、各配線の位置ずれを抑制しつつ多層基板の作製を効率化できる工法の開発が望まれている。 As mentioned above, in the build-up method, insulating layers are stacked one by one in order, so the time it takes to fabricate the board increases in proportion to the number of layers. On the other hand, in the case of a one-time stacking method such as PALAP, misalignment can occur between the individual wiring. Therefore, there is a need to develop a method that can increase the efficiency of fabricating multilayer boards while suppressing misalignment of the individual wiring.

　本開示は、各配線の位置ずれを抑制しつつ多層基板の作製を効率化できる多層基板の製造方法を提供することを目的とする。 The present disclosure aims to provide a method for manufacturing a multilayer board that can efficiently manufacture the multilayer board while suppressing misalignment of each wiring.

　［１］本開示は、一側面として、多層基板の製造方法に関する。この多層基板の製造方法は、第１絶縁層と、第１絶縁層の第１面に設けられた第１配線と、第１絶縁層の第２面に設けられた第２配線と、第１絶縁層を貫通し第１配線及び第２配線を互いに接続する第１ビアとを有する第１基板を準備する工程と、第２絶縁層と、第２絶縁層の第１面に設けられた第３配線と、第２絶縁層の第２面に設けられた第４配線と、第２絶縁層を貫通し第３配線及び第４配線を互いに接続する第２ビアとを有する第２基板を準備する工程と、第３絶縁層と、第３絶縁層の第１面に設けられた第５配線と、第３絶縁層の第２面に設けられた第６配線と、第３絶縁層を貫通し第５配線及び第６配線を互いに接続する第３ビアとを有する第３基板を準備する工程と、第１接合材と、第１接合材を貫通する第１接続ビアとを有する第１接合体を準備する工程と、第２接合材と、第２接合材を貫通する第２接続ビアとを有する第２接合体を準備する工程と、第１接合体をその間に挟み込むように第１基板と第２基板とを積層して第１積層基板を作製する工程と、第３基板を含む第２積層基板を準備する工程と、第２接合体をその間に挟み込むように第１積層基板と第２積層基板とを積層して第３積層基板を作製する工程と、を備えている。 [1] In one aspect, the present disclosure relates to a method for manufacturing a multilayer board. The method for manufacturing the multilayer board includes the steps of: preparing a first board having a first insulating layer, a first wiring provided on a first surface of the first insulating layer, a second wiring provided on a second surface of the first insulating layer, and a first via penetrating the first insulating layer and connecting the first wiring and the second wiring to each other; preparing a second board having a second insulating layer, a third wiring provided on the first surface of the second insulating layer, a fourth wiring provided on the second surface of the second insulating layer, and a second via penetrating the second insulating layer and connecting the third wiring and the fourth wiring to each other; and preparing a second board having a third insulating layer, a fifth wiring provided on the first surface of the third insulating layer, a sixth wiring provided on the second surface of the third insulating layer, and a third via penetrating the second insulating layer and connecting the third wiring and the fourth wiring to each other. The method includes the steps of preparing a third substrate having a third via that penetrates the third insulating layer and connects the fifth wiring and the sixth wiring to each other, preparing a first bonding body having a first bonding material and a first connection via that penetrates the first bonding material, preparing a second bonding body having a second bonding material and a second connection via that penetrates the second bonding material, stacking the first substrate and the second substrate so as to sandwich the first bonding body therebetween to produce a first laminate substrate, preparing a second laminate substrate including the third substrate, and stacking the first substrate and the second substrate so as to sandwich the second bonding body therebetween to produce a third laminate substrate.

　この多層基板の製造方法では、まず、第１接合体をその間に挟み込むように第１基板と第２基板とを積層して第１積層基板を作製すると共に、第３基板を含む第２積層基板を準備している。そして、第２接合体をその間に挟み込むように第１積層基板と第２積層基板とを積層して多層基板である第３積層基板を作製している。この場合、積層数を倍々等で増やしていくことができるため、一層ずつ順に積層していく工法に比べて、多層基板を作製する期間を短くすることができる。一方、各積層板は、多数の基板を一括して積層するものではないため、各配線における位置ずれも生じづらい。よって、この多層基板の製造方法によれば、各配線の位置ずれを抑制しつつ多層基板の作製を効率化することができる。 In this method of manufacturing a multilayer board, first, a first laminated board is manufactured by stacking a first board and a second board so as to sandwich the first bonding body therebetween, and a second laminated board including a third board is prepared. Then, the first laminated board and the second laminated board are stacked so as to sandwich the second bonding body therebetween to manufacture a third laminated board, which is a multilayer board. In this case, since the number of layers can be increased by doubling, etc., the time required to manufacture the multilayer board can be shortened compared to a method in which layers are stacked one by one in order. Meanwhile, since each laminate plate is not made by stacking multiple boards at once, misalignment of each wiring is less likely to occur. Therefore, this method of manufacturing a multilayer board can efficiently manufacture a multilayer board while suppressing misalignment of each wiring.

　［２］上記［１］の多層基板の製造方法は、第４絶縁層と、第４絶縁層の第１面に設けられた第７配線と、第４絶縁層の第２面に設けられた第８配線と、第４絶縁層を貫通し第７配線及び第８配線を互いに接続する第４ビアとを有する第４基板を準備する工程と、第３接合材と、第３接合材を貫通する第３接続ビアとを有する第３接合体を準備する工程と、を更に備えることが好ましい。第２積層基板を準備する工程では、第３接合体をその間に挟み込むように第３基板と第４基板とを積層して第２積層基板を作製することが好ましい。この場合、少なくとも８層の配線を有する多層基板を作製する期間を更に短くすることができる。 [2] The method for manufacturing a multilayer board according to [1] above preferably further includes the steps of preparing a fourth board having a fourth insulating layer, a seventh wiring provided on a first surface of the fourth insulating layer, an eighth wiring provided on a second surface of the fourth insulating layer, and a fourth via penetrating the fourth insulating layer and connecting the seventh wiring and the eighth wiring to each other, and preparing a third bonding body having a third bonding material and a third connection via penetrating the third bonding material. In the step of preparing the second laminated board, it is preferable to prepare the second laminated board by stacking the third board and the fourth board so as to sandwich the third bonding body therebetween. In this case, the time required to prepare a multilayer board having at least eight layers of wiring can be further shortened.

　［３］上記［１］又は［２］の多層基板の製造方法において、第１絶縁層、第２絶縁層、第３絶縁層、及び第４絶縁層は、硬化された硬化性樹脂を含む絶縁層であることが好ましい。この場合、第１絶縁層、第２絶縁層、第３絶縁層、及び第４絶縁層は、その後の積層工程等における加熱によって溶融してしまうことがなく、各絶縁層上に設けられる配線の位置ずれも生じにくい。よって、この多層基板の製造方法によれば、各配線における位置ずれをより確実に抑制することができる。なお、ここでいう硬化性樹脂は、例えば、熱硬化性樹脂であってもよい。 [3] In the manufacturing method of the multilayer board of [1] or [2] above, the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer are preferably insulating layers containing a cured curable resin. In this case, the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer are not melted by heating in the subsequent lamination process, etc., and the wiring provided on each insulating layer is less likely to be misaligned. Therefore, according to this manufacturing method of the multilayer board, it is possible to more reliably suppress the misalignment of each wiring. The curable resin referred to here may be, for example, a thermosetting resin.

　［４］上記［１］又は［２］の多層基板の製造方法において、第１絶縁層、第２絶縁層、第３絶縁層、及び第４絶縁層は、ガラス基板であってもよい。この場合、第１絶縁層、第２絶縁層、第３絶縁層、及び第４絶縁層は、その後の積層工程等における加熱によって溶融してしまうことがなく、各絶縁層上に設けられる配線の位置ずれも生じにくい。よって、この多層基板の製造方法によれば、各配線における位置ずれをより確実に抑制することができる。 [4] In the manufacturing method of the multilayer substrate of [1] or [2] above, the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer may be glass substrates. In this case, the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer will not melt due to heating in the subsequent lamination process, etc., and the wiring provided on each insulating layer is less likely to become misaligned. Therefore, according to this manufacturing method of the multilayer substrate, it is possible to more reliably suppress misalignment of each wiring.

　［５］上記［１］～［４］の何れかの多層基板の製造方法において、第１接合材は、第１積層基板を作製する前において、半硬化又は未硬化の硬化性樹脂を含む絶縁層であることが好ましく、第２接合材は、第３積層基板を作製する前において、半硬化又は未硬化の硬化性樹脂を含む絶縁層であることが好ましい。この場合、第１基板と第２基板との接合及び第１積層基板と第２積層基板との接合を確実且つ容易に行うことができる。 [5] In any of the above methods for manufacturing a multilayer substrate [1] to [4], the first bonding material is preferably an insulating layer containing a semi-cured or uncured curable resin before the first laminate substrate is produced, and the second bonding material is preferably an insulating layer containing a semi-cured or uncured curable resin before the third laminate substrate is produced. In this case, the first substrate and the second substrate, and the first laminate substrate and the second laminate substrate can be bonded reliably and easily.

　［６］上記［１］～［５］の何れかの多層基板の製造方法において、第１ビア、第２ビア及び第１接続ビアのうち少なくとも１つのビアは、他のビアとは異なる平面方向における位置に設けられていてもよい。この場合、各配線における配線パターンの設計自由度を向上させることができる。 [6] In any of the above methods for manufacturing a multilayer board [1] to [5], at least one of the first via, the second via, and the first connection via may be provided at a position in a planar direction different from the other vias. In this case, the degree of freedom in designing the wiring pattern for each wiring can be improved.

　［７］上記［１］～［６］の何れかの多層基板の製造方法において、第１接続ビアは、第１ビア及び第２ビアとは異なる平面方向における位置に設けられていてもよい。この場合、各配線における配線パターンの設計自由度を向上させることができる。 [7] In any of the above methods for manufacturing a multilayer board [1] to [6], the first connection via may be provided at a position in a planar direction different from the first via and the second via. In this case, the design freedom of the wiring pattern for each wiring can be improved.

　［８］上記［１］～［７］の何れかの多層基板の製造方法は、第４接合材と、第４接合材を貫通する第４接続ビアとを有する第４接合体を準備する工程を更に備えてもよく、第３積層基板を作製する工程では、第２接合材をその間に挟み込むように第１積層基板と第２積層基板とを積層した第３積層基板を２つ作製してもよい。そして、第４接合材をその間に挟み込むように２つの第３積層基板を積層して第４積層基板を更に作製してもよい。この場合、１２層や１６層のような配線の層数がより多い多層基板を効率的に作製することができる。 [8] The manufacturing method of any of the multilayer boards [1] to [7] above may further include a step of preparing a fourth bonding body having a fourth bonding material and a fourth connection via penetrating the fourth bonding material, and in the step of producing the third laminate board, two third laminate boards may be produced by stacking the first laminate board and the second laminate board so as to sandwich the second bonding material therebetween. Then, a fourth laminate board may be further produced by stacking two third laminate boards so as to sandwich the fourth bonding material therebetween. In this case, a multilayer board having a larger number of wiring layers, such as 12 or 16 layers, can be efficiently produced.

　［９］上記［１］～［８］の何れかの多層基板の製造方法は、多層基板の最外層に外部端子を形成する工程を更に備えてもよい。この場合、外部端子を有する多層基板を作製することができる。 [9] The manufacturing method of any of the above [1] to [8] multilayer substrates may further include a step of forming external terminals on the outermost layer of the multilayer substrate. In this case, a multilayer substrate having external terminals can be produced.

　［１０］上記［１］～［９］の何れかの多層基板の製造方法において、作製される多層基板がパッケージ基板であることが好ましい。 [10] In any of the above methods for manufacturing a multilayer substrate [1] to [9], it is preferable that the multilayer substrate to be manufactured is a package substrate.

　［１１］上記［１］～［１０］の何れかの多層基板の製造方法は、第１基板、第２基板、第３基板、及び第４基板のうち少なくとも１つの基板を、積層する前に、検査する工程を更に備えてもよい。この場合、不良の基板または不良率の高い基板を除いて良品の基板又は良品率の高い基板を次の工程に進めることで、全体として多層基板の良品率を向上させることができる。 [11] The manufacturing method for a multilayer board according to any one of [1] to [10] above may further include a step of inspecting at least one of the first board, the second board, the third board, and the fourth board before stacking them. In this case, defective boards or boards with a high defect rate are removed, and good boards or boards with a high quality rate are advanced to the next step, thereby improving the quality rate of the multilayer board overall.

　［１２］上記［１］～［１１］の何れかの多層基板の製造方法において、第１基板を準備する工程では、複数の第１基板が準備され、第２基板を準備する工程では、複数の第２基板が準備され、第１積層基板を作製する工程では、複数の第１積層基板が作製され、複数の第１基板のそれぞれ及び複数の第２基板のそれぞれは、複数の配線部を含む大判基板であってもよい。検査する工程では、複数の第１基板のそれぞれにおける各配線部が検査されると共に、複数の第２基板のそれぞれにおける各配線部が検査されてもよい。第１積層基板を作製する工程では、検査する工程での検査結果に基づいて複数の第１基板の各基板と複数の第２基板の各基板との組み合わせが選択されることが好ましい。これにより、不良の基板または不良率の高い基板を除いて良品の基板又は良品率の高い基板を次の工程に進めることで、全体として多層基板の良品率を更に向上させることができる。 [12] In the method for manufacturing a multilayer board according to any one of [1] to [11] above, in the step of preparing a first board, a plurality of first boards are prepared, in the step of preparing a second board, a plurality of second boards are prepared, and in the step of fabricating a first laminate board, a plurality of first laminate boards are fabricated, and each of the plurality of first boards and each of the plurality of second boards may be a large-sized board including a plurality of wiring portions. In the step of inspecting, each wiring portion in each of the plurality of first boards may be inspected, and each wiring portion in each of the plurality of second boards may be inspected. In the step of fabricating a first laminate board, it is preferable to select a combination of each of the plurality of first boards and each of the plurality of second boards based on the inspection results in the step of inspecting. This allows the overall yield rate of the multilayer board to be further improved by excluding defective boards or boards with a high defect rate and proceeding to the next step with non-defective boards or boards with a high yield rate.

　［１３］上記［１２］の多層基板の製造方法において、第１積層基板を作製する工程では、検査する工程で良品と判断された各配線部同士が重ね合わされるように選択が行われてもよい。この場合、多層基板の良品率を更に向上させることができる。 [13] In the method for manufacturing a multilayer board according to [12] above, in the step of producing the first laminate board, selection may be performed so that the wiring parts determined to be non-defective in the inspection step are superimposed on each other. In this case, the yield rate of the multilayer board can be further improved.

　本開示によれば、各配線の位置ずれを抑制しつつ多層基板の作製を効率化することができる。 This disclosure makes it possible to efficiently manufacture multilayer boards while suppressing misalignment of each wiring.

図１は、本発明の一実施形態に係るパッケージ基板（多層基板）の断面構成の一例を示す断面図である。FIG. 1 is a cross-sectional view showing an example of a cross-sectional configuration of a package substrate (multilayer substrate) according to an embodiment of the present invention. 図２の（ａ）及び（ｂ）は、図１に示すパッケージ基板の製造方法を示す断面図である。2A and 2B are cross-sectional views showing a method for manufacturing the package substrate shown in FIG. 図３は、図１に示すパッケージ基板の製造方法を示す断面図であり、図２に示す工程の後に行われる工程を示す。3A to 3C are cross-sectional views showing a method for manufacturing the package substrate shown in FIG. 1, illustrating a step performed after the step shown in FIG. 図４は、図２に示す工程の後に行われる別の例の工程を示す。FIG. 4 illustrates another example step that may be performed after the step illustrated in FIG. 図５は、検査工程での結果を反映して貼り合わせる工程を説明するための図である。FIG. 5 is a diagram for explaining a bonding process that reflects the results of the inspection process. 図６は、検査工程での結果を反映して貼り合わせる工程を説明するための図である。FIG. 6 is a diagram for explaining a bonding process that reflects the results of the inspection process. 図７は、図５及び図６の貼り合わせる工程を説明するための斜視図である。FIG. 7 is a perspective view for explaining the bonding step of FIG. 5 and FIG. 図８は、複数の基板がある場合において、検査工程での結果を反映せずにそのまま貼り合わせる工程を説明するための図である。FIG. 8 is a diagram for explaining a process of bonding a plurality of substrates together without reflecting the results of the inspection process. 図９は、複数の基板がある場合において、検査工程での結果を反映して選択処理を行ってから貼り合わせる工程を説明するための図である。FIG. 9 is a diagram for explaining a process of performing a selection process reflecting the results of the inspection process and then bonding the substrates together when there are a plurality of substrates.

　以下、図面を参照しながら本発明に係る実施形態について詳細に説明する。以下の説明では、同一又は相当部分には同一の符号を付し、重複する説明は省略する。また、上下左右等の位置関係は、特に断らない限り、図面に示す位置関係に基づくものとする。更に、図面の寸法比率は図示の比率に限られるものではない。 Below, an embodiment of the present invention will be described in detail with reference to the drawings. In the following description, the same or equivalent parts will be given the same reference numerals, and duplicated descriptions will be omitted. Furthermore, unless otherwise specified, positional relationships such as up, down, left, right, etc. will be based on the positional relationships shown in the drawings. Furthermore, the dimensional ratios of the drawings are not limited to the ratios shown in the drawings.

　本明細書において「層」との語は、平面図として観察したときに、全面に形成されている形状の構造に加え、一部に形成されている形状の構造も包含される。本明細書において「工程」との語は、独立した工程だけではなく、他の工程と明確に区別できない場合であってもその工程の所期の作用が達成されれば、本用語に含まれる。 In this specification, the term "layer" includes structures that are formed over the entire surface when viewed in a plan view, as well as structures that are formed on only a portion of the surface. In this specification, the term "process" includes not only independent processes, but also processes that cannot be clearly distinguished from other processes as long as the intended effect of the process is achieved.

　本明細書において「～」を用いて示された数値範囲は、「～」の前後に記載される数値をそれぞれ最小値及び最大値として含む範囲を示す。本明細書中に段階的に記載されている数値範囲において、ある段階の数値範囲の上限値又は下限値は、他の段階の数値範囲の上限値又は下限値に置き換えてもよい。本明細書中に記載されている数値範囲において、その数値範囲の上限値又は下限値は、実施例に示されている値に置き換えてもよい。 In this specification, a numerical range indicated using "~" indicates a range that includes the numerical values before and after "~" as the minimum and maximum values, respectively. In numerical ranges described in stages in this specification, the upper or lower limit of a numerical range in one stage may be replaced with the upper or lower limit of a numerical range in another stage. In numerical ranges described in this specification, the upper or lower limit of the numerical range may be replaced with a value shown in the examples.

　図１は、本発明の一実施形態に係る製造方法によって製造されるパッケージ基板の一例を示す図である。図１に示すように、パッケージ基板１（多層基板、第３積層基板）は、８層の配線層を備えた基板である。パッケージ基板１は、第１配線層１１、第２配線層１２、第３配線層１３、第４配線層１４、第５配線層１５、第６配線層１６、第７配線層１７、第８配線層１８、第１絶縁層２１、第２絶縁層２２、第３絶縁層２３、第４絶縁層２４、第５絶縁層２５、第６絶縁層２６、及び、第７絶縁層２７を有している。第１配線層１１から第８配線層１８の各配線層は、例えば、サブトラクティブ法やセミアディティブ法によって形成することができる。他の方法を用いてもよい。第１配線層１１～第８配線層１８は、例えば、銅等の金属から形成される。第１配線層１１～第８配線層１８の厚さは、例えば５μｍ～３５μｍであり、好ましくは、９μｍ～２５μｍである。 FIG. 1 is a diagram showing an example of a package substrate manufactured by a manufacturing method according to one embodiment of the present invention. As shown in FIG. 1, the package substrate 1 (multilayer substrate, third laminate substrate) is a substrate having eight wiring layers. The package substrate 1 has a first wiring layer 11, a second wiring layer 12, a third wiring layer 13, a fourth wiring layer 14, a fifth wiring layer 15, a sixth wiring layer 16, a seventh wiring layer 17, an eighth wiring layer 18, a first insulating layer 21, a second insulating layer 22, a third insulating layer 23, a fourth insulating layer 24, a fifth insulating layer 25, a sixth insulating layer 26, and a seventh insulating layer 27. Each of the wiring layers from the first wiring layer 11 to the eighth wiring layer 18 can be formed, for example, by a subtractive method or a semi-additive method. Other methods may also be used. The first wiring layer 11 to the eighth wiring layer 18 are formed, for example, from a metal such as copper. The thickness of the first wiring layer 11 to the eighth wiring layer 18 is, for example, 5 μm to 35 μm, and preferably 9 μm to 25 μm.

　第１絶縁層２１から第７絶縁層２７は、例えば、熱硬化性樹脂等の硬化性樹脂を含んで形成されており、パッケージ基板１の状態では硬化性樹脂の硬化物となっている。第１絶縁層２１から第７絶縁層２７は、ガラスクロスＧを硬化性樹脂の中に含む構成であってもよいし、ガラスクロスＧを含まない構成であってもよい。第１絶縁層２１から第７絶縁層２７は、例えば、プリプレグの硬化物である。第１絶縁層２１から第７絶縁層２７は、ガラス基板から形成されてもよい。このような第１絶縁層２１から第７絶縁層２７のそれぞれが、第１配線層１１から第８配線層１８のそれぞれの間に配置されることで、配線層間の絶縁性が確保されている。一方、第１絶縁層２１から第７絶縁層２７には、各絶縁層を貫通するビア（マイクロビア）が設けられてもよく、このようなビアにより、配線層間において必要な導通は図れるように構成されている。このようなパッケージ基板１は、例えば、ＦＣ－ＢＧＡ用のパッケージ基板であってもよい。なお、図１に示すパッケージ基板１は、８層の配線層（第１配線層１１から第８配線層１８）を備えていたが、これに限られず、６層の配線層を備えてもよく、１２層の配線層を備えてもよく、１６層の配線層を備えてもよく、２４層の配線層を備えてもよい。 The first insulating layer 21 to the seventh insulating layer 27 are formed, for example, containing a hardening resin such as a thermosetting resin, and are hardened products of the hardening resin in the state of the package substrate 1. The first insulating layer 21 to the seventh insulating layer 27 may be configured to contain glass cloth G in the hardening resin, or may not contain glass cloth G. The first insulating layer 21 to the seventh insulating layer 27 are, for example, hardened products of prepreg. The first insulating layer 21 to the seventh insulating layer 27 may be formed from a glass substrate. Each of the first insulating layer 21 to the seventh insulating layer 27 is disposed between each of the first wiring layer 11 to the eighth wiring layer 18, thereby ensuring insulation between the wiring layers. On the other hand, the first insulating layer 21 to the seventh insulating layer 27 may be provided with vias (microvias) that penetrate each insulating layer, and such vias are configured to provide the necessary electrical continuity between the wiring layers. Such a package substrate 1 may be, for example, a package substrate for FC-BGA. Although the package substrate 1 shown in FIG. 1 has eight wiring layers (first wiring layer 11 to eighth wiring layer 18), it is not limited to this and may have six wiring layers, 12 wiring layers, 16 wiring layers, or 24 wiring layers.

　次に、図２及び図３を参照して、パッケージ基板１の製造方法について説明する。図２の（ａ）及び（ｂ）は、図１に示すパッケージ基板の製造方法を示す断面図である。図３は、図１に示すパッケージ基板の製造方法を示す断面図であり、図２に示す工程の後に行われる工程を示す。この製造方法は、以下の工程［Ａ］～工程［Ｊ］を備えている。 Next, a method for manufacturing the package substrate 1 will be described with reference to Figures 2 and 3. Figures 2(a) and 2(b) are cross-sectional views showing the method for manufacturing the package substrate shown in Figure 1. Figure 3 is a cross-sectional view showing the method for manufacturing the package substrate shown in Figure 1, showing a step carried out after the step shown in Figure 2. This manufacturing method includes the following steps [A] to [J].

　工程Ａ：第１絶縁層と、第１絶縁層の第１面に設けられた第１配線と、第１絶縁層の第２面に設けられた第２配線と、第１絶縁層を貫通し第１配線及び第２配線を互いに接続する第１ビアとを有する第１基板を準備する工程。
　工程Ｂ：第２絶縁層と、第２絶縁層の第１面に設けられた第３配線と、第２絶縁層の第２面に設けられた第４配線と、第２絶縁層を貫通し第３配線及び第４配線を互いに接続する第２ビアとを有する第２基板を準備する工程。
　工程Ｃ：第３絶縁層と、第３絶縁層の第１面に設けられた第５配線と、第３絶縁層の第２面に設けられた第６配線と、第３絶縁層を貫通し第５配線及び第６配線を互いに接続する第３ビアとを有する第３基板を準備する工程。
　工程Ｄ：第４絶縁層と、第４絶縁層の第１面に設けられた第７配線と、第４絶縁層の第２面に設けられた第８配線と、第４絶縁層を貫通し第７配線及び第８配線を互いに接続する第４ビアとを有する第４基板を準備する工程。
　工程Ｅ：第１接合材と、第１接合材を貫通する第１接続ビアとを有する第１接合体を準備する工程。
　工程Ｆ：第３接合材と、第３接合材を貫通する第３接続ビアとを有する第３接合体を準備する工程。
　工程Ｇ：第２接合材と、第２接合材を貫通する第２接続ビアとを有する第２接合体を準備する工程。
　工程Ｈ：第１接合体をその間に挟み込むように第１基板と第２基板とを積層して第１積層基板を作製する工程。
　工程Ｉ：第３接合体をその間に挟み込むように第３基板と第４基板とを積層して第２積層基板を作製する工程。
　工程Ｊ：第２接合体をその間に挟み込むように第１積層基板と第２積層基板とを積層して多層基板を作製する工程。 Step A: A step of preparing a first substrate having a first insulating layer, a first wiring provided on a first surface of the first insulating layer, a second wiring provided on a second surface of the first insulating layer, and a first via that penetrates the first insulating layer and connects the first wiring and the second wiring to each other.
Step B: A step of preparing a second substrate having a second insulating layer, a third wiring provided on a first surface of the second insulating layer, a fourth wiring provided on a second surface of the second insulating layer, and a second via that penetrates the second insulating layer and connects the third wiring and the fourth wiring to each other.
Step C: A step of preparing a third substrate having a third insulating layer, a fifth wiring provided on a first surface of the third insulating layer, a sixth wiring provided on a second surface of the third insulating layer, and a third via penetrating the third insulating layer and connecting the fifth wiring and the sixth wiring to each other.
Step D: A step of preparing a fourth substrate having a fourth insulating layer, a seventh wiring provided on a first surface of the fourth insulating layer, an eighth wiring provided on a second surface of the fourth insulating layer, and a fourth via that penetrates the fourth insulating layer and connects the seventh wiring and the eighth wiring to each other.
Step E: A step of preparing a first bonding body having a first bonding material and a first connection via penetrating the first bonding material.
Step F: A step of preparing a third bonding body having a third bonding material and a third connection via penetrating the third bonding material.
Step G: A step of preparing a second bonding body having a second bonding material and a second connection via penetrating the second bonding material.
Step H: A step of stacking the first substrate and the second substrate with the first bonding body sandwiched therebetween to produce a first laminated substrate.
Step I: A step of producing a second laminated substrate by laminating a third substrate and a fourth substrate with a third bonded body sandwiched therebetween.
Step J: A step of stacking the first laminate substrate and the second laminate substrate so as to sandwich the second bonded body therebetween to produce a multilayer substrate.

［工程Ａ］
　工程Ａでは、図２の（ａ）に示すように、第１基板３０を準備する。第１基板３０は、絶縁層３１（第１絶縁層）と、絶縁層３１の第１面３１ａに設けられた配線層３２（第１配線）と、絶縁層３１の第２面３１ｂに設けられた配線層３３（第２配線）と、絶縁層３１を貫通し、配線層３２及び配線層３３を互いに接続するビア３４（第１ビア）と、を有している。 [Step A]
2A, a first substrate 30 is prepared. The first substrate 30 has an insulating layer 31 (first insulating layer), a wiring layer 32 (first wiring) provided on a first surface 31a of the insulating layer 31, a wiring layer 33 (second wiring) provided on a second surface 31b of the insulating layer 31, and a via 34 (first via) that penetrates the insulating layer 31 and connects the wiring layer 32 and the wiring layer 33 to each other.

　絶縁層３１は、エポキシ樹脂等の熱硬化性樹脂を含んで構成されており、例えば、ガラスクロスＧを含むプリプレグから形成されている。絶縁層３１を構成する樹脂組成物には、硬化剤として、フェノール樹脂化合物、酸無水物化合物、アミン化合物、ヒドラジット化合物が含まれていてもよい。絶縁層３１は、プリプレグ等が硬化された硬化物（いわゆるＣステージ）となっている。絶縁層３１は、硬化された状態において、例えば、厚さが７μｍ～１００μｍであり、好ましくは、２０μｍ～６０μｍである。なお、絶縁層３１は、ガラス基板であってもよい。 The insulating layer 31 is composed of a thermosetting resin such as an epoxy resin, and is formed, for example, from a prepreg containing glass cloth G. The resin composition constituting the insulating layer 31 may contain a phenolic resin compound, an acid anhydride compound, an amine compound, or a hydrazide compound as a curing agent. The insulating layer 31 is a cured product (so-called C stage) formed by curing the prepreg or the like. In the cured state, the insulating layer 31 has a thickness of, for example, 7 μm to 100 μm, and preferably 20 μm to 60 μm. The insulating layer 31 may be a glass substrate.

　絶縁層３１の第１面３１ａには、配線層３２が形成されている。また、絶縁層３１の第２面３１ｂには、配線層３３が形成されている。配線層３２，３３は、例えば銅、金、銀等の金属からなる配線であり、絶縁層３１において、サブトラクティブ法又はセミアディティブ法によって形成することができる。他の方法で形成してもよい。配線層３２，３３は、金属めっき層、銅箔等の金属箔、スパッタ等の蒸着によって形成された層、又は、金属焼結層であってもよい。配線層３２，３３の厚さは、例えば５μｍ～３５μｍであってもよい。絶縁層３１には、更に、絶縁層３１を積層方向に貫通して配線層３２及び配線層３３を互いに接続するビア３４が形成されていてもよい。ビア３４は、例えば銅等の金属から形成されている。 A wiring layer 32 is formed on the first surface 31a of the insulating layer 31. A wiring layer 33 is formed on the second surface 31b of the insulating layer 31. The wiring layers 32, 33 are wirings made of metal such as copper, gold, silver, etc., and can be formed in the insulating layer 31 by a subtractive method or a semi-additive method. They may also be formed by other methods. The wiring layers 32, 33 may be a metal plating layer, a metal foil such as copper foil, a layer formed by deposition such as sputtering, or a metal sintered layer. The thickness of the wiring layers 32, 33 may be, for example, 5 μm to 35 μm. The insulating layer 31 may further have a via 34 formed therein, which penetrates the insulating layer 31 in the stacking direction and connects the wiring layer 32 and the wiring layer 33 to each other. The via 34 is formed of a metal such as copper.

［工程Ｂ］
　工程Ｂでは、第２基板４０を準備する。第２基板４０は、第１基板３０と同様の構成を有しており、絶縁層４１（第２絶縁層）と、絶縁層４１の第１面４１ａに設けられた配線層４２（第３配線）と、絶縁層４１の第２面４１ｂに設けられた配線層４３（第４配線）と、絶縁層４１を貫通し、配線層４２及び配線層４３を互いに接続するビア４４（第２ビア）と、を有している。第２基板４０の絶縁層４１及び配線層４２,４３の材料及び形成方法は、第１基板３０と同様であるため、詳細な説明は省略する。 [Step B]
In step B, the second substrate 40 is prepared. The second substrate 40 has the same configuration as the first substrate 30, and includes an insulating layer 41 (second insulating layer), a wiring layer 42 (third wiring) provided on the first surface 41a of the insulating layer 41, a wiring layer 43 (fourth wiring) provided on the second surface 41b of the insulating layer 41, and a via 44 (second via) that penetrates the insulating layer 41 and connects the wiring layer 42 and the wiring layer 43 to each other. The materials and forming methods of the insulating layer 41 and the wiring layers 42 and 43 of the second substrate 40 are the same as those of the first substrate 30, and therefore will not be described in detail.

［工程Ｃ］
　工程Ｃでは、第３基板５０を準備する。第３基板５０は、第１基板３０と同様の構成を有しており、絶縁層５１（第３絶縁層）と、絶縁層５１の第１面５１ａに設けられた配線層５２（第５配線）と、絶縁層５１の第２面５１ｂに設けられた配線層５３（第６配線）と、絶縁層５１を貫通し、配線層５２及び配線層５３を互いに接続するビア５４（第３ビア）と、を有している。第３基板５０の絶縁層５１及び配線層５２，５３の材料及び形成方法は、第１基板３０と同様であるため、詳細な説明は省略する。 [Step C]
In step C, a third substrate 50 is prepared. The third substrate 50 has the same configuration as the first substrate 30, and includes an insulating layer 51 (third insulating layer), a wiring layer 52 (fifth wiring) provided on a first surface 51a of the insulating layer 51, a wiring layer 53 (sixth wiring) provided on a second surface 51b of the insulating layer 51, and a via 54 (third via) that penetrates the insulating layer 51 and connects the wiring layer 52 and the wiring layer 53 to each other. The materials and forming methods of the insulating layer 51 and the wiring layers 52 and 53 of the third substrate 50 are the same as those of the first substrate 30, and therefore will not be described in detail.

［工程Ｄ］
　工程Ｄでは、第４基板６０を準備する。第４基板６０は、第１基板３０と同様の構成を有しており、絶縁層６１（第４絶縁層）と、絶縁層６１の第１面６１ａに設けられた配線層６２（第７配線）と、絶縁層６１の第２面６１ｂに設けられた配線層６３（第８配線）と、絶縁層６１を貫通し、配線層６２及び配線層６３を互いに接続するビア６４（第４ビア）と、を有している。第４基板６０の絶縁層６１及び配線層６２，６３の材料及び形成方法は、第１基板３０と同様であるため、詳細な説明は省略する。 [Step D]
In step D, a fourth substrate 60 is prepared. The fourth substrate 60 has the same configuration as the first substrate 30, and includes an insulating layer 61 (fourth insulating layer), a wiring layer 62 (seventh wiring) provided on a first surface 61a of the insulating layer 61, a wiring layer 63 (eighth wiring) provided on a second surface 61b of the insulating layer 61, and a via 64 (fourth via) that penetrates the insulating layer 61 and connects the wiring layer 62 and the wiring layer 63 to each other. The materials and forming methods of the insulating layer 61 and the wiring layers 62 and 63 of the fourth substrate 60 are the same as those of the first substrate 30, and therefore detailed description thereof will be omitted.

［工程Ｅ］
　工程Ｅでは、接合体７０（第１接合体）を準備する。接合体７０は、接合材７１（第１接合材）と、接合材７１を貫通する接続ビア７２（第１接続ビア）とを有する。接合体７０の接合材７１は、第１基板１０と第２基板２０とを接合する部材であり、例えば、熱硬化性樹脂等の硬化性樹脂の半硬化（Ｂステージ）又は未硬化の状態のものであり、ガラスクロスＧを含むプリプレグなどから構成されている。接合材７１は、樹脂等から形成されており、絶縁性を有している。この接合材７１には、接合材７１を貫通する接続ビア７２が設けられている。接続ビア７２は、例えば、銅等の金属から形成されている。接合材７１は、絶縁層３１，４１，５１，６１と同じプリプレグから構成されていることが好ましいが、接合材７１は、接合するための部材であることから、接合を行う前（後述する工程Ｈの前）においては、半硬化又は未硬化の状態となっている点が相違する。 [Step E]
In step E, a bonding body 70 (first bonding body) is prepared. The bonding body 70 has a bonding material 71 (first bonding material) and a connection via 72 (first connection via) penetrating the bonding material 71. The bonding material 71 of the bonding body 70 is a member that bonds the first substrate 10 and the second substrate 20, and is, for example, a semi-cured (B stage) or uncured state of a curable resin such as a thermosetting resin, and is composed of a prepreg containing a glass cloth G. The bonding material 71 is formed of a resin or the like and has insulating properties. The bonding material 71 is provided with a connection via 72 that penetrates the bonding material 71. The connection via 72 is formed of a metal such as copper. The bonding material 71 is preferably composed of the same prepreg as the insulating layers 31, 41, 51, and 61, but the bonding material 71 is different in that it is in a semi-cured or uncured state before bonding (before step H described later) because it is a member for bonding.

［工程Ｆ］
　工程Ｆでは、接合体８０（第３接合体）を準備する。接合体８０は、接合体７０と同様に、接合材８１（第３接合材）と、接合材８１を貫通する接続ビア８２（第３接続ビア）とを有している。接合体８０の接合材８１（絶縁層）及び接続ビア８２の材料及び形成方法は、接合体７０と同様であるため、詳細な説明は省略する。 [Step F]
In step F, a bonded body 80 (third bonded body) is prepared. The bonded body 80, like the bonded body 70, has a bonding material 81 (third bonding material) and a connection via 82 (third connection via) penetrating the bonding material 81. The materials and the formation method of the bonding material 81 (insulating layer) and the connection via 82 of the bonded body 80 are similar to those of the bonded body 70, and therefore detailed description thereof will be omitted.

［工程Ｇ］
　工程Ｇでは、接合体９０(第２接合体)を準備する（図３を参照）。接合体９０は、接合体７０と同様に、接合材９１（第２接合材）と、接合材９１を貫通する接続ビア９２（第２接続ビア）とを有している。接合体９０の接合材９１（絶縁層）及び接続ビア９２の材料及び形成方法は、接合体７０と同様であるため、詳細な説明は省略する。 [Step G]
In step G, a bonded body 90 (second bonded body) is prepared (see FIG. 3). Like the bonded body 70, the bonded body 90 has a bonding material 91 (second bonding material) and a connection via 92 (second connection via) penetrating the bonding material 91. The materials and the method of forming the bonding material 91 (insulating layer) and the connection via 92 of the bonded body 90 are the same as those of the bonded body 70, and therefore detailed description thereof will be omitted.

［工程Ｈ］
　工程Ｈでは、図２の（ａ）及び（ｂ）に示すように、第１基板３０、第２基板４０及び接合体７０の準備が終了すると、接合体７０を第１基板３０と第２基板４０との間に挟み込むように第１基板３０と第２基板４０とを積層して第１積層基板１００を作製する。即ち、第１基板３０と第２基板４０との間に、半硬化又は未硬化状態の接合体７０を挟み込んで接着剤として機能させて、第１基板３０と第２基板４０とを接合して積層体を形成する。その後、積層体に対して、加熱及び加圧を行い、半硬化又は未硬化状態の接合体７０を硬化させ、第１積層基板１００を作製する。硬化するための温度は、例えば１００℃～２５０℃であり、加圧する際の圧力は０．２～１０ＭＰａである。なお、第１基板３０及び第２基板４０の絶縁層３１，４１は、硬化性樹脂の硬化物又はガラス基板であることから、工程Ｈにおいて加熱しても、配線層３２，３３、配線層４２，４３、ビア３４，４４が当初の位置からずれてしまうことはない。 [Step H]
In step H, as shown in (a) and (b) of FIG. 2, when the preparation of the first substrate 30, the second substrate 40, and the bonded body 70 is completed, the first substrate 30 and the second substrate 40 are laminated so that the bonded body 70 is sandwiched between the first substrate 30 and the second substrate 40 to produce the first laminated substrate 100. That is, the bonded body 70 in a semi-cured or uncured state is sandwiched between the first substrate 30 and the second substrate 40 to function as an adhesive, and the first substrate 30 and the second substrate 40 are bonded to form a laminate. Thereafter, the laminate is heated and pressurized to cure the bonded body 70 in a semi-cured or uncured state, and the first laminated substrate 100 is produced. The temperature for curing is, for example, 100° C. to 250° C., and the pressure when pressing is 0.2 to 10 MPa. Furthermore, since the insulating layers 31, 41 of the first substrate 30 and the second substrate 40 are a cured product of a curable resin or a glass substrate, even if they are heated in process H, the wiring layers 32, 33, the wiring layers 42, 43, and the vias 34, 44 will not shift from their original positions.

［工程Ｉ］
　工程Ｉでは、第３基板５０、第４基板６０及び接合体８０の準備が終了すると、接合体８０を第３基板５０と第４基板６０との間に挟み込むように第３基板５０と第４基板６０とを積層して第２積層基板１１０を作製する。即ち、第１積層基板１００と同様に、第３基板５０と第４基板６０との間に、半硬化又は未硬化状態の接合体８０を挟み込んで接着剤として機能させて、第３基板５０と第４基板６０とを接合して積層体を形成する。その後、積層体に対して、加熱及び加圧を行い、半硬化又は未硬化状態の接合体８０を硬化させ、第２積層基板１１０を作製する。硬化するための温度及び圧力は、第１積層基板１００を作製する場合と同様である。なお、第３基板５０及び第４基板６０の絶縁層５１，６１は、硬化性樹脂の硬化物又はガラス基板であることから、工程Ｉにおいて加熱しても、配線層５２，５３、配線層６２，６３、ビア５４，６４が当初の位置からずれてしまうことはない。 [Step I]
In step I, when the preparation of the third substrate 50, the fourth substrate 60, and the bonded body 80 is completed, the third substrate 50 and the fourth substrate 60 are laminated so that the bonded body 80 is sandwiched between the third substrate 50 and the fourth substrate 60 to produce the second laminated substrate 110. That is, similar to the first laminated substrate 100, the bonded body 80 in a semi-cured or uncured state is sandwiched between the third substrate 50 and the fourth substrate 60 to function as an adhesive, and the third substrate 50 and the fourth substrate 60 are bonded to form a laminate. Thereafter, the laminate is heated and pressurized to cure the bonded body 80 in a semi-cured or uncured state, and the second laminated substrate 110 is produced. The temperature and pressure for curing are the same as those for producing the first laminated substrate 100. Furthermore, since the insulating layers 51, 61 of the third substrate 50 and the fourth substrate 60 are a cured product of a curable resin or a glass substrate, even if they are heated in step I, the wiring layers 52, 53, the wiring layers 62, 63, and the vias 54, 64 will not shift from their original positions.

［工程Ｊ］
　工程Ｊでは、図３に示すように、第１積層基板１００、第２積層基板１１０、及び、接合体９０の準備が終了すると、接合体９０を第１積層基板１００と第２積層基板１１０との間に挟み込むように第１積層基板１００と第２積層基板１１０とを積層してパッケージ基板１を作製する。即ち、第１積層基板１００と第２積層基板１１０との間に、半硬化又は未硬化状態の接合体９０を挟み込んで接着剤として機能させて、第１積層基板１００と第２積層基板１１０とを接合して積層体を形成する。その後、積層体に対して、加熱及び加圧を行い、半硬化又は未硬化状態の接合体９０を硬化させ、パッケージ基板１（図１参照）を作製する。硬化するための温度及び圧力は、第１積層基板１００等を作製する場合と同様である。なお、第１積層基板１００及び第２積層基板１１０の各絶縁層は、硬化性樹脂の硬化物又はガラス基板であることから、工程Ｊにおいて再加熱しても、配線層３２，３３、配線層４２，４３、配線層５２，５３、配線層６２，６３、ビア３４，４４，５４，６４が当初の位置からずれてしまうことはない。 [Step J]
In step J, as shown in FIG. 3, when the preparation of the first laminated substrate 100, the second laminated substrate 110, and the bonded body 90 is completed, the first laminated substrate 100 and the second laminated substrate 110 are laminated so that the bonded body 90 is sandwiched between the first laminated substrate 100 and the second laminated substrate 110 to produce the package substrate 1. That is, the bonded body 90 in a semi-cured or uncured state is sandwiched between the first laminated substrate 100 and the second laminated substrate 110 to function as an adhesive, and the first laminated substrate 100 and the second laminated substrate 110 are bonded to form a laminate. Thereafter, the laminate is heated and pressurized to cure the bonded body 90 in a semi-cured or uncured state, and the package substrate 1 (see FIG. 1) is produced. The temperature and pressure for curing are the same as those for producing the first laminated substrate 100 and the like. Furthermore, since each insulating layer of the first laminate substrate 100 and the second laminate substrate 110 is a cured product of a curable resin or a glass substrate, even if reheated in process J, the wiring layers 32, 33, the wiring layers 42, 43, the wiring layers 52, 53, the wiring layers 62, 63, and the vias 34, 44, 54, 64 will not shift from their original positions.

　このように、４層の配線層を有する積層基板同士を接合して、８層の配線層を形成する。但し、図４に示すように、４層の配線層を有する積層基板である第１積層基板１００と２層の配線層を有する第３基板５０との間に、半硬化又は未硬化状態の接合体９０を挟み込んで接着剤として機能させて、第１積層基板１００と第３基板５０を含む第２積層基板１１０Ａとを接合して積層体を形成してもよい。この場合、その後、その積層体に対して、加熱及び加圧を行い、半硬化又は未硬化状態の接合体９０を硬化させ、６層のパッケージ基板を作製することができる。 In this way, eight wiring layers are formed by bonding laminated substrates each having four wiring layers. However, as shown in FIG. 4, a laminate may be formed by sandwiching a semi-cured or uncured adhesive 90 between a first laminated substrate 100, which is a laminated substrate having four wiring layers, and a third substrate 50, which has two wiring layers, to function as an adhesive, and bonding the first laminated substrate 100 and a second laminated substrate 110A including the third substrate 50. In this case, the laminate may then be heated and pressurized to harden the semi-cured or uncured adhesive 90, thereby producing a six-layer package substrate.

　なお、第１積層基板１００と第２積層基板１１０とを積層して硬化した後の多層基板であるパッケージ基板１の最外層に外部端子を形成してもよい。これにより、外部端子を有するパッケージ基板が作製される。また、このように製造されたパッケージ基板に半導体素子を実装して、半導体装置を作製することが可能である。 In addition, external terminals may be formed on the outermost layer of the package substrate 1, which is a multilayer substrate obtained after the first laminate substrate 100 and the second laminate substrate 110 are laminated and cured. This produces a package substrate having external terminals. It is also possible to manufacture a semiconductor device by mounting a semiconductor element on the package substrate thus produced.

　以上、本実施形態に係るパッケージ基板の製造方法では、まず、接合体７０をその間に挟み込むように第１基板３０と第２基板４０とを積層して第１積層基板１００を作製すると共に、接合体８０をその間に挟み込むように第３基板５０と第４基板６０とを積層して又は第３基板５０を含むように第２積層基板１１０，１１０Ａを作製している。そして、接合体９０をその間に挟み込むように第１積層基板１００と第２積層基板１１０，１１０Ａとを積層してパッケージ基板１を作製している。この場合、積層数を倍々で増やしていくことができるため、一層ずつ積層していく工法に比べて、パッケージ基板１を作製する期間を短くすることができる。一方、各積層板は、多数の基板を積層したものではないため、各配線層における位置ずれも生じづらい。よって、このパッケージ基板の製造方法によれば、各配線層の位置ずれを抑制しつつ多層基板であるパッケージ基板の作製を効率化することができる。 As described above, in the method for manufacturing a package substrate according to this embodiment, the first laminated substrate 100 is manufactured by stacking the first substrate 30 and the second substrate 40 so as to sandwich the joint 70 therebetween, and the third substrate 50 and the fourth substrate 60 are stacked so as to sandwich the joint 80 therebetween, or the second laminated substrate 110, 110A is manufactured so as to include the third substrate 50. Then, the package substrate 1 is manufactured by stacking the first laminated substrate 100 and the second laminated substrate 110, 110A so as to sandwich the joint 90 therebetween. In this case, since the number of layers can be doubled, the time required to manufacture the package substrate 1 can be shortened compared to a method of stacking layers one by one. On the other hand, since each laminate plate is not a stack of many substrates, misalignment in each wiring layer is unlikely to occur. Therefore, according to this method for manufacturing a package substrate, it is possible to efficiently manufacture a package substrate, which is a multilayer substrate, while suppressing misalignment in each wiring layer.

　また、本実施形態に係るパッケージ基板の製造方法では、絶縁層３１，４１，５１，６１は、硬化された熱硬化性樹脂を含む絶縁層であることが好ましい。この場合、各絶縁層は、その後の積層工程等における加熱によって溶融されることがなく、各配線層の位置ずれも生じにくい。よって、このパッケージ基板の製造方法によれば、各配線層における位置ずれをより確実に抑制することができる。 Furthermore, in the method for manufacturing a package substrate according to this embodiment, it is preferable that the insulating layers 31, 41, 51, and 61 are insulating layers containing a hardened thermosetting resin. In this case, the insulating layers are not melted by heating in the subsequent lamination process, etc., and misalignment of the wiring layers is unlikely to occur. Therefore, according to this method for manufacturing a package substrate, misalignment of the wiring layers can be more reliably suppressed.

　また、本実施形態に係るパッケージ基板の製造方法では、絶縁層３１，４１，５１，６１は、ガラス基板であってもよい。この場合、各絶縁層は、その後の積層工程等における加熱によって溶融されることがなく、各配線層の位置ずれも生じにくい。よって、このパッケージ基板の製造方法によれば、各配線層における位置ずれをより確実に抑制することができる。 Furthermore, in the method for manufacturing a package substrate according to this embodiment, the insulating layers 31, 41, 51, and 61 may be glass substrates. In this case, the insulating layers are not melted by heating in the subsequent lamination process, etc., and misalignment of the wiring layers is unlikely to occur. Therefore, this method for manufacturing a package substrate can more reliably suppress misalignment of the wiring layers.

　また、本実施形態に係るパッケージ基板の製造方法では、接合体７０は、第１積層基板１００を作製する前において、半硬化又は未硬化の熱硬化性樹脂を含む絶縁層であることが好ましい。接合体８０は、第２積層基板１１０を作製する前において、半硬化又は未硬化の熱硬化性樹脂を含む絶縁層であることが好ましい。この場合、第１基板３０と第２基板４０との接合、及び、第３基板５０と第４基板６０との接合を確実且つ容易に行うことができる。また、接合体９０は、パッケージ基板１を作製する前において、半硬化又は未硬化の熱硬化性樹脂を含む絶縁層であることが好ましい。この場合、第１積層基板１００と第２積層基板１１０との接合を確実且つ容易に行うことができる。 In addition, in the method for manufacturing a package substrate according to this embodiment, the bonding body 70 is preferably an insulating layer containing a semi-cured or uncured thermosetting resin before the first laminate substrate 100 is produced. The bonding body 80 is preferably an insulating layer containing a semi-cured or uncured thermosetting resin before the second laminate substrate 110 is produced. In this case, the bonding between the first substrate 30 and the second substrate 40 and the bonding between the third substrate 50 and the fourth substrate 60 can be performed reliably and easily. In addition, the bonding body 90 is preferably an insulating layer containing a semi-cured or uncured thermosetting resin before the package substrate 1 is produced. In this case, the bonding between the first laminate substrate 100 and the second laminate substrate 110 can be performed reliably and easily.

　また、本実施形態に係るパッケージ基板の製造方法では、接続ビア７２，８２は、ビア３４，５４及びビア４４，６４とは異なる平面方向における位置に設けられていてもよい。この場合、各配線層における配線パターンの設計自由度を向上させることができる。 Furthermore, in the method for manufacturing a package substrate according to this embodiment, the connection vias 72 and 82 may be provided at positions in a planar direction different from the vias 34 and 54 and the vias 44 and 64. In this case, the degree of freedom in designing the wiring pattern in each wiring layer can be improved.

　なお、図３に示すように、第１積層基板１００と第２積層基板１１０とを接合体９０で接合硬化したパッケージ基板１を第３積層基板として２つ作製し、接合体９０と同様の構成を有する別の接合体（第４接合体）を２つのパッケージ基板１（第３積層基板）の間に挟み込むように積層及び硬化して１６層の配線層を有するパッケージ基板（第４積層基板）を作製してもよい。この別の接合体は、接合体９０と同様に、接合材（第４接合材）と、この接合材を貫通する接続ビア（第４接続ビア）とを有している。このような作製をした場合、１６層といった層数がより多いパッケージ基板を効率的に作製することができる。 As shown in FIG. 3, two package substrates 1 formed by bonding and curing the first laminate substrate 100 and the second laminate substrate 110 with the bonding material 90 may be produced as the third laminate substrate, and another bonding material (fourth bonding material) having a similar configuration to the bonding material 90 may be sandwiched between the two package substrates 1 (third laminate substrates) and cured to produce a package substrate (fourth laminate substrate) having 16 wiring layers. Like the bonding material 90, this other bonding material has a bonding material (fourth bonding material) and connection vias (fourth connection vias) that penetrate the bonding material. When produced in this manner, a package substrate having a greater number of layers, such as 16 layers, can be efficiently produced.

　以上、本開示の実施形態について説明したが、本発明は上述した実施形態に限定されるものではなく、その趣旨を逸脱しない範囲で適宜変更を行ってもよい。例えば、上述したパッケージ基板の製造方法では、各基板を積層体にしたものをユニットとして貼り合わせるようになっている。このため、本実施形態に係るパッケージ基板の製造方法では、積層体を作製する前に（例えば、第１基板３０と第２基板４０とを図７に示すように積層する前に）に、図５及び図６に示すように、各基板に含まれる配線部３０ａ～３０ｆ，４０ａ～４０ｆに対して導通検査を行うようにしてもよい。この場合、各基板は複数の配線部を含む大判基板であり、導通検査は、基板の両面からフライング・プローブ等で各配線部の導通及び絶縁の検査を行うことにより行われる。導通検査の結果、不良（Ｆａｉｌ）と判定される配線部があった場合（図６を参照）、当該部分の製造を行わない又は当該基板を使用しないようにすることで、全体としての良品率（歩留まり）を向上させることができる。図５は、全ての配線部が良品（ＯＫ）の場合を示しており、図６は、一部の配線部が不良（Ｆａｉｌ）の場合を示している。図６の例では、例えば、良品（ＯＫ）が重なった配線部３０ｃ，４０ｃと配線部３０ｅ，４０ｅとをその後の製品として使用すると共に、他の配線部は不良（Ｆａｉｌ）であることが明確なため、その後の検査を省略できる。 The above describes the embodiments of the present disclosure, but the present invention is not limited to the above-mentioned embodiments, and appropriate modifications may be made without departing from the spirit of the present disclosure. For example, in the above-mentioned method for manufacturing a package substrate, each substrate is laminated and then bonded together as a unit. For this reason, in the method for manufacturing a package substrate according to the present embodiment, before the laminate is produced (for example, before the first substrate 30 and the second substrate 40 are laminated as shown in FIG. 7), a continuity test may be performed on the wiring portions 30a-30f, 40a-40f included in each substrate, as shown in FIG. 5 and FIG. 6. In this case, each substrate is a large substrate including a plurality of wiring portions, and the continuity test is performed by testing the continuity and insulation of each wiring portion from both sides of the substrate using a flying probe or the like. If the result of the continuity test indicates that a wiring portion is defective (Fail) (see FIG. 6), the overall yield rate (yield) can be improved by not manufacturing that portion or not using that substrate. Figure 5 shows a case where all wiring parts are good (OK), while Figure 6 shows a case where some wiring parts are defective (Fail). In the example of Figure 6, for example, wiring parts 30c, 40c and wiring parts 30e, 40e, which are overlapping good (OK), are used as the subsequent product, and since it is clear that the other wiring parts are defective (Fail), subsequent inspections can be omitted.

　また、複数の第１基板３０Ａ，３０Ｂ，３０Ｃを作製し、複数の第２基板４０Ａ，４０Ｂ，４０Ｃを作製する場合において、図８に示すように、複数の第１基板３０Ａ～３０Ｃのそれぞれにおける各配線部を検査する（ＯＫ又はＦａｉｌと判定）すると共に、複数の第２基板４０Ａ～４０Ｃのそれぞれにおける各配線部を検査しても（ＯＫ又はＦａｉｌと判定しても）よい。そして、図８に示すように、対応する第１基板３０Ａと第２基板４０Ａ、対応する第１基板３０Ｂと第２基板４０Ｂ、対応する第１基板３０Ｃと第２基板４０Ｃを、各接合体７０で貼り合わせるようにしてもよい。この場合、例えば、良品の配線部同士が重なる数は７個となる。一方、複数の第１基板３０Ａ～３０Ｃにおける各配線部の検査結果と、複数の第２基板４０Ａ～４０Ｃにおける各配線部の検査結果とに基づいて、図９に示すように、良品と判断された配線部同士がより多く重ね合わされるような選択処理を行い、第１基板と第２基板とを貼り合わせるようにしてもよい。この場合、例えば、図９に示すように、良品の配線部同士が重なる（ＯＫが重なる）数は１１個となる。このような選択処理は、コンピュータを用いて全ての基板同士を組み合わせた場合の良品率（歩留まり）を算出することによって選択してもよいし、その他の処理方法を用いてもよい。 Furthermore, when multiple first substrates 30A, 30B, 30C are produced and multiple second substrates 40A, 40B, 40C are produced, each wiring portion in each of the multiple first substrates 30A-30C may be inspected (determined as OK or Fail) and each wiring portion in each of the multiple second substrates 40A-40C may be inspected (determined as OK or Fail) as shown in Fig. 8. Then, corresponding first substrates 30A and second substrates 40A, corresponding first substrates 30B and second substrates 40B, and corresponding first substrates 30C and second substrates 40C may be bonded together with respective bonding bodies 70 as shown in Fig. 8. In this case, for example, the number of overlapping non-defective wiring portions is seven. On the other hand, based on the inspection results of each wiring section of the multiple first substrates 30A-30C and the inspection results of each wiring section of the multiple second substrates 40A-40C, a selection process may be performed so that more wiring sections determined to be good are overlapped, as shown in FIG. 9, and the first substrate and the second substrate may be bonded together. In this case, for example, as shown in FIG. 9, the number of overlapping good wiring sections (OK overlapping) is 11. This selection process may be performed by using a computer to calculate the quality rate (yield) when all substrates are combined, or other processing methods may be used.

　なお、上述した検査工程や良品の選択工程では、第１基板３０と第２基板４０とを貼り合わせる際を例にとって説明したが、これに限られるものではなく、第３基板５０と第４基板６０とを貼り合わせる際や、第１積層基板１００と第２積層基板１１０，１１０Ａとを貼り合わせる際に適用してももちろんよい。このような検査及び選択工程を行うことにより、絶縁層を一括積層する場合に比べて良品率を確実に向上させることができる。 In addition, the above-mentioned inspection process and selection process of good products have been described using the example of bonding the first substrate 30 and the second substrate 40 together, but the present invention is not limited to this, and may of course be applied when bonding the third substrate 50 and the fourth substrate 60 together, or when bonding the first laminate substrate 100 and the second laminate substrate 110, 110A together. By carrying out such inspection and selection processes, it is possible to reliably improve the rate of good products compared to the case where the insulating layers are laminated all at once.

　また、上述した実施形態では、パッケージ基板を作製する場合を例にとって説明したが、他の多層基板を作製する場合に適用してもよいことはもちろんである。 In addition, the above embodiment has been described using the example of manufacturing a package substrate, but it can of course also be applied to the manufacture of other multilayer substrates.

　１…パッケージ基板（多層基板、第３積層基板）、３０，３０Ａ～３０Ｃ…第１基板、３１…絶縁層（第１絶縁層）、３２…配線層（第１配線）、３３…配線層（第２配線）、３４…ビア（第１ビア）、４０，４０Ａ～４０Ｃ…第２基板、４１…絶縁層（第２絶縁層）、４２…配線層（第３配線）、４３…配線層（第４配線）、４４…ビア（第２ビア）、５０…第３基板、５１…絶縁層（第３絶縁層）、５２…配線層（第５配線）、５３…配線層（第６配線）、５４…ビア（第３ビア）、６０…第４基板、６１…絶縁層（第４絶縁層）、６２…配線層（第７配線）、６３…配線層（第８配線）、６４…ビア（第４ビア）、７０…接合体（第１接合体）、７１…接合材（第１接合材）、７２…接続ビア（第１接続ビア）、８０…接合体（第３接合体）、８１…接合材（第３接合材）、８２…接続ビア（第３接続ビア）、９０…接合体（第２接合体）、９１…接合材（第２接合材）、９２…接続ビア（第２接続ビア）、１００…第１積層基板、１１０，１１０Ａ…第２積層基板。 1...Package substrate (multilayer substrate, third laminate substrate), 30, 30A-30C...First substrate, 31...Insulating layer (first insulating layer), 32...Wiring layer (first wiring), 33...Wiring layer (second wiring), 34...Via (first via), 40, 40A-40C...Second substrate, 41...Insulating layer (second insulating layer), 42...Wiring layer (third wiring), 43...Wiring layer (fourth wiring), 44...Via (second via), 50...Third substrate, 51...Insulating layer (third insulating layer), 52...Wiring layer (fifth wiring), 53...Wiring layer (sixth wiring), 54...Via (third via) , 60...fourth substrate, 61...insulating layer (fourth insulating layer), 62...wiring layer (seventh wiring), 63...wiring layer (eighth wiring), 64...via (fourth via), 70...bonding body (first bonding body), 71...bonding material (first bonding material), 72...connecting via (first connecting via), 80...bonding body (third bonding body), 81...bonding material (third bonding material), 82...connecting via (third connecting via), 90...bonding body (second bonding body), 91...bonding material (second bonding material), 92...connecting via (second connecting via), 100...first laminated substrate, 110, 110A...second laminated substrate.

Claims

preparing a first substrate having a first insulating layer, a first wiring provided on a first surface of the first insulating layer, a second wiring provided on a second surface of the first insulating layer, and a first via penetrating the first insulating layer and connecting the first wiring and the second wiring to each other;
preparing a second substrate having a second insulating layer, a third wiring provided on a first surface of the second insulating layer, a fourth wiring provided on a second surface of the second insulating layer, and a second via penetrating the second insulating layer and connecting the third wiring and the fourth wiring to each other;
preparing a third substrate having a third insulating layer, a fifth wiring provided on a first surface of the third insulating layer, a sixth wiring provided on a second surface of the third insulating layer, and a third via penetrating the third insulating layer and connecting the fifth wiring and the sixth wiring to each other;
preparing a first bonding body having a first bonding material and a first connection via penetrating the first bonding material;
preparing a second bonding body having a second bonding material and a second connection via penetrating the second bonding material;
a step of stacking the first substrate and the second substrate so as to sandwich the first bonded body therebetween to produce a first laminated substrate;
preparing a second laminated substrate including the third substrate;
laminating the first laminated substrate and the second laminated substrate so as to sandwich the second bonded body therebetween to produce a third laminated substrate;
A method for manufacturing a multilayer substrate comprising the steps of:

preparing a fourth substrate having a fourth insulating layer, a seventh wiring provided on a first surface of the fourth insulating layer, an eighth wiring provided on a second surface of the fourth insulating layer, and a fourth via penetrating the fourth insulating layer and connecting the seventh wiring and the eighth wiring to each other;
preparing a third bonding body having a third bonding material and a third connection via penetrating the third bonding material;
In the step of preparing the second laminated substrate, the third substrate and the fourth substrate are laminated so as to sandwich the third bonded body therebetween to prepare the second laminated substrate.
The method for manufacturing a multilayer substrate according to claim 1 .

the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer are insulating layers containing a cured curable resin;
The method for manufacturing a multilayer substrate according to claim 1 or 2.

the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer are glass substrates;
The method for manufacturing a multilayer substrate according to claim 1 or 2.

The first bonding material is an insulating layer containing a semi-cured or uncured curable resin before the first laminated substrate is produced,
The second bonding material is an insulating layer containing a semi-cured or uncured curable resin before the third laminated substrate is produced.
A method for manufacturing a multilayer substrate according to any one of claims 1 to 4.

At least one of the first via, the second via, and the first connection via is provided at a position in a planar direction different from other vias.
A method for manufacturing a multilayer substrate according to any one of claims 1 to 5.

The first connection via is provided at a position in a planar direction different from the first via and the second via.
A method for manufacturing a multilayer substrate according to any one of claims 1 to 6.

The method further includes preparing a fourth bonding body having a fourth bonding material and a fourth connection via penetrating the fourth bonding material,
In the step of preparing the third laminated substrate, two third laminated substrates are prepared by stacking the first laminated substrate and the second laminated substrate so as to sandwich the second bonding material therebetween;
A fourth laminated substrate is produced by stacking two of the third laminated substrates so as to sandwich the fourth bonding material therebetween.
A method for manufacturing a multilayer substrate according to any one of claims 1 to 7.

The method further includes forming an external terminal on an outermost layer of the multilayer substrate.
A method for manufacturing a multilayer substrate according to any one of claims 1 to 8.

The multilayer substrate is a package substrate.
A method for manufacturing a multilayer substrate according to any one of claims 1 to 9.

The method further includes inspecting at least one of the first substrate, the second substrate, the third substrate, and the fourth substrate before stacking them.
A method for manufacturing a multilayer substrate according to any one of claims 1 to 10.

In the step of preparing the first substrate, a plurality of first substrates are prepared,
In the step of preparing the second substrate, a plurality of second substrates are prepared,
In the step of producing the first laminated substrate, a plurality of first laminated substrates are produced,
Each of the first substrates and each of the second substrates are large-sized substrates including a plurality of wiring portions,
In the inspecting step, each wiring portion of each of the plurality of first substrates is inspected, and each wiring portion of each of the plurality of second substrates is inspected;
In the step of producing the first laminated substrate, a combination of each of the plurality of first substrates and each of the plurality of second substrates is selected based on an inspection result in the step of inspecting.
The method for manufacturing a multilayer substrate according to claim 11.

In the step of preparing the first laminated substrate, a selection is made so that the wiring portions determined to be non-defective in the step of inspecting are superimposed on each other.
The method for manufacturing a multilayer substrate according to claim 12.

A package substrate manufactured by the method for manufacturing a multilayer substrate according to any one of claims 1 to 13;
a semiconductor element mounted on the package substrate;
A semiconductor device comprising: