ATE171813T1 - Verfahren zur herstellung von halbleitermikrochips - Google Patents

Verfahren zur herstellung von halbleitermikrochips

Info

Publication number
ATE171813T1
ATE171813T1 AT91913589T AT91913589T ATE171813T1 AT E171813 T1 ATE171813 T1 AT E171813T1 AT 91913589 T AT91913589 T AT 91913589T AT 91913589 T AT91913589 T AT 91913589T AT E171813 T1 ATE171813 T1 AT E171813T1
Authority
AT
Austria
Prior art keywords
pct
insulating layer
holes
sec
date
Prior art date
Application number
AT91913589T
Other languages
English (en)
Inventor
Edward Anthony Keible
Nicholas John Gregg Nort Smith
Original Assignee
Raychem Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raychem Ltd filed Critical Raychem Ltd
Application granted granted Critical
Publication of ATE171813T1 publication Critical patent/ATE171813T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/94—Laser ablative material removal

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Image Processing (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Formation Of Insulating Films (AREA)
  • Weting (AREA)
AT91913589T 1990-07-18 1991-07-16 Verfahren zur herstellung von halbleitermikrochips ATE171813T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB909015820A GB9015820D0 (en) 1990-07-18 1990-07-18 Processing microchips

Publications (1)

Publication Number Publication Date
ATE171813T1 true ATE171813T1 (de) 1998-10-15

Family

ID=10679291

Family Applications (1)

Application Number Title Priority Date Filing Date
AT91913589T ATE171813T1 (de) 1990-07-18 1991-07-16 Verfahren zur herstellung von halbleitermikrochips

Country Status (8)

Country Link
US (1) US5411918A (de)
EP (1) EP0539481B1 (de)
JP (1) JP3091222B2 (de)
AT (1) ATE171813T1 (de)
CA (1) CA2087429A1 (de)
DE (1) DE69130290T2 (de)
GB (1) GB9015820D0 (de)
WO (1) WO1992002038A1 (de)

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US5843363A (en) * 1995-03-31 1998-12-01 Siemens Aktiengesellschaft Ablation patterning of multi-layered structures
US5587342A (en) * 1995-04-03 1996-12-24 Motorola, Inc. Method of forming an electrical interconnect
GB2307785B (en) * 1995-11-29 1998-04-29 Simage Oy Forming contacts on semiconductor substrates for radiation detectors and imaging devices
US6809421B1 (en) * 1996-12-02 2004-10-26 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
US5874369A (en) * 1996-12-05 1999-02-23 International Business Machines Corporation Method for forming vias in a dielectric film
US6008070A (en) * 1998-05-21 1999-12-28 Micron Technology, Inc. Wafer level fabrication and assembly of chip scale packages
US6627998B1 (en) * 2000-07-27 2003-09-30 International Business Machines Corporation Wafer scale thin film package
US6521485B2 (en) * 2001-01-17 2003-02-18 Walsin Advanced Electronics Ltd Method for manufacturing wafer level chip size package
WO2002076666A2 (en) * 2001-03-22 2002-10-03 Xsil Technology Limited A laser machining system and method
JP4672199B2 (ja) * 2001-07-10 2011-04-20 富士通株式会社 電気的相互接続方法
TW533188B (en) 2001-07-20 2003-05-21 Getters Spa Support for microelectronic, microoptoelectronic or micromechanical devices
US7361171B2 (en) 2003-05-20 2008-04-22 Raydiance, Inc. Man-portable optical ablation system
US7115514B2 (en) * 2003-10-02 2006-10-03 Raydiance, Inc. Semiconductor manufacturing using optical ablation
US20050167405A1 (en) * 2003-08-11 2005-08-04 Richard Stoltz Optical ablation using material composition analysis
US8921733B2 (en) 2003-08-11 2014-12-30 Raydiance, Inc. Methods and systems for trimming circuits
US8173929B1 (en) 2003-08-11 2012-05-08 Raydiance, Inc. Methods and systems for trimming circuits
US9022037B2 (en) 2003-08-11 2015-05-05 Raydiance, Inc. Laser ablation method and apparatus having a feedback loop and control unit
US20050253245A1 (en) * 2004-05-12 2005-11-17 Mark Lynch Package design and method for electrically connecting die to package
US7575999B2 (en) * 2004-09-01 2009-08-18 Micron Technology, Inc. Method for creating conductive elements for semiconductor device structures using laser ablation processes and methods of fabricating semiconductor device assemblies
US9929080B2 (en) * 2004-11-15 2018-03-27 Intel Corporation Forming a stress compensation layer and structures formed thereby
US8135050B1 (en) 2005-07-19 2012-03-13 Raydiance, Inc. Automated polarization correction
US7444049B1 (en) 2006-01-23 2008-10-28 Raydiance, Inc. Pulse stretcher and compressor including a multi-pass Bragg grating
US8232687B2 (en) 2006-04-26 2012-07-31 Raydiance, Inc. Intelligent laser interlock system
US8189971B1 (en) 2006-01-23 2012-05-29 Raydiance, Inc. Dispersion compensation in a chirped pulse amplification system
TWI287273B (en) * 2006-01-25 2007-09-21 Advanced Semiconductor Eng Three dimensional package and method of making the same
TWI293499B (en) 2006-01-25 2008-02-11 Advanced Semiconductor Eng Three dimensional package and method of making the same
US7822347B1 (en) 2006-03-28 2010-10-26 Raydiance, Inc. Active tuning of temporal dispersion in an ultrashort pulse laser system
JP2011527637A (ja) * 2008-07-09 2011-11-04 エフ・イ−・アイ・カンパニー レーザ機械加工のための方法および装置
US8125704B2 (en) 2008-08-18 2012-02-28 Raydiance, Inc. Systems and methods for controlling a pulsed laser by combining laser signals
EP2200412A1 (de) 2008-12-17 2010-06-23 Nederlandse Organisatie voor toegepast-natuurwetenschappelijk Onderzoek TNO Flexibles elektronisches Produkt und Verfahren zu dessen Herstellung
KR101023296B1 (ko) * 2009-11-09 2011-03-18 삼성전기주식회사 포스트 범프 형성방법
JP5609186B2 (ja) * 2010-03-18 2014-10-22 株式会社リコー トナー担持体、現像装置及び画像形成装置
WO2012021748A1 (en) 2010-08-12 2012-02-16 Raydiance, Inc. Polymer tubing laser micromachining
US9120181B2 (en) 2010-09-16 2015-09-01 Coherent, Inc. Singulation of layered materials using selectively variable laser output
US9070851B2 (en) 2010-09-24 2015-06-30 Seoul Semiconductor Co., Ltd. Wafer-level light emitting diode package and method of fabricating the same
US9245828B2 (en) 2012-07-11 2016-01-26 Mindspeed Technologies, Inc. High speed signal conditioning package
US9433083B2 (en) 2014-04-04 2016-08-30 Macom Technology Solutions Holdings, Inc. Edge mount connector arrangement with improved characteristic impedance
CN205944139U (zh) 2016-03-30 2017-02-08 首尔伟傲世有限公司 紫外线发光二极管封装件以及包含此的发光二极管模块
CN111508926B (zh) * 2019-01-31 2022-08-30 奥特斯(中国)有限公司 一种部件承载件以及制造部件承载件的方法
US12416093B2 (en) * 2021-09-23 2025-09-16 Intel Corporation Electroless plating process

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US3893156A (en) * 1973-06-29 1975-07-01 Ibm Novel beam lead integrated circuit structure and method for making the same including automatic registration of beam leads with corresponding dielectric substrate leads
US4398993A (en) * 1982-06-28 1983-08-16 International Business Machines Corporation Neutralizing chloride ions in via holes in multilayer printed circuit boards
US4417948A (en) * 1982-07-09 1983-11-29 International Business Machines Corporation Self developing, photoetching of polyesters by far UV radiation
JPS6130059A (ja) * 1984-07-20 1986-02-12 Nec Corp 半導体装置の製造方法
US4824802A (en) * 1986-02-28 1989-04-25 General Electric Company Method of filling interlevel dielectric via or contact holes in multilevel VLSI metallization structures
US4764484A (en) * 1987-10-08 1988-08-16 Standard Microsystems Corporation Method for fabricating self-aligned, conformal metallization of semiconductor wafer
JP2633586B2 (ja) * 1987-10-21 1997-07-23 株式会社東芝 バンプ構造を有する半導体装置
FR2630588A1 (fr) * 1988-04-22 1989-10-27 Philips Nv Procede pour realiser une configuration d'interconnexion sur un dispositif semiconducteur notamment un circuit a densite d'integration elevee
US4861425A (en) * 1988-08-22 1989-08-29 International Business Machines Corporation Lift-off process for terminal metals
JPH0279437A (ja) * 1988-09-14 1990-03-20 Mitsubishi Electric Corp 半導体装置の製造方法
DE68914080T2 (de) * 1988-10-03 1994-10-20 Ibm Kontaktständerstruktur für Halbleitervorrichtungen.

Also Published As

Publication number Publication date
US5411918A (en) 1995-05-02
DE69130290D1 (de) 1998-11-05
WO1992002038A1 (en) 1992-02-06
CA2087429A1 (en) 1992-01-19
EP0539481B1 (de) 1998-09-30
DE69130290T2 (de) 1999-06-02
JP3091222B2 (ja) 2000-09-25
EP0539481A1 (de) 1993-05-05
JPH05509441A (ja) 1993-12-22
GB9015820D0 (en) 1990-09-05

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Legal Events

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REN Ceased due to non-payment of the annual fee