ATE219600T1 - Struktur einer abgleichbaren drosselspule - Google Patents

Struktur einer abgleichbaren drosselspule

Info

Publication number
ATE219600T1
ATE219600T1 AT95304818T AT95304818T ATE219600T1 AT E219600 T1 ATE219600 T1 AT E219600T1 AT 95304818 T AT95304818 T AT 95304818T AT 95304818 T AT95304818 T AT 95304818T AT E219600 T1 ATE219600 T1 AT E219600T1
Authority
AT
Austria
Prior art keywords
chip
matchable
throttle coil
inductive element
assembly
Prior art date
Application number
AT95304818T
Other languages
English (en)
Inventor
David John Pedder
Original Assignee
Intarsia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intarsia Corp filed Critical Intarsia Corp
Application granted granted Critical
Publication of ATE219600T1 publication Critical patent/ATE219600T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/28—Coils; Windings; Conductive connections
    • H01F27/29—Terminals; Tapping arrangements for signal inductances
    • H01F27/292—Surface mounted devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type
    • H01F17/0006—Printed inductances
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/501—Inductive arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Coils Or Transformers For Communication (AREA)
  • Means For Warming Up And Starting Carburetors (AREA)
  • Coils Of Transformers For General Uses (AREA)
  • Manufacturing Cores, Coils, And Magnets (AREA)
AT95304818T 1994-07-29 1995-07-10 Struktur einer abgleichbaren drosselspule ATE219600T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9415315A GB2292015B (en) 1994-07-29 1994-07-29 Trimmable inductor structure

Publications (1)

Publication Number Publication Date
ATE219600T1 true ATE219600T1 (de) 2002-07-15

Family

ID=10759074

Family Applications (1)

Application Number Title Priority Date Filing Date
AT95304818T ATE219600T1 (de) 1994-07-29 1995-07-10 Struktur einer abgleichbaren drosselspule

Country Status (6)

Country Link
US (1) US6005466A (de)
EP (1) EP0694933B1 (de)
JP (1) JPH0869936A (de)
AT (1) ATE219600T1 (de)
DE (1) DE69527119T2 (de)
GB (1) GB2292015B (de)

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JP2904086B2 (ja) * 1995-12-27 1999-06-14 日本電気株式会社 半導体装置およびその製造方法
US6310386B1 (en) * 1998-12-17 2001-10-30 Philips Electronics North America Corp. High performance chip/package inductor integration
US6303423B1 (en) * 1998-12-21 2001-10-16 Megic Corporation Method for forming high performance system-on-chip using post passivation process
US6130479A (en) * 1999-08-02 2000-10-10 International Business Machines Corporation Nickel alloy films for reduced intermetallic formation in solder
US6180445B1 (en) 2000-04-24 2001-01-30 Taiwan Semiconductor Manufacturing Company Method to fabricate high Q inductor by redistribution layer when flip-chip package is employed
US6856007B2 (en) * 2001-08-28 2005-02-15 Tessera, Inc. High-frequency chip packages
US7176506B2 (en) * 2001-08-28 2007-02-13 Tessera, Inc. High frequency chip packages with connecting elements
US7037298B2 (en) * 2001-12-20 2006-05-02 The Procter & Gamble Company Disposable absorbent article having a raised circumferential bank
US7754537B2 (en) 2003-02-25 2010-07-13 Tessera, Inc. Manufacture of mountable capped chips
US6972480B2 (en) 2003-06-16 2005-12-06 Shellcase Ltd. Methods and apparatus for packaging integrated circuit devices
US7352070B2 (en) * 2003-06-27 2008-04-01 Delphi Technologies, Inc. Polymer encapsulated electrical devices
WO2005004195A2 (en) 2003-07-03 2005-01-13 Shellcase Ltd. Method and apparatus for packaging integrated circuit devices
US6927663B2 (en) * 2003-07-23 2005-08-09 Cardiac Pacemakers, Inc. Flyback transformer wire attach method to printed circuit board
US7298030B2 (en) 2003-09-26 2007-11-20 Tessera, Inc. Structure and method of making sealed capped chips
US7158767B2 (en) * 2003-10-24 2007-01-02 Cts Corporation Tuneable frequency translator
US7280024B2 (en) * 2005-02-02 2007-10-09 Intel Corporation Integrated transformer structure and method of fabrication
US8143095B2 (en) 2005-03-22 2012-03-27 Tessera, Inc. Sequential fabrication of vertical conductive interconnects in capped chips
US8384189B2 (en) 2005-03-29 2013-02-26 Megica Corporation High performance system-on-chip using post passivation process
US7936062B2 (en) 2006-01-23 2011-05-03 Tessera Technologies Ireland Limited Wafer level chip packaging
US7538652B2 (en) * 2006-08-29 2009-05-26 International Business Machines Corporation Electrical component tuned by conductive layer deletion
US7791199B2 (en) * 2006-11-22 2010-09-07 Tessera, Inc. Packaged semiconductor chips
US8569876B2 (en) * 2006-11-22 2013-10-29 Tessera, Inc. Packaged semiconductor chips with array
US8604605B2 (en) 2007-01-05 2013-12-10 Invensas Corp. Microelectronic assembly with multi-layer support structure
JP5584474B2 (ja) * 2007-03-05 2014-09-03 インヴェンサス・コーポレイション 貫通ビアによって前面接点に接続された後面接点を有するチップ
CN103178032B (zh) 2007-07-31 2017-06-20 英闻萨斯有限公司 使用穿透硅通道的半导体封装方法
US8791575B2 (en) 2010-07-23 2014-07-29 Tessera, Inc. Microelectronic elements having metallic pads overlying vias
US8796135B2 (en) 2010-07-23 2014-08-05 Tessera, Inc. Microelectronic elements with rear contacts connected with via first or via middle structures
US9640437B2 (en) 2010-07-23 2017-05-02 Tessera, Inc. Methods of forming semiconductor elements using micro-abrasive particle stream
US8610259B2 (en) 2010-09-17 2013-12-17 Tessera, Inc. Multi-function and shielded 3D interconnects
US8847380B2 (en) 2010-09-17 2014-09-30 Tessera, Inc. Staged via formation from both sides of chip
KR101059490B1 (ko) * 2010-11-15 2011-08-25 테세라 리써치 엘엘씨 임베드된 트레이스에 의해 구성된 전도성 패드
US8587126B2 (en) 2010-12-02 2013-11-19 Tessera, Inc. Stacked microelectronic assembly with TSVs formed in stages with plural active chips
US8736066B2 (en) 2010-12-02 2014-05-27 Tessera, Inc. Stacked microelectronic assemby with TSVS formed in stages and carrier above chip
US8637968B2 (en) 2010-12-02 2014-01-28 Tessera, Inc. Stacked microelectronic assembly having interposer connecting active chips
US8610264B2 (en) 2010-12-08 2013-12-17 Tessera, Inc. Compliant interconnects in wafers
US20210233708A1 (en) * 2020-01-24 2021-07-29 Qorvo Us, Inc. Inductor trimming using sacrificial magnetically coupled loops

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2079066B (en) * 1980-06-23 1983-09-21 Hull Corp Trimmable electrical inductors
JPS58196005A (ja) * 1982-05-10 1983-11-15 Toutsuu:Kk インダクタおよびその製造方法
US4494100A (en) * 1982-07-12 1985-01-15 Motorola, Inc. Planar inductors
JPS63116410A (ja) * 1986-11-05 1988-05-20 Fujikura Ltd プリントコイルとそのインダクタンス調整方法
JPH01173702A (ja) * 1987-12-28 1989-07-10 Matsushita Electric Ind Co Ltd インダクタンス素子
US4905358A (en) * 1989-01-18 1990-03-06 Motorola, Inc. Thin film active trimmable capacitor/inductor
JPH02205309A (ja) * 1989-02-03 1990-08-15 Murata Mfg Co Ltd インダクタ
DE69021438T2 (de) * 1989-05-16 1996-01-25 Marconi Gec Ltd Verfahren zur Herstellung einer Flip-Chip-Lötstruktur für Anordnungen mit Gold-Metallisierung.
EP0529503A1 (de) * 1991-08-22 1993-03-03 Hewlett-Packard Company Flip-chip-Vorrichtung mit flexibler Befestigung
US5239289A (en) * 1991-09-04 1993-08-24 International Business Machines Corporation Tunable inductor
US5363080A (en) * 1991-12-27 1994-11-08 Avx Corporation High accuracy surface mount inductor
US5255431A (en) * 1992-06-26 1993-10-26 General Electric Company Method of using frozen epoxy for placing pin-mounted components in a circuit module
US5502667A (en) * 1993-09-13 1996-03-26 International Business Machines Corporation Integrated multichip memory module structure
GB2290913B (en) * 1994-06-30 1998-03-11 Plessey Semiconductors Ltd Multi-chip module inductor structure
US5534837A (en) * 1994-07-28 1996-07-09 Rockwell International Orthogonal-field electrically variable magnetic device

Also Published As

Publication number Publication date
JPH0869936A (ja) 1996-03-12
EP0694933A1 (de) 1996-01-31
GB9415315D0 (en) 1994-09-21
GB2292015A (en) 1996-02-07
GB2292015B (en) 1998-07-22
DE69527119D1 (de) 2002-07-25
DE69527119T2 (de) 2003-01-16
US6005466A (en) 1999-12-21
EP0694933B1 (de) 2002-06-19

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Legal Events

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