ATE246414T1 - Verfahren und vorrichtung zur reduzierung der verlustleistung in einer schaltung - Google Patents
Verfahren und vorrichtung zur reduzierung der verlustleistung in einer schaltungInfo
- Publication number
- ATE246414T1 ATE246414T1 AT99202910T AT99202910T ATE246414T1 AT E246414 T1 ATE246414 T1 AT E246414T1 AT 99202910 T AT99202910 T AT 99202910T AT 99202910 T AT99202910 T AT 99202910T AT E246414 T1 ATE246414 T1 AT E246414T1
- Authority
- AT
- Austria
- Prior art keywords
- power
- voltage
- instruction
- transistor
- selecting
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30083—Power or thermal control instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3246—Power saving characterised by the action undertaken by software initiated power-off
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Computing Systems (AREA)
- Computer Hardware Design (AREA)
- Software Systems (AREA)
- Mathematical Physics (AREA)
- Power Sources (AREA)
- Direct Current Feeding And Distribution (AREA)
- Amplifiers (AREA)
- Dc-Dc Converters (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US9963298P | 1998-09-09 | 1998-09-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE246414T1 true ATE246414T1 (de) | 2003-08-15 |
Family
ID=22275922
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT99202910T ATE246414T1 (de) | 1998-09-09 | 1999-09-09 | Verfahren und vorrichtung zur reduzierung der verlustleistung in einer schaltung |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP0991191B1 (de) |
| JP (1) | JP2000112587A (de) |
| AT (1) | ATE246414T1 (de) |
| DE (1) | DE69909924T2 (de) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3888070B2 (ja) | 2001-02-23 | 2007-02-28 | 株式会社ルネサステクノロジ | 消費電力制御インタフェースを有する論理回路モジュール及び該モジュールを記憶した記憶媒体 |
| JP2003110028A (ja) | 2001-10-01 | 2003-04-11 | Hitachi Ltd | データ処理装置 |
| US7100056B2 (en) | 2002-08-12 | 2006-08-29 | Hewlett-Packard Development Company, L.P. | System and method for managing processor voltage in a multi-processor computer system for optimized performance |
| US6983386B2 (en) * | 2002-08-12 | 2006-01-03 | Hewlett-Packard Development Company, L.P. | Voltage management of blades in a bladed architecture system based on thermal and power budget allocation |
| US7055044B2 (en) | 2002-08-12 | 2006-05-30 | Hewlett-Packard Development Company, L.P. | System and method for voltage management of a processor to optimize performance and power dissipation |
| US7080263B2 (en) * | 2002-08-12 | 2006-07-18 | Hewlett-Packard Development Company, L.P. | Voltage management of processors in a bladed system based on number of loaded processors |
| US7634668B2 (en) | 2002-08-22 | 2009-12-15 | Nvidia Corporation | Method and apparatus for adaptive power consumption |
| CN100407102C (zh) * | 2002-12-04 | 2008-07-30 | Nxp股份有限公司 | 基于软件的微处理器功率损耗控制 |
| KR101053010B1 (ko) | 2003-05-07 | 2011-07-29 | 모사이드 테크놀로지스, 인코포레이티드 | 파워 아일랜드를 사용한 집적 회로의 파워 관리 |
| DE102004061310B4 (de) * | 2004-12-20 | 2007-08-30 | Infineon Technologies Ag | Eingebettetes Datenverarbeitungssystem mit dynamischer Regelung der Leistungsaufnahme der Einzelkomponenten |
| US8700925B2 (en) | 2009-09-01 | 2014-04-15 | Nvidia Corporation | Regulating power using a fuzzy logic control system |
| US8826048B2 (en) | 2009-09-01 | 2014-09-02 | Nvidia Corporation | Regulating power within a shared budget |
| US9256265B2 (en) | 2009-12-30 | 2016-02-09 | Nvidia Corporation | Method and system for artificially and dynamically limiting the framerate of a graphics processing unit |
| US9830889B2 (en) | 2009-12-31 | 2017-11-28 | Nvidia Corporation | Methods and system for artifically and dynamically limiting the display resolution of an application |
| JP2011186512A (ja) * | 2010-03-04 | 2011-09-22 | Nec Corp | コンパイラ装置、及びコンパイル方法 |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0052157A1 (de) * | 1980-11-15 | 1982-05-26 | Deutsche ITT Industries GmbH | Binärer MOS-Carry-Look-Ahead-Paralleladdierer |
| US4893271A (en) * | 1983-11-07 | 1990-01-09 | Motorola, Inc. | Synthesized clock microcomputer with power saving |
| JPS6145354A (ja) * | 1984-08-10 | 1986-03-05 | Nec Corp | マイクロプロセツサ |
| US4667337A (en) * | 1985-08-28 | 1987-05-19 | Westinghouse Electric Corp. | Integrated circuit having outputs configured for reduced state changes |
| WO1989002120A1 (en) * | 1987-08-25 | 1989-03-09 | Hughes Aircraft Company | High-speed digital adding system |
| US5070262A (en) * | 1988-10-06 | 1991-12-03 | Texas Instruments Incorporated | Signal transmission circuit |
| US5021679A (en) * | 1989-06-30 | 1991-06-04 | Poqet Computer Corporation | Power supply and oscillator for a computer system providing automatic selection of supply voltage and frequency |
| KR910006849A (ko) * | 1989-09-29 | 1991-04-30 | 미다 가쓰시게 | 반도체 집적회로 장치 |
| US5159206A (en) * | 1990-07-31 | 1992-10-27 | Tsay Ching Yuh | Power up reset circuit |
| US5124951A (en) * | 1990-09-26 | 1992-06-23 | Sgs-Thomson Microelectronics, Inc. | Semiconductor memory with sequenced latched row line repeaters |
| US5220213A (en) * | 1991-03-06 | 1993-06-15 | Quicklogic Corporation | Programmable application specific integrated circuit and logic cell therefor |
| EP0503850A1 (de) * | 1991-03-13 | 1992-09-16 | AT&T Corp. | Mikroprozessor, der einen Bus mit niedriger Leistung hat |
| US5390350A (en) * | 1991-04-22 | 1995-02-14 | Western Digital Corporation | Integrated circuit chip core logic system controller with power saving features for a microcomputer system |
| JPH0620471A (ja) * | 1992-06-30 | 1994-01-28 | Hitachi Ltd | ダイナミック型ram |
| US5337284A (en) * | 1993-01-11 | 1994-08-09 | United Memories, Inc. | High voltage generator having a self-timed clock circuit and charge pump, and a method therefor |
| KR100281600B1 (ko) * | 1993-01-07 | 2001-03-02 | 가나이 쓰도무 | 전력저감 기구를 가지는 반도체 집적회로 |
| US5379302A (en) * | 1993-04-02 | 1995-01-03 | National Semiconductor Corporation | ECL test access port with low power control |
| US5438681A (en) * | 1993-08-24 | 1995-08-01 | Mensch, Jr.; William D. | Topography for CMOS microcomputer |
| US5584031A (en) * | 1993-11-09 | 1996-12-10 | Motorola Inc. | System and method for executing a low power delay instruction |
| US5504909A (en) * | 1994-01-21 | 1996-04-02 | Electronics Products Company | Power management apparatus collocated on the same integrated circuit as the functional unit that it manages |
| US5627492A (en) * | 1995-11-03 | 1997-05-06 | Motorola, Inc. | Circuit and method for isolating circuit blocks for reducing power dissipation |
-
1999
- 1999-09-09 JP JP11256315A patent/JP2000112587A/ja active Pending
- 1999-09-09 DE DE69909924T patent/DE69909924T2/de not_active Expired - Lifetime
- 1999-09-09 AT AT99202910T patent/ATE246414T1/de not_active IP Right Cessation
- 1999-09-09 EP EP99202910A patent/EP0991191B1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| DE69909924D1 (de) | 2003-09-04 |
| DE69909924T2 (de) | 2004-03-11 |
| EP0991191A3 (de) | 2001-03-14 |
| JP2000112587A (ja) | 2000-04-21 |
| EP0991191B1 (de) | 2003-07-30 |
| EP0991191A2 (de) | 2000-04-05 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |