ATE270001T1 - Verfahren zur trennung einer schicht - Google Patents

Verfahren zur trennung einer schicht

Info

Publication number
ATE270001T1
ATE270001T1 AT98302218T AT98302218T ATE270001T1 AT E270001 T1 ATE270001 T1 AT E270001T1 AT 98302218 T AT98302218 T AT 98302218T AT 98302218 T AT98302218 T AT 98302218T AT E270001 T1 ATE270001 T1 AT E270001T1
Authority
AT
Austria
Prior art keywords
layer
substrate
producing
porous
separated
Prior art date
Application number
AT98302218T
Other languages
English (en)
Inventor
Masaaki Iwane
Takao Yonehara
Kazuaki Ohmi
Original Assignee
Canon Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Kk filed Critical Canon Kk
Application granted granted Critical
Publication of ATE270001T1 publication Critical patent/ATE270001T1/de

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B43/00—Operations specially adapted for layered products and not otherwise provided for, e.g. repairing; Apparatus therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1924—Preparing SOI wafers with separation/delamination along a porous layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/96—Porous semiconductor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/974—Substrate surface preparation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate

Landscapes

  • Recrystallisation Techniques (AREA)
  • Photovoltaic Devices (AREA)
  • Separation Using Semi-Permeable Membranes (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
AT98302218T 1997-03-26 1998-03-24 Verfahren zur trennung einer schicht ATE270001T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7377097 1997-03-26

Publications (1)

Publication Number Publication Date
ATE270001T1 true ATE270001T1 (de) 2004-07-15

Family

ID=13527788

Family Applications (1)

Application Number Title Priority Date Filing Date
AT98302218T ATE270001T1 (de) 1997-03-26 1998-03-24 Verfahren zur trennung einer schicht

Country Status (8)

Country Link
US (1) US6140209A (de)
EP (1) EP0867923B1 (de)
KR (1) KR100266954B1 (de)
AT (1) ATE270001T1 (de)
AU (1) AU744858B2 (de)
CA (1) CA2232796C (de)
DE (1) DE69824655T2 (de)
TW (1) TW389958B (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7148119B1 (en) * 1994-03-10 2006-12-12 Canon Kabushiki Kaisha Process for production of semiconductor substrate
US6306729B1 (en) 1997-12-26 2001-10-23 Canon Kabushiki Kaisha Semiconductor article and method of manufacturing the same
FR2785217B1 (fr) * 1998-10-30 2001-01-19 Soitec Silicon On Insulator Procede et dispositif pour separer en deux tranches une plaque de materiau notamment semi-conducteur
JP2000223683A (ja) * 1999-02-02 2000-08-11 Canon Inc 複合部材及びその分離方法、貼り合わせ基板及びその分離方法、移設層の移設方法、並びにｓｏｉ基板の製造方法
FR2796491B1 (fr) * 1999-07-12 2001-08-31 Commissariat Energie Atomique Procede de decollement de deux elements et dispositif pour sa mise en oeuvre
JP3948930B2 (ja) * 2001-10-31 2007-07-25 大日本スクリーン製造株式会社 薄膜形成装置および薄膜形成方法
US7452757B2 (en) * 2002-05-07 2008-11-18 Asm America, Inc. Silicon-on-insulator structures and methods
JP2004140120A (ja) * 2002-10-16 2004-05-13 Canon Inc 多結晶シリコン基板
US7176528B2 (en) * 2003-02-18 2007-02-13 Corning Incorporated Glass-based SOI structures
US7399681B2 (en) 2003-02-18 2008-07-15 Corning Incorporated Glass-based SOI structures
KR20060017771A (ko) * 2003-05-06 2006-02-27 캐논 가부시끼가이샤 반도체기판, 반도체디바이스, 발광다이오드 및 그 제조방법
JP2004335642A (ja) * 2003-05-06 2004-11-25 Canon Inc 基板およびその製造方法
US20050124137A1 (en) * 2003-05-07 2005-06-09 Canon Kabushiki Kaisha Semiconductor substrate and manufacturing method therefor
JP2005005509A (ja) * 2003-06-12 2005-01-06 Canon Inc 薄膜トランジスタ及びその製造方法
US20050082526A1 (en) * 2003-10-15 2005-04-21 International Business Machines Corporation Techniques for layer transfer processing
JP2005135942A (ja) * 2003-10-28 2005-05-26 Canon Inc 電極配設方法
JP4771510B2 (ja) * 2004-06-23 2011-09-14 キヤノン株式会社 半導体層の製造方法及び基板の製造方法
WO2006012544A2 (en) * 2004-07-22 2006-02-02 The Board Of Trustees Of The Leland Stanford Junior University Germanium substrate-type materials and approach therefor
CN100527416C (zh) * 2004-08-18 2009-08-12 康宁股份有限公司 应变绝缘体上半导体结构以及应变绝缘体上半导体结构的制造方法
CN101091251B (zh) * 2004-08-18 2011-03-16 康宁股份有限公司 包含高应变玻璃或玻璃陶瓷的绝缘体上半导体结构
US7268051B2 (en) * 2005-08-26 2007-09-11 Corning Incorporated Semiconductor on glass insulator with deposited barrier layer
DE102005047509B4 (de) * 2005-10-04 2017-10-26 Degotec Gmbh Vorrichtung zur Separierung eines flächigen Objektes von einem Körper, mit dem das Objekt mittels Adhäsionskraft verbunden ist
US7691730B2 (en) * 2005-11-22 2010-04-06 Corning Incorporated Large area semiconductor on glass insulator
US20070264796A1 (en) * 2006-05-12 2007-11-15 Stocker Mark A Method for forming a semiconductor on insulator structure
JP5171016B2 (ja) * 2006-10-27 2013-03-27 キヤノン株式会社 半導体部材、半導体物品の製造方法、その製造方法を用いたｌｅｄアレイ
US20080277778A1 (en) 2007-05-10 2008-11-13 Furman Bruce K Layer Transfer Process and Functionally Enhanced Integrated Circuits Products Thereby
JP2009094144A (ja) * 2007-10-04 2009-04-30 Canon Inc 発光素子の製造方法
DE102007050483A1 (de) 2007-10-19 2009-09-10 Meyer Burger Ag Mischung aus einem thixotropen Dispersionsmedium sowie abrasiv wirkenden Körnern als Schleifmittel
US8950459B2 (en) 2009-04-16 2015-02-10 Suss Microtec Lithography Gmbh Debonding temporarily bonded semiconductor wafers
US8366873B2 (en) * 2010-04-15 2013-02-05 Suss Microtec Lithography, Gmbh Debonding equipment and methods for debonding temporary bonded wafers
US8764026B2 (en) * 2009-04-16 2014-07-01 Suss Microtec Lithography, Gmbh Device for centering wafers
US8592294B2 (en) * 2010-02-22 2013-11-26 Asm International N.V. High temperature atomic layer deposition of dielectric oxides
US9755015B1 (en) 2016-05-10 2017-09-05 Globalfoundries Inc. Air gaps formed by porous silicon removal
CN108242424B (zh) 2016-12-26 2019-09-03 京东方科技集团股份有限公司 柔性面板的制作方法、柔性面板及显示装置
WO2020078559A1 (en) * 2018-10-18 2020-04-23 Applied Materials, Inc. Holding device for holding a substrate, carrier for holding a substrate, and method for releasing a substrate from a holding device
CN111855636B (zh) * 2019-04-29 2023-10-27 中国科学院微电子研究所 一种sers基底

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4445965A (en) * 1980-12-01 1984-05-01 Carnegie-Mellon University Method for making thin film cadmium telluride and related semiconductors for solar cells
JPH01156480A (ja) * 1987-12-14 1989-06-20 Somar Corp 薄膜剥離装置
SG59963A1 (en) * 1990-08-03 1999-02-22 Canon Kk Semiconductor member and process for preparing semiconductor member
FR2681472B1 (fr) * 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
JP3257580B2 (ja) * 1994-03-10 2002-02-18 キヤノン株式会社 半導体基板の作製方法
JP3381443B2 (ja) * 1995-02-02 2003-02-24 ソニー株式会社 基体から半導体層を分離する方法、半導体素子の製造方法およびｓｏｉ基板の製造方法
EP0757377B1 (de) * 1995-08-02 2003-04-09 Canon Kabushiki Kaisha Halbleitersubstrat und Herstellungsverfahren

Also Published As

Publication number Publication date
EP0867923A3 (de) 1999-07-28
DE69824655T2 (de) 2005-08-04
AU5952398A (en) 1998-10-01
KR19980080586A (ko) 1998-11-25
CA2232796A1 (en) 1998-09-26
KR100266954B1 (ko) 2000-10-02
EP0867923A2 (de) 1998-09-30
EP0867923B1 (de) 2004-06-23
DE69824655D1 (de) 2004-07-29
US6140209A (en) 2000-10-31
TW389958B (en) 2000-05-11
CA2232796C (en) 2002-01-22
AU744858B2 (en) 2002-03-07

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