ATE314661T1 - Schaltung und verfahren zum testen und kalibrieren - Google Patents

Schaltung und verfahren zum testen und kalibrieren

Info

Publication number
ATE314661T1
ATE314661T1 AT00972272T AT00972272T ATE314661T1 AT E314661 T1 ATE314661 T1 AT E314661T1 AT 00972272 T AT00972272 T AT 00972272T AT 00972272 T AT00972272 T AT 00972272T AT E314661 T1 ATE314661 T1 AT E314661T1
Authority
AT
Austria
Prior art keywords
channel
time varying
solid state
varying signal
state switch
Prior art date
Application number
AT00972272T
Other languages
English (en)
Inventor
Steven Hauptman
Original Assignee
Teradyne Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teradyne Inc filed Critical Teradyne Inc
Application granted granted Critical
Publication of ATE314661T1 publication Critical patent/ATE314661T1/de

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31908—Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns
    • G01R31/3191—Calibration
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Tests Of Electronic Circuits (AREA)
AT00972272T 1999-10-19 2000-10-18 Schaltung und verfahren zum testen und kalibrieren ATE314661T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/420,497 US6331783B1 (en) 1999-10-19 1999-10-19 Circuit and method for improved test and calibration in automated test equipment
PCT/US2000/028915 WO2001029571A1 (en) 1999-10-19 2000-10-18 Circuit and method for improved test and calibration in automated test equipment

Publications (1)

Publication Number Publication Date
ATE314661T1 true ATE314661T1 (de) 2006-01-15

Family

ID=23666728

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00972272T ATE314661T1 (de) 1999-10-19 2000-10-18 Schaltung und verfahren zum testen und kalibrieren

Country Status (9)

Country Link
US (1) US6331783B1 (de)
EP (1) EP1224487B1 (de)
JP (1) JP4689125B2 (de)
KR (1) KR100731344B1 (de)
AT (1) ATE314661T1 (de)
DE (1) DE60025247T2 (de)
MY (1) MY124977A (de)
TW (1) TW589463B (de)
WO (1) WO2001029571A1 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100402653B1 (ko) * 1999-08-16 2003-10-22 가부시키가이샤 아드반테스트 Ｉｃ 시험장치의 타이밍 교정방법 및 그 교정방법을이용한 교정기능을 갖는 ｉｃ 시험장치
JP4291494B2 (ja) * 2000-04-04 2009-07-08 株式会社アドバンテスト Ｉｃ試験装置のタイミング校正装置
US20030110427A1 (en) * 2000-04-12 2003-06-12 Advantest Corporation Semiconductor test system storing pin calibration data in non-volatile memory
US20040181731A1 (en) * 2000-04-12 2004-09-16 Advantest Corporation Semiconductor test system storing pin calibration data, commands and other data in non-volatile memory
US6563298B1 (en) 2000-08-15 2003-05-13 Ltx Corporation Separating device response signals from composite signals
US7337088B2 (en) * 2001-05-23 2008-02-26 Micron Technology, Inc. Intelligent measurement modular semiconductor parametric test system
US6570397B2 (en) 2001-08-07 2003-05-27 Agilent Technologies, Inc. Timing calibration and timing calibration verification of electronic circuit testers
US6661242B1 (en) * 2001-12-20 2003-12-09 Xilinx, Inc. Using a DUT pin at known voltage to determine channel path resistance in automated test equipment test channels
US7162386B2 (en) * 2002-04-25 2007-01-09 Micron Technology, Inc. Dynamically adaptable semiconductor parametric testing
US6836136B2 (en) * 2002-12-18 2004-12-28 Teradyne, Inc. Pin driver for AC and DC semiconductor device testing
US6879175B2 (en) * 2003-03-31 2005-04-12 Teradyne, Inc. Hybrid AC/DC-coupled channel for automatic test equipment
US7010451B2 (en) * 2003-04-17 2006-03-07 Micron Technology, Inc. Dynamic creation and modification of wafer test maps during wafer testing
DE10335164B4 (de) 2003-07-30 2007-03-22 Infineon Technologies Ag Vorrichtung und Verfahren zum parallelen Testen von mehreren integrierten Schaltkreisen
US7508228B2 (en) * 2004-12-21 2009-03-24 Teradyne, Inc. Method and system for monitoring test signals for semiconductor devices
KR100618899B1 (ko) * 2005-06-08 2006-09-01 삼성전자주식회사 Ｒｆ 소자에서 ｒｆ와 ｄｃ 테스트가 가능한 장치 및 방법
TW200831923A (en) * 2007-01-19 2008-08-01 King Yuan Electronics Co Ltd Device and method for DC and system level test integration
US7489125B2 (en) * 2007-04-02 2009-02-10 Teradyne, Inc. Calibrating a tester using ESD protection circuitry
KR101602084B1 (ko) 2011-11-09 2016-03-21 주식회사 아도반테스토 테스트 대상 디바이스와 자동 테스트 장비 사이에서 교환되고 있는 신호를 추출하는 개념
KR101279737B1 (ko) * 2012-03-29 2013-06-27 주식회사 에프티랩 스위칭부재를 이용한 정전용량방식 터치스크린패널 검사장치 및 검사방법
CN102944858B (zh) * 2012-11-12 2014-12-03 无锡市计量测试中心 剩余电流动作保护器动作特性检测仪校验仪分断开关
CN104656003B (zh) * 2013-11-22 2017-07-07 英业达科技有限公司 信号电路板与测试电路板配置系统及其方法
TWI490512B (zh) * 2013-11-28 2015-07-01 英業達股份有限公司 訊號電路板與測試電路板配置系統及其方法
US12099085B2 (en) 2021-05-18 2024-09-24 Analog Devices International Unlimited Company Apparatuses and methods for testing semiconductor circuitry using microelectromechanical systems switches

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4354268A (en) * 1980-04-03 1982-10-12 Santek, Inc. Intelligent test head for automatic test system
US4806852A (en) * 1984-09-07 1989-02-21 Megatest Corporation Automatic test system with enhanced performance of timing generators
JPH0697256B2 (ja) 1986-04-14 1994-11-30 株式会社アドバンテスト Ａｃレベル校正装置
JP2515914Y2 (ja) * 1988-06-15 1996-11-06 株式会社アドバンテスト Ｉｃ試験装置のタイミング校正装置
JP2582906B2 (ja) 1989-10-21 1997-02-19 東芝マイクロエレクトロニクス株式会社 半導体装置の直流電流・電圧特性の測定方法
JPH0712940Y2 (ja) * 1989-11-06 1995-03-29 株式会社アドバンテスト Ｉｃ試験装置
US5200696A (en) * 1990-09-10 1993-04-06 Ltx Corporation Test system apparatus with Schottky diodes with programmable voltages
US5101153A (en) 1991-01-09 1992-03-31 National Semiconductor Corporation Pin electronics test circuit for IC device testing
US5402079A (en) 1992-12-18 1995-03-28 Vlsi Technology, Inc. Integrated circuit relay control system
US5621329A (en) 1995-04-13 1997-04-15 Industrial Technology Research Institute Automatic self-calibration system for digital teraohmmeter
JP3075135B2 (ja) * 1995-04-14 2000-08-07 横河電機株式会社 Ｌｓｉテスタ
US5917331A (en) 1995-10-23 1999-06-29 Megatest Corporation Integrated circuit test method and structure
JP3134745B2 (ja) 1995-10-31 2001-02-13 安藤電気株式会社 リレー制御回路
JPH09281182A (ja) 1996-04-10 1997-10-31 Advantest Corp 測定ボードおよびその測定ボードを用いたｉ／ｏ端子試験システム
JPH09281188A (ja) 1996-04-15 1997-10-31 Advantest Corp Ｉｃ試験装置
JPH1082837A (ja) * 1996-09-06 1998-03-31 Advantest Corp Ｌｓｉ試験装置
US6133725A (en) * 1998-03-26 2000-10-17 Teradyne, Inc. Compensating for the effects of round-trip delay in automatic test equipment

Also Published As

Publication number Publication date
EP1224487A1 (de) 2002-07-24
DE60025247D1 (de) 2006-02-02
KR100731344B1 (ko) 2007-06-21
US6331783B1 (en) 2001-12-18
JP2003512630A (ja) 2003-04-02
MY124977A (en) 2006-07-31
DE60025247T2 (de) 2006-08-31
JP4689125B2 (ja) 2011-05-25
KR20020062630A (ko) 2002-07-26
TW589463B (en) 2004-06-01
WO2001029571A1 (en) 2001-04-26
EP1224487B1 (de) 2005-12-28

Similar Documents

Publication Publication Date Title
ATE314661T1 (de) Schaltung und verfahren zum testen und kalibrieren
WO2001079863A3 (en) Method and apparatus for testing signal paths between an integrated circuit wafer and a wafer tester
WO2005072406A3 (en) Test system and method for reduced index time
WO2004040324A3 (en) A method of and apparatus for testing for integrated circuit contact defects
DE69826225D1 (de) Verfahren zum test von empfängern bei polarisationsmodendispersion mit inkrementaler verzögerungsschaltung
WO2008028171A3 (en) Method and apparatus for switching tester resources
DE59007516D1 (de) Prüfvorrichtung zum prüfen von elektrischen oder elektronischen prüflingen.
DE69734866D1 (de) Prüfadapter mit Kontaktstiftführung für bestückte Leiterplatten
WO1996029610A3 (en) Manufacturing defect analyzer with improved fault coverage
EP0800091A3 (de) Apparat und Verfahren zum Testen eines Halbleiterelements und Halbleiterelement
SG166782A1 (en) Planar voltage contrast test structure and method
WO2002021893A3 (de) Verfahren und vorrichtung zum prüfen von leiterplatten mit einem paralleltester
ATE314657T1 (de) Verfahren und vorrichtung zum prüfen von leiterplatten
TW368712B (en) General burn-in device
ATE291743T1 (de) Verfahren zur detektion einer fehlerhaften masseverbindung in einer elektrischen einrichtung insbesondere eines kraftfahrzeugs
PL351223A1 (en) Integrated circuit testing method
DE59712909D1 (de) Adapter zum Prüfen von elektrischen Leiterplatten
FR2780792B1 (fr) Appareillage de test de puces electroniques
WO2007055713A3 (en) Pin electronics implemented system and method for reduced index time
ATE166724T1 (de) Verfahren zum ermitteln einer elektrischen kenngrösse
DK0835202T3 (da) Detekteringsanordning til en kortslutningsforbindelse til en jernbanestrækning
DE69902512D1 (de) System und Verfahren zur Prüfhalterungscharakterisierung
ATE238560T1 (de) Leiterplattenprüfvorrichtung
SE8301362L (sv) Kretsanordning for en utrustning, med vilken olika drift- och provningsforlopp astadkommes och analyseras, serskilt for trafiksimulering i telefonvexlar
WO2003016922A3 (en) Electronic circuit and method for testing

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties