ATE331287T1 - Einfache chipidentifizierung - Google Patents

Einfache chipidentifizierung

Info

Publication number
ATE331287T1
ATE331287T1 AT01962828T AT01962828T ATE331287T1 AT E331287 T1 ATE331287 T1 AT E331287T1 AT 01962828 T AT01962828 T AT 01962828T AT 01962828 T AT01962828 T AT 01962828T AT E331287 T1 ATE331287 T1 AT E331287T1
Authority
AT
Austria
Prior art keywords
electrical device
controller
response
chip identification
special mode
Prior art date
Application number
AT01962828T
Other languages
English (en)
Inventor
Martin Isberg
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Application granted granted Critical
Publication of ATE331287T1 publication Critical patent/ATE331287T1/de

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/401—Marks applied to devices, e.g. for alignment or identification for identification or tracking
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/401—Marks applied to devices, e.g. for alignment or identification for identification or tracking
    • H10W46/403—Marks applied to devices, e.g. for alignment or identification for identification or tracking for non-wireless electrical read out

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Peptides Or Proteins (AREA)
  • Polysaccharides And Polysaccharide Derivatives (AREA)
AT01962828T 2000-07-12 2001-07-05 Einfache chipidentifizierung ATE331287T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/614,583 US6483335B1 (en) 2000-07-12 2000-07-12 Simple chip identification

Publications (1)

Publication Number Publication Date
ATE331287T1 true ATE331287T1 (de) 2006-07-15

Family

ID=24461883

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01962828T ATE331287T1 (de) 2000-07-12 2001-07-05 Einfache chipidentifizierung

Country Status (8)

Country Link
US (1) US6483335B1 (de)
EP (1) EP1299883B1 (de)
KR (1) KR20030015887A (de)
AT (1) ATE331287T1 (de)
AU (1) AU2001283923A1 (de)
DE (1) DE60120978T2 (de)
MY (1) MY124516A (de)
WO (1) WO2002009114A2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10319935A1 (de) * 2003-05-02 2004-11-18 Deutsche Thomson-Brandt Gmbh Verfahren zur Bereitstellung einer Bedienoberfläche zur Bedienung eines Gerätes in einem Netzwerk verteilter Stationen sowie Netzwerkgerät für die Durchführung des Verfahrens
KR100700150B1 (ko) * 2004-10-06 2007-03-29 주식회사 미래엔지니어링 오·폐수 중 질소제거장치 및 이를 이용한 질소제거방법
US7960985B2 (en) * 2008-01-25 2011-06-14 Hewlett-Packard Development Company, L.P. Identification of integrated circuit

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS514791B1 (de) 1971-03-16 1976-02-14
EP0128986B1 (de) * 1982-12-23 1991-02-27 Sumitomo Electric Industries Limited Monolithische integrierte Mikrowellenschaltung und Verfahren zum Auswählen derselben
JPH0382560A (ja) 1989-08-25 1991-04-08 Sharp Corp サーマルヘッド検査方式
JPH0555339A (ja) 1991-08-23 1993-03-05 Fujitsu Ltd 半導体デバイス測定装置
JPH08136612A (ja) 1994-11-04 1996-05-31 Hitachi Ltd 電子装置の電気特性測定方法および測定装置
US6202181B1 (en) * 1996-11-04 2001-03-13 The Regents Of The University Of California Method for diagnosing bridging faults in integrated circuits
US6222358B1 (en) * 1997-08-25 2001-04-24 Ntc, Inc. Automatic circuit locator
DE19852917A1 (de) 1998-11-17 2000-05-25 Bosch Gmbh Robert Verfahren und Anordnung zur Ermittlung der Leerlaufspannung einer Batterie

Also Published As

Publication number Publication date
WO2002009114A2 (en) 2002-01-31
AU2001283923A1 (en) 2002-02-05
EP1299883B1 (de) 2006-06-21
DE60120978T2 (de) 2006-11-09
MY124516A (en) 2006-06-30
EP1299883A2 (de) 2003-04-09
KR20030015887A (ko) 2003-02-25
US6483335B1 (en) 2002-11-19
DE60120978D1 (de) 2006-08-03
WO2002009114A3 (en) 2002-07-18

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties