ATE38742T1 - Selektives aetzverfahren fuer eine halbleitermehrschichtstruktur. - Google Patents

Selektives aetzverfahren fuer eine halbleitermehrschichtstruktur.

Info

Publication number
ATE38742T1
ATE38742T1 AT85303005T AT85303005T ATE38742T1 AT E38742 T1 ATE38742 T1 AT E38742T1 AT 85303005 T AT85303005 T AT 85303005T AT 85303005 T AT85303005 T AT 85303005T AT E38742 T1 ATE38742 T1 AT E38742T1
Authority
AT
Austria
Prior art keywords
layer
top layer
recesses
layers
etching
Prior art date
Application number
AT85303005T
Other languages
English (en)
Inventor
D S O C O M Jones M S - Renner
Transm Systems Div Collins
Original Assignee
Stc Plc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stc Plc filed Critical Stc Plc
Application granted granted Critical
Publication of ATE38742T1 publication Critical patent/ATE38742T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/64—Wet etching of semiconductor materials
    • H10P50/642—Chemical etching
    • H10P50/646—Chemical etching of Group III-V materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/692—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their composition, e.g. multilayer masks or materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/693—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/693—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane
    • H10P50/695—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask

Landscapes

  • Semiconductor Lasers (AREA)
  • Bipolar Transistors (AREA)
  • Weting (AREA)
  • Heterocyclic Carbon Compounds Containing A Hetero Ring Having Oxygen Or Sulfur (AREA)
  • Recrystallisation Techniques (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Drying Of Semiconductors (AREA)
AT85303005T 1984-06-28 1985-04-29 Selektives aetzverfahren fuer eine halbleitermehrschichtstruktur. ATE38742T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB08416412A GB2160823B (en) 1984-06-28 1984-06-28 Semiconductor devices and their fabrication
EP85303005A EP0176166B1 (de) 1984-06-28 1985-04-29 Selektives Ätzverfahren für eine Halbleiter-Mehrschichtstruktur

Publications (1)

Publication Number Publication Date
ATE38742T1 true ATE38742T1 (de) 1988-12-15

Family

ID=10563083

Family Applications (1)

Application Number Title Priority Date Filing Date
AT85303005T ATE38742T1 (de) 1984-06-28 1985-04-29 Selektives aetzverfahren fuer eine halbleitermehrschichtstruktur.

Country Status (6)

Country Link
US (1) US4662988A (de)
EP (1) EP0176166B1 (de)
JP (1) JPS6118135A (de)
AT (1) ATE38742T1 (de)
DE (1) DE3566328D1 (de)
GB (1) GB2160823B (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4777148A (en) * 1985-01-30 1988-10-11 Massachusetts Institute Of Technology Process for making a mesa GaInAsP/InP distributed feedback laser
GB2175442B (en) * 1985-05-15 1989-05-24 Stc Plc Laser manufacture
US4764246A (en) * 1985-08-06 1988-08-16 American Telephone And Telegraph Company, At&T Bell Laboratories Buried undercut mesa-like waveguide and method of making same
JPH0716077B2 (ja) * 1985-10-11 1995-02-22 三菱電機株式会社 半導体レーザ装置の製造方法
GB8618373D0 (en) * 1986-07-28 1986-09-03 British Telecomm Fabrication technique
EP0293185B1 (de) * 1987-05-26 1994-02-02 Kabushiki Kaisha Toshiba Halbleiterlaservorrichtung und Verfahren zu ihrer Herstellung
US4858241A (en) * 1987-05-26 1989-08-15 Kabushiki Kaisha Toshiba Semiconductor laser device
JPS6461081A (en) * 1987-09-01 1989-03-08 Japan Res Dev Corp Distributed-feedback type semiconductor laser and manufacture thereof
KR910008439B1 (ko) * 1989-04-06 1991-10-15 재단법인 한국전자통신연구소 매립형 레이저 다이오드의 제조방법
US4980314A (en) * 1989-06-06 1990-12-25 At&T Bell Laboratories Vapor processing of a substrate
US4944838A (en) * 1989-08-03 1990-07-31 At&T Bell Laboratories Method of making tapered semiconductor waveguides
US5222091A (en) * 1990-09-14 1993-06-22 Gte Laboratories Incorporated Structure for indium phosphide/indium gallium arsenide phosphide buried heterostructure semiconductor
US5082799A (en) * 1990-09-14 1992-01-21 Gte Laboratories Incorporated Method for fabricating indium phosphide/indium gallium arsenide phosphide buried heterostructure semiconductor lasers
US5270245A (en) * 1992-11-27 1993-12-14 Motorola, Inc. Method of forming a light emitting diode
TW347597B (en) * 1994-01-31 1998-12-11 Mitsubishi Chem Corp Method of forming a groove in a semiconductor laser diode and a semiconductor laser diode
DE4427840A1 (de) * 1994-07-28 1996-02-01 Osa Elektronik Gmbh Verfahren zur Effizienzerhöhung von A¶I¶¶I¶¶I¶B¶V¶ - Halbleiter-Chips
CN104409605B (zh) * 2014-11-28 2017-10-27 杭州士兰明芯科技有限公司 一种高压芯片led结构及其制作方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7505134A (nl) * 1975-05-01 1976-11-03 Philips Nv Werkwijze voor het vervaardigen van een half- geleiderinrichting.
GB2114808B (en) * 1981-12-01 1985-10-09 Standard Telephones Cables Ltd Semiconductor laser manufacture
US4468850A (en) * 1982-03-29 1984-09-04 Massachusetts Institute Of Technology GaInAsP/InP Double-heterostructure lasers

Also Published As

Publication number Publication date
EP0176166A1 (de) 1986-04-02
EP0176166B1 (de) 1988-11-17
GB8416412D0 (en) 1984-08-01
DE3566328D1 (en) 1988-12-22
US4662988A (en) 1987-05-05
JPS6118135A (ja) 1986-01-27
GB2160823B (en) 1987-05-28
GB2160823A (en) 1986-01-02

Similar Documents

Publication Publication Date Title
ATE38742T1 (de) Selektives aetzverfahren fuer eine halbleitermehrschichtstruktur.
JPS5640291A (en) Preparation of semiconductor laser element
JPS55165691A (en) Compound semiconductor laser element
JPS5710992A (en) Semiconductor device and manufacture therefor
EP0365107A3 (de) Verfahren zur Herstellung von vertikalleitenden Halbleiterbauelementen
JPS57176772A (en) Semiconductor device and manufacture thereof
DE3879213D1 (de) Verfahren zur selbstjustierten herstellung von kontakten zwischen in uebereinander angeordneten verdrahtungsebenen einer integrierten schaltung enthaltenen leiterbahnen.
JPS5783082A (en) Two wave length semiconductor laser device
DE3877973D1 (de) Laserdiode mit vergrabener aktiver schicht und seitlicher strombegrenzung und verfahren zu deren herstellung.
JPS5513904A (en) Semiconductor device and its manufacturing method
KR910013566A (ko) 실리콘-온-인슐레이터(silicon-on-insulator) 구조를 갖는 반도체 장치 및 그의 제조 방법
JPS6450591A (en) Semiconductor device and manufacture thereof
JPS57172790A (en) Semiconductor laser device
JPS5575281A (en) Manufacturing method of semiconductor device
JPS6453489A (en) Planar electrode type semiconductor element
JPS6450590A (en) Semiconductor laser
JPS54107286A (en) Production of semiconductor junction laser element
JPS6457690A (en) Manufacture of semiconductor laser device
JPS5748286A (en) Manufacture of buried hetero structured semiconductor laser
JPS6449292A (en) Semiconductor light-emitting device
KR920013833A (ko) 반도체 레이저 다이오드 및 그 제조방법
SU1840163A1 (ru) Способ изготовления диэлектрической изоляции элементов интегральных схем
JPS56110289A (en) Manufacture of semiconductor laser element
KR930015218A (ko) 반도체 레이저 다이오드 제조방법
JPS6477982A (en) Machining method of substrate

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties