ATE435461T1 - Gemeinsamer programmspeicher für mehrkern-dsp- bausteine - Google Patents

Gemeinsamer programmspeicher für mehrkern-dsp- bausteine

Info

Publication number
ATE435461T1
ATE435461T1 AT01000601T AT01000601T ATE435461T1 AT E435461 T1 ATE435461 T1 AT E435461T1 AT 01000601 T AT01000601 T AT 01000601T AT 01000601 T AT01000601 T AT 01000601T AT E435461 T1 ATE435461 T1 AT E435461T1
Authority
AT
Austria
Prior art keywords
memory
program
program memory
access
clock cycle
Prior art date
Application number
AT01000601T
Other languages
English (en)
Inventor
Kenneth C Kelly
Irvinderpal S Ghai
Jay B Reimer
Tai Huu Nguyen
Harland Glenn Hopkin
Yi Lou
Jason A T Jones
Dan K Bui
Patrick J Smith
Kevin A Mcgonagle
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of ATE435461T1 publication Critical patent/ATE435461T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802Instruction prefetching
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G06F15/786Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers) using a single memory module
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor
    • G06F9/3879Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3889Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • G06F9/3891Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microcomputers (AREA)
  • Dram (AREA)
  • Complex Calculations (AREA)
  • Multi Processors (AREA)
  • Memory System (AREA)
  • Bus Control (AREA)
AT01000601T 2000-11-08 2001-11-07 Gemeinsamer programmspeicher für mehrkern-dsp- bausteine ATE435461T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US24664800P 2000-11-08 2000-11-08

Publications (1)

Publication Number Publication Date
ATE435461T1 true ATE435461T1 (de) 2009-07-15

Family

ID=22931584

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01000601T ATE435461T1 (de) 2000-11-08 2001-11-07 Gemeinsamer programmspeicher für mehrkern-dsp- bausteine

Country Status (5)

Country Link
US (1) US6691216B2 (de)
EP (1) EP1239374B1 (de)
JP (1) JP2002196974A (de)
AT (1) ATE435461T1 (de)
DE (1) DE60139109D1 (de)

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US7237071B2 (en) * 2001-12-20 2007-06-26 Texas Instruments Incorporated Embedded symmetric multiprocessor system with arbitration control of access to shared resources
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US9183087B2 (en) * 2005-06-07 2015-11-10 Seagate Technology Llc Data storage subgroup with local and shared resources
CN101366004A (zh) * 2005-12-06 2009-02-11 波士顿电路公司 用于带有专用线程管理的多核处理的方法和设备
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US7958341B1 (en) 2008-07-07 2011-06-07 Ovics Processing stream instruction in IC of mesh connected matrix of processors containing pipeline coupled switch transferring messages over consecutive cycles from one link to another link or memory
US8131975B1 (en) 2008-07-07 2012-03-06 Ovics Matrix processor initialization systems and methods
US8145880B1 (en) 2008-07-07 2012-03-27 Ovics Matrix processor data switch routing systems and methods
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US7870365B1 (en) 2008-07-07 2011-01-11 Ovics Matrix of processors with data stream instruction execution pipeline coupled to data switch linking to neighbor units by non-contentious command channel / data channel
JP5578811B2 (ja) * 2009-06-30 2014-08-27 キヤノン株式会社 情報処理装置、情報処理装置の制御方法及びプログラム
US8381006B2 (en) 2010-04-08 2013-02-19 International Business Machines Corporation Reducing power requirements of a multiple core processor
US10031888B2 (en) * 2011-02-17 2018-07-24 Hyperion Core, Inc. Parallel memory systems
US9514069B1 (en) 2012-05-24 2016-12-06 Schwegman, Lundberg & Woessner, P.A. Enhanced computer processor and memory management architecture
US9442559B2 (en) 2013-03-14 2016-09-13 Intel Corporation Exploiting process variation in a multicore processor
CN104301016B (zh) * 2014-09-28 2018-08-28 北京邮电大学 一种基于多核dsp的mimo并行检测方法及系统
JP2018514868A (ja) * 2015-04-30 2018-06-07 マイクロチップ テクノロジー インコーポレイテッドMicrochip Technology Incorporated 改良された命令セットを有する中央処理ユニット
GB2542853B (en) * 2015-10-02 2021-12-15 Cambridge Consultants Processing apparatus and methods
US10073718B2 (en) 2016-01-15 2018-09-11 Intel Corporation Systems, methods and devices for determining work placement on processor cores
US10565109B2 (en) 2017-09-05 2020-02-18 International Business Machines Corporation Asynchronous update of metadata tracks in response to a cache hit generated via an I/O operation over a bus interface
US10635494B2 (en) * 2018-05-08 2020-04-28 Microchip Technology Incorporated Memory pool allocation for a multi-core system
CN111258769B (zh) * 2018-11-30 2022-12-09 上海寒武纪信息科技有限公司 数据传输装置和方法
JP7169942B2 (ja) * 2019-06-17 2022-11-11 ルネサスエレクトロニクス株式会社 半導体装置及びその動作方法
US11157206B2 (en) * 2019-07-01 2021-10-26 Realtek Singapore Private Limited Multi-die system capable of sharing non-volatile memory
CN112243266B (zh) * 2019-07-18 2024-04-19 大唐联仪科技有限公司 一种数据组包方法及装置
CN112559434B (zh) * 2019-09-25 2023-12-08 阿里巴巴集团控股有限公司 一种多核处理器及核间数据转发方法
CN115151892B (zh) * 2020-03-04 2025-12-23 广州希姆半导体科技有限公司 一种数据处理装置及数据处理方法
TWI816032B (zh) * 2020-04-10 2023-09-21 新唐科技股份有限公司 多核心處理器電路
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Also Published As

Publication number Publication date
EP1239374A1 (de) 2002-09-11
US20020056030A1 (en) 2002-05-09
DE60139109D1 (de) 2009-08-13
JP2002196974A (ja) 2002-07-12
US6691216B2 (en) 2004-02-10
EP1239374B1 (de) 2009-07-01

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