ATE450045T1 - Schreibschutz durch verwendung eines zweisignal- steuerprotokolls für ein integriertes schaltungsbauelement mit parameteränderungsfähigkeit, chipauswahl und wählbares schreiben in nichtflüchtigem speicher - Google Patents
Schreibschutz durch verwendung eines zweisignal- steuerprotokolls für ein integriertes schaltungsbauelement mit parameteränderungsfähigkeit, chipauswahl und wählbares schreiben in nichtflüchtigem speicherInfo
- Publication number
- ATE450045T1 ATE450045T1 AT05796802T AT05796802T ATE450045T1 AT E450045 T1 ATE450045 T1 AT E450045T1 AT 05796802 T AT05796802 T AT 05796802T AT 05796802 T AT05796802 T AT 05796802T AT E450045 T1 ATE450045 T1 AT E450045T1
- Authority
- AT
- Austria
- Prior art keywords
- volatile memory
- integrated circuit
- signal control
- control protocol
- dual
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1731—Optimisation thereof
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Read Only Memory (AREA)
- Storage Device Security (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/954,584 US7091740B2 (en) | 2004-07-30 | 2004-09-30 | Write protection using a two signal control protocol for an integrated circuit device having parameter change capability, chip select and selectable write to non-volatile memory |
| PCT/US2005/031917 WO2006039075A1 (en) | 2004-09-30 | 2005-09-01 | Write protection using a two signal control protocol for an integrated circuit device having parameter change capability, chip select and selectable write to non-volatile memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE450045T1 true ATE450045T1 (de) | 2009-12-15 |
Family
ID=35788065
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT05796802T ATE450045T1 (de) | 2004-09-30 | 2005-09-01 | Schreibschutz durch verwendung eines zweisignal- steuerprotokolls für ein integriertes schaltungsbauelement mit parameteränderungsfähigkeit, chipauswahl und wählbares schreiben in nichtflüchtigem speicher |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7091740B2 (de) |
| EP (1) | EP1805768B1 (de) |
| CN (1) | CN100514497C (de) |
| AT (1) | ATE450045T1 (de) |
| DE (1) | DE602005017923D1 (de) |
| TW (1) | TWI305647B (de) |
| WO (1) | WO2006039075A1 (de) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7199603B2 (en) * | 2004-07-30 | 2007-04-03 | Microchip Technology Incorporated | Increment/decrement, chip select and selectable write to non-volatile memory using a two signal control protocol for an integrated circuit device |
| JP2006139661A (ja) * | 2004-11-15 | 2006-06-01 | Kumiko Mito | 記憶装置 |
| US20080061817A1 (en) * | 2004-12-17 | 2008-03-13 | International Business Machines Corporation | Changing Chip Function Based on Fuse States |
| US7652893B2 (en) * | 2005-04-28 | 2010-01-26 | Ati Technologies Ulc | Single or dual electronic package with footprint and pin sharing |
| DE102006021745A1 (de) * | 2006-05-10 | 2007-11-15 | Robert Bosch Gmbh | Nichtflüchtiger Speicherbaustein |
| US8117378B2 (en) * | 2008-10-29 | 2012-02-14 | Microchip Technology Incorporated | Preventing unintended permanent write-protection |
| US8719652B2 (en) | 2009-05-12 | 2014-05-06 | Stec, Inc. | Flash storage device with read disturb mitigation |
| KR101373469B1 (ko) * | 2009-11-27 | 2014-03-13 | 엘지디스플레이 주식회사 | 액정표시장치 및 그 구동방법 |
| TWI503818B (zh) * | 2013-01-21 | 2015-10-11 | Richtek Technology Corp | 具共用腳位之馬達控制器與相關控制方法 |
| CN105741230A (zh) * | 2016-01-29 | 2016-07-06 | 宇龙计算机通信科技(深圳)有限公司 | 一种图像处理的方法及移动终端 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0695971A (ja) | 1992-07-30 | 1994-04-08 | Rohm Co Ltd | データ保存回路 |
| JPH0844628A (ja) * | 1994-08-03 | 1996-02-16 | Hitachi Ltd | 不揮発性メモリ、およびそれを用いたメモリカード、情報処理装置、ならびに不揮発性メモリのソフトウェアライトプロテクト制御方法 |
| US5617559A (en) * | 1994-08-31 | 1997-04-01 | Motorola Inc. | Modular chip select control circuit and method for performing pipelined memory accesses |
| US6031757A (en) * | 1996-11-22 | 2000-02-29 | Macronix International Co., Ltd. | Write protected, non-volatile memory device with user programmable sector lock capability |
| US6385074B1 (en) * | 1998-11-16 | 2002-05-07 | Matrix Semiconductor, Inc. | Integrated circuit structure including three-dimensional memory array |
| US6757832B1 (en) | 2000-02-15 | 2004-06-29 | Silverbrook Research Pty Ltd | Unauthorized modification of values in flash memory |
| US6556476B1 (en) * | 2002-03-11 | 2003-04-29 | Unigen Corporation | Non-volatile memory data protection |
| US6590804B1 (en) * | 2002-07-16 | 2003-07-08 | Hewlett-Packard Development Company, L.P. | Adjustable current mode differential amplifier |
| US7199603B2 (en) * | 2004-07-30 | 2007-04-03 | Microchip Technology Incorporated | Increment/decrement, chip select and selectable write to non-volatile memory using a two signal control protocol for an integrated circuit device |
-
2004
- 2004-09-30 US US10/954,584 patent/US7091740B2/en not_active Expired - Lifetime
-
2005
- 2005-09-01 AT AT05796802T patent/ATE450045T1/de not_active IP Right Cessation
- 2005-09-01 EP EP05796802A patent/EP1805768B1/de not_active Expired - Lifetime
- 2005-09-01 DE DE602005017923T patent/DE602005017923D1/de not_active Expired - Lifetime
- 2005-09-01 WO PCT/US2005/031917 patent/WO2006039075A1/en not_active Ceased
- 2005-09-01 CN CNB2005800068963A patent/CN100514497C/zh not_active Expired - Lifetime
- 2005-09-21 TW TW094132682A patent/TWI305647B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| WO2006039075A1 (en) | 2006-04-13 |
| US20060022707A1 (en) | 2006-02-02 |
| CN1926636A (zh) | 2007-03-07 |
| CN100514497C (zh) | 2009-07-15 |
| EP1805768A1 (de) | 2007-07-11 |
| TWI305647B (en) | 2009-01-21 |
| TW200631022A (en) | 2006-09-01 |
| DE602005017923D1 (de) | 2010-01-07 |
| US7091740B2 (en) | 2006-08-15 |
| EP1805768B1 (de) | 2009-11-25 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |