ATE451693T1 - Testverfahren für aktiven folge- und halte- leseverstärker (komparator) in einem einmal programmierbaren salizidierten poly- schmelzsicherungsarray - Google Patents
Testverfahren für aktiven folge- und halte- leseverstärker (komparator) in einem einmal programmierbaren salizidierten poly- schmelzsicherungsarrayInfo
- Publication number
- ATE451693T1 ATE451693T1 AT02727986T AT02727986T ATE451693T1 AT E451693 T1 ATE451693 T1 AT E451693T1 AT 02727986 T AT02727986 T AT 02727986T AT 02727986 T AT02727986 T AT 02727986T AT E451693 T1 ATE451693 T1 AT E451693T1
- Authority
- AT
- Austria
- Prior art keywords
- comparator
- time programmable
- salidized
- testing procedure
- fuse array
- Prior art date
Links
- 238000012956 testing procedure Methods 0.000 title 1
- 238000002955 isolation Methods 0.000 abstract 3
- 238000012360 testing method Methods 0.000 abstract 3
- 238000012512 characterization method Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
Landscapes
- Tests Of Electronic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Electronic Switches (AREA)
- Logic Circuits (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/884,148 US6608498B2 (en) | 2001-06-20 | 2001-06-20 | Method for characterizing an active track and latch sense-amp (comparator) in a one time programmable (OTP) salicided poly fuse array |
| PCT/IB2002/002313 WO2002103705A1 (en) | 2001-06-20 | 2002-06-17 | Method for characterizing an active track and latch sense-amp (comparator) in a one time programmable (otp) salicided poly fuse array |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE451693T1 true ATE451693T1 (de) | 2009-12-15 |
Family
ID=25384056
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT02727986T ATE451693T1 (de) | 2001-06-20 | 2002-06-17 | Testverfahren für aktiven folge- und halte- leseverstärker (komparator) in einem einmal programmierbaren salizidierten poly- schmelzsicherungsarray |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6608498B2 (de) |
| EP (1) | EP1402537B1 (de) |
| JP (1) | JP2004521440A (de) |
| CN (1) | CN100353462C (de) |
| AT (1) | ATE451693T1 (de) |
| DE (1) | DE60234693D1 (de) |
| WO (1) | WO2002103705A1 (de) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6704236B2 (en) * | 2002-01-03 | 2004-03-09 | Broadcom Corporation | Method and apparatus for verification of a gate oxide fuse element |
| JP2004302845A (ja) * | 2003-03-31 | 2004-10-28 | Canon Inc | 不正アクセス防止方法 |
| US7136322B2 (en) | 2004-08-05 | 2006-11-14 | Analog Devices, Inc. | Programmable semi-fusible link read only memory and method of margin testing same |
| KR20070069173A (ko) * | 2004-09-24 | 2007-07-02 | 사이프레스 세미컨덕터 코포레이션 | 1회 프로그램 가능〔otp〕 래치 및 방법 |
| US7142456B2 (en) * | 2004-10-08 | 2006-11-28 | Lexmark International | Distributed programmed memory cells used as memory reference currents |
| US8072834B2 (en) | 2005-08-25 | 2011-12-06 | Cypress Semiconductor Corporation | Line driver circuit and method with standby mode of operation |
| JP2007158104A (ja) * | 2005-12-06 | 2007-06-21 | Nec Electronics Corp | ヒューズ回路を有する半導体集積回路及びその製造方法 |
| US7369452B2 (en) * | 2006-04-07 | 2008-05-06 | Freescale Semiconductor, Inc. | Programmable cell |
| EP1906413A1 (de) * | 2006-09-29 | 2008-04-02 | Koninklijke Philips Electronics N.V. | Sichere Vorrichtung für nichtflüchtige Speicher und Verfahren zum Schutz der darin enthaltenen Daten |
| US7821859B1 (en) | 2006-10-24 | 2010-10-26 | Cypress Semiconductor Corporation | Adaptive current sense amplifier with direct array access capability |
| TW200828224A (en) * | 2006-12-29 | 2008-07-01 | Innolux Display Corp | Liquid crystal display |
| JP5571303B2 (ja) * | 2008-10-31 | 2014-08-13 | ピーエスフォー ルクスコ エスエイアールエル | 半導体装置 |
| US10218467B2 (en) | 2009-12-23 | 2019-02-26 | Pismo Labs Technology Limited | Methods and systems for managing error correction mode |
| US9787501B2 (en) | 2009-12-23 | 2017-10-10 | Pismo Labs Technology Limited | Methods and systems for transmitting packets through aggregated end-to-end connection |
| JP2012069181A (ja) * | 2010-09-21 | 2012-04-05 | Toshiba Corp | 半導体記憶装置 |
| CN102005249B (zh) * | 2010-12-14 | 2014-05-14 | 苏州华芯微电子股份有限公司 | 一种otp eprom读取电路 |
| US8847350B2 (en) * | 2012-08-30 | 2014-09-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Metal-via fuse |
| US10043564B2 (en) | 2014-12-10 | 2018-08-07 | Toshiba Memory Corporation | Semiconductor memory device and method of controlling semiconductor memory device |
| US9502106B2 (en) | 2014-12-10 | 2016-11-22 | Kabushiki Kaisha Toshiba | Semiconductor memory device and method of controlling semiconductor memory device |
| CN107607133B (zh) * | 2017-10-19 | 2023-10-31 | 浙江沃德尔科技集团股份有限公司 | 一种高精度霍尔传感装置及其封装编程方法 |
| KR102520496B1 (ko) | 2019-01-03 | 2023-04-11 | 삼성전자주식회사 | 오티피 메모리 장치 및 오피 메모리 장치의 테스트 방법 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2129585B (en) * | 1982-10-29 | 1986-03-05 | Inmos Ltd | Memory system including a faulty rom array |
| JPH0376407A (ja) * | 1989-08-18 | 1991-04-02 | Fujitsu Ltd | 演算増幅器 |
| US5623440A (en) * | 1993-10-15 | 1997-04-22 | Solidas Corporation | Multiple-bit random access memory cell |
| US5923601A (en) * | 1996-09-30 | 1999-07-13 | Advanced Micro Devices, Inc. | Memory array sense amplifier test and characterization |
| US6067263A (en) | 1999-04-07 | 2000-05-23 | Stmicroelectronics, Inc. | Dynamic random access memory circuit having a testing system and method to determine the sensitivity of a sense amplifier |
| JP2000340656A (ja) * | 1999-05-28 | 2000-12-08 | Fujitsu Ltd | トリミング回路 |
| US6208549B1 (en) * | 2000-02-24 | 2001-03-27 | Xilinx, Inc. | One-time programmable poly-fuse circuit for implementing non-volatile functions in a standard sub 0.35 micron CMOS |
| US6356496B1 (en) * | 2000-07-07 | 2002-03-12 | Lucent Technologies Inc. | Resistor fuse |
-
2001
- 2001-06-20 US US09/884,148 patent/US6608498B2/en not_active Expired - Lifetime
-
2002
- 2002-06-17 CN CNB02812359XA patent/CN100353462C/zh not_active Expired - Fee Related
- 2002-06-17 JP JP2003505934A patent/JP2004521440A/ja active Pending
- 2002-06-17 WO PCT/IB2002/002313 patent/WO2002103705A1/en not_active Ceased
- 2002-06-17 DE DE60234693T patent/DE60234693D1/de not_active Expired - Lifetime
- 2002-06-17 AT AT02727986T patent/ATE451693T1/de not_active IP Right Cessation
- 2002-06-17 EP EP02727986A patent/EP1402537B1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| CN100353462C (zh) | 2007-12-05 |
| US20030011379A1 (en) | 2003-01-16 |
| JP2004521440A (ja) | 2004-07-15 |
| WO2002103705A1 (en) | 2002-12-27 |
| CN1518743A (zh) | 2004-08-04 |
| EP1402537B1 (de) | 2009-12-09 |
| US6608498B2 (en) | 2003-08-19 |
| DE60234693D1 (de) | 2010-01-21 |
| EP1402537A1 (de) | 2004-03-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |