ATE512460T1 - Verfahren zur herstellung eines transistors - Google Patents

Verfahren zur herstellung eines transistors

Info

Publication number
ATE512460T1
ATE512460T1 AT06006084T AT06006084T ATE512460T1 AT E512460 T1 ATE512460 T1 AT E512460T1 AT 06006084 T AT06006084 T AT 06006084T AT 06006084 T AT06006084 T AT 06006084T AT E512460 T1 ATE512460 T1 AT E512460T1
Authority
AT
Austria
Prior art keywords
trench
forming
layer
gate
transistor
Prior art date
Application number
AT06006084T
Other languages
English (en)
Inventor
Peter Moens
Marnix Tack
Original Assignee
Semiconductor Components Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Components Ind filed Critical Semiconductor Components Ind
Application granted granted Critical
Publication of ATE512460T1 publication Critical patent/ATE512460T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0295—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the source electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/663—Vertical DMOS [VDMOS] FETs having both source contacts and drain contacts on the same surface, i.e. up-drain VDMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/111—Field plates
    • H10D64/117—Recessed field plates, e.g. trench field plates or buried field plates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/252—Source or drain electrodes for field-effect devices for vertical or pseudo-vertical devices

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
AT06006084T 2005-04-26 2006-03-24 Verfahren zur herstellung eines transistors ATE512460T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB0508407.4A GB0508407D0 (en) 2005-04-26 2005-04-26 Alignment of trench for MOS

Publications (1)

Publication Number Publication Date
ATE512460T1 true ATE512460T1 (de) 2011-06-15

Family

ID=34640136

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06006084T ATE512460T1 (de) 2005-04-26 2006-03-24 Verfahren zur herstellung eines transistors

Country Status (4)

Country Link
US (2) US7608510B2 (de)
EP (1) EP1717865B1 (de)
AT (1) ATE512460T1 (de)
GB (1) GB0508407D0 (de)

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US7846821B2 (en) 2008-02-13 2010-12-07 Icemos Technology Ltd. Multi-angle rotation for ion implantation of trenches in superjunction devices
TWI385802B (zh) * 2008-09-08 2013-02-11 Niko Semiconductor Co Ltd 高壓金氧半導體元件及其製作方法
US20120273916A1 (en) 2011-04-27 2012-11-01 Yedinak Joseph A Superjunction Structures for Power Devices and Methods of Manufacture
US8084811B2 (en) * 2009-10-08 2011-12-27 Monolithic Power Systems, Inc. Power devices with super junctions and associated methods manufacturing
US8786010B2 (en) 2011-04-27 2014-07-22 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8836028B2 (en) 2011-04-27 2014-09-16 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8772868B2 (en) 2011-04-27 2014-07-08 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8673700B2 (en) * 2011-04-27 2014-03-18 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8901641B2 (en) * 2012-02-01 2014-12-02 Vanguard International Semiconductor Corporation Semiconductor device with super junction structure and method for fabricating the same
US9312382B2 (en) * 2014-07-22 2016-04-12 Empire Technology Development Llc High voltage transistor device with reduced characteristic on resistance
CN106158975A (zh) * 2016-08-30 2016-11-23 扬州扬杰电子科技股份有限公司 一种带屏蔽电极的功率mosfet元胞及其加工工艺
EP3475690A4 (de) * 2016-10-05 2019-05-08 Hewlett-Packard Development Company, L.P. Isolierte sensoren
CN109427883A (zh) * 2017-08-23 2019-03-05 深圳市敦为技术有限公司 一种新型氧化硅层辅助耗尽超结结构的制造方法
DE102017128241B3 (de) * 2017-11-29 2019-02-07 Infineon Technologies Austria Ag Layout für einen Nadelzellengraben-MOSFET und Verfahren zu dessen Verarbeitung
US20190386124A1 (en) * 2018-06-13 2019-12-19 Purdue Research Foundation Mos devices with increased short circuit robustness
EP4092724A1 (de) * 2021-05-21 2022-11-23 Infineon Technologies Austria AG Halbleiterchip mit vertikaler leistungstransistorvorrichtung
CN118658885B (zh) * 2024-08-20 2024-11-05 深圳市港祥辉电子有限公司 一种增强型沟槽栅氧化镓vdmos器件及其制备方法

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Also Published As

Publication number Publication date
EP1717865A3 (de) 2007-08-08
EP1717865A2 (de) 2006-11-02
US20100065908A1 (en) 2010-03-18
US7608510B2 (en) 2009-10-27
GB0508407D0 (en) 2005-06-01
US20060249786A1 (en) 2006-11-09
US7989886B2 (en) 2011-08-02
EP1717865B1 (de) 2011-06-08

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