CA1285657C - Dispositif et methode d'execution d'instructions de branchement - Google Patents

Dispositif et methode d'execution d'instructions de branchement

Info

Publication number
CA1285657C
CA1285657C CA000528348A CA528348A CA1285657C CA 1285657 C CA1285657 C CA 1285657C CA 000528348 A CA000528348 A CA 000528348A CA 528348 A CA528348 A CA 528348A CA 1285657 C CA1285657 C CA 1285657C
Authority
CA
Canada
Prior art keywords
sequence
execution
instruction
branch
microinstruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA000528348A
Other languages
English (en)
Inventor
Douglas W. Clark
Debra Bernstein
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Application granted granted Critical
Publication of CA1285657C publication Critical patent/CA1285657C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G06F9/3846—Speculative instruction execution using static prediction, e.g. branch taken strategy

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
CA000528348A 1986-01-29 1987-01-28 Dispositif et methode d'execution d'instructions de branchement Expired - Fee Related CA1285657C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US82377686A 1986-01-29 1986-01-29
US823,776 1986-01-29

Publications (1)

Publication Number Publication Date
CA1285657C true CA1285657C (fr) 1991-07-02

Family

ID=25239679

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000528348A Expired - Fee Related CA1285657C (fr) 1986-01-29 1987-01-28 Dispositif et methode d'execution d'instructions de branchement

Country Status (5)

Country Link
EP (1) EP0290465A1 (fr)
JP (1) JPH01500066A (fr)
AU (1) AU7021387A (fr)
CA (1) CA1285657C (fr)
WO (1) WO1987004821A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6341932A (ja) * 1985-08-22 1988-02-23 Nec Corp 分岐命令処理装置
JPH01283635A (ja) * 1988-05-11 1989-11-15 Nec Corp バッファ制御回路
SE510295C2 (sv) * 1997-07-21 1999-05-10 Ericsson Telefon Ab L M Metod vid processor för att hantera villkorade hoppinstruktioner samt processor anpassad att verka enligt den angivna metoden

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4200927A (en) * 1978-01-03 1980-04-29 International Business Machines Corporation Multi-instruction stream branch processing mechanism
JPS56140445A (en) * 1980-04-01 1981-11-02 Hitachi Ltd Information processing device
US4373180A (en) * 1980-07-09 1983-02-08 Sperry Corporation Microprogrammed control system capable of pipelining even when executing a conditional branch instruction
JPS57153342A (en) * 1981-03-19 1982-09-21 Mitsubishi Electric Corp Pipeline computer
JPS6049339A (ja) * 1983-08-30 1985-03-18 Dainippon Screen Mfg Co Ltd 複製画像の編集装置
US4742451A (en) * 1984-05-21 1988-05-03 Digital Equipment Corporation Instruction prefetch system for conditional branch instruction for central processor unit

Also Published As

Publication number Publication date
AU7021387A (en) 1987-08-25
EP0290465A1 (fr) 1988-11-17
JPH0350295B2 (fr) 1991-08-01
WO1987004821A1 (fr) 1987-08-13
JPH01500066A (ja) 1989-01-12

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Legal Events

Date Code Title Description
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