EP0744291A2 - Verfahren zur Herstellung von Ladungselektroden - Google Patents

Verfahren zur Herstellung von Ladungselektroden Download PDF

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Publication number
EP0744291A2
EP0744291A2 EP96303398A EP96303398A EP0744291A2 EP 0744291 A2 EP0744291 A2 EP 0744291A2 EP 96303398 A EP96303398 A EP 96303398A EP 96303398 A EP96303398 A EP 96303398A EP 0744291 A2 EP0744291 A2 EP 0744291A2
Authority
EP
European Patent Office
Prior art keywords
charge plate
charge
substrate
fabricating
ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP96303398A
Other languages
English (en)
French (fr)
Other versions
EP0744291A3 (de
EP0744291B1 (de
Inventor
David Stephens
Brian Morris
Peter Tank
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kodak Versamark Inc
Original Assignee
Kodak Versamark Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kodak Versamark Inc filed Critical Kodak Versamark Inc
Publication of EP0744291A2 publication Critical patent/EP0744291A2/de
Publication of EP0744291A3 publication Critical patent/EP0744291A3/de
Application granted granted Critical
Publication of EP0744291B1 publication Critical patent/EP0744291B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/07—Ink jet characterised by jet control
    • B41J2/075—Ink jet characterised by jet control for many-valued deflection
    • B41J2/08—Ink jet characterised by jet control for many-valued deflection charge-control type
    • B41J2/085—Charge means, e.g. electrodes

Definitions

  • the present invention relates to binary continuous ink jet printers and, more particularly, to improved construction for the charge plate in such printers.
  • electrically conductive ink is supplied under pressure to a manifold region that distributes the ink to a plurality of orifices, typically arranged in a linear array(s).
  • the ink discharges from the orifices in filaments which break into droplet streams.
  • Individual droplet streams are selectively charged to substantially two levels in the region of the break off from the filaments and charged drops are deflected from their normal trajectories. Either the deflected drops or the undeflected drops are caught and recirculated, and the other drops are allowed to proceed to a print medium.
  • ink drops are charged by a charge plate having a plurality of charging electrodes along one edge, and a corresponding plurality of connecting leads along one surface.
  • the edge of the charge plate having the charging electrodes is placed in close proximity to the break off point of the ink jet filaments, and charge is applied to the leads to induce charges in the drops as they break off from the filaments.
  • 4,622,562 is employed to keep the charge plate slightly warmer than the surrounding environment.
  • the catcher heater is an added component under the charge plate in the catcher. Fabrication of this added component into the printhead adds cost and complexity to the printhead.
  • nickel is commonly used as the electroformed electrodes and as such, it is highly vulnerable to electrochemical etching during the operation of the printhead during the ink jet printing process. This is especially true of the bottom portion of the leads, those furthest from the 90° bend where ink tends to accumulate during the ink jet printing process.
  • the present invention overcomes previous failures because in the subject method the patterning of the top and the edge are separated, which allows for more flexibility in manufacturing.
  • a clever combination of new technologies allows fabrication of circuitry on the rear of the charge plate so that electronic chips to drive the charge leads can be mounted on the charge plate. This allows input to the charge plate over an electronic "bus" so that many charge leads can be driven from a few interconnections to external circuitry.
  • the new technologies also allow integration of the charge plate heater onto the bottom of the charge plate.
  • materials which are available for fabrication with the new techniques have a lower electrochemical etch rate.
  • a method of fabricating a charge plate for an ink jet printer allows for fabrication by conventional methods. Initially, a ceramic charge plate substrate is provided, the substrate having an edge, a bottom and a top. The substrate is then edge printed to define a charging face on the edge of the ceramic charge plate substrate. The conductive path from the charging face to the top of the ceramic charge plate substrate is completed by top printing on the top surface to define a wrap around circuit. Part of the top circuit is patterning for the site on which the driver electronic chips will reside. In this case, the pattern consists of a number of small rectangular conducting areas or "pads" which surround the driver chip.
  • the pads provide points to which connections can be made from the charge plate to the driver chip using suitable techniques which are known in the art, such as conventional wire bonding techniques, including gold wire ball bonding; flip chip attachment; ball grid array attachment, including micro ball grid array attachment; and tape automated bonding. Connections from the pads to the charging face and to the rear of the chip are also fabricated in this top patterning step. This patterning can be accomplished by any suitable method such as by a thick film process.
  • the charge plate can be top patterned to connect top electrical connections to the front edge for charging and deflecting. When the conductive paths on the top of the ceramic charge plate substrate are completed, a second set of processes are used to form a region for two layer circuitry at the rear of the charge plate.
  • a charge plate substrate 10 of Fig. 1 capable of being assembled into a charge plate assembly, is illustrated.
  • the charge plate substrate 10 is preferably ceramic and fabricated from 96% aluminum oxide having a coefficient of thermal expansion (CTE) of 8.2x10 -6 /°C.
  • a front edge 12 is substantially perpendicular with a top surface 14. The front surface is preferably flat to provide optimum charge.
  • the ceramic substrate 10 of Fig. 1 is edge printed on its front edge 12 to define charge surfaces or charging face 16.
  • the height of the front edge 12 is approximately 0.015 inches.
  • the front edge 12 is substantially perpendicular to bottom surface 18.
  • Chamfer 20 separates the front edge 12 and the bottom surface 18 with an approximately 45° surface, to provide clearance for drops deflected to the catcher.
  • a small amount of ink can be purposely allowed to extend over to the top surface for improved electrical connection.
  • the charge surfaces 16 are defined by passing thick film conductive ink through an opening in a screen, i.e., silk screen printing, and/or thin metal foil, i.e., stencil printing, using standard processes in the thick film processing art.
  • Silk screening has the advantage of allowing for the creation of unusual patterns; while stenciling has the advantage of providing improved quality of printed lines and spaces without the wire mesh which can create problems when pushing ink through at high resolutions.
  • a gold thick film paste such as commercially available DuPont 5715 Gold Thick Film Paste, is preferable over nickel because gold is more chemically inert than nickel.
  • a conductive path is continued to top surface 14, to create a wrap around conductive path 22.
  • these lines can be permitted to extend over the front edge. This creates an overlap from both the edge and the wrap around print that ensures good electrical connection around the edge.
  • the wrap around 22 is also defined by thick film paste or printing techniques, such as printing, drying and firing steps.
  • the present invention applies thick film processing to make the electrical connection between the top surface 14 and the charging face 16.
  • Electrical connection from top surface 14 to the front surface 12 is achieved using the electrical connection wrap around process, which connects the front face electrical connections 16 to top electrical connections 22. This involves direct metal to metal diffusion during the step of firing, prior to the step of top patterning, and following the steps of printing and drying, of the substrate.
  • top patterning 24 of the substrate is illustrated, subsequent to the steps of printing, drying, firing, and metal to metal diffusion, to create a charge plate.
  • Top patterning of the substrate can be by any suitable means, such as use of Fodel photoimageable materials as described in Proceedings of the 1993 International Symposium On Microelectronics incorporated herein by reference.
  • Fodel technology is an extension of thick film paste technology, developed by combining inorganic components, metal powders, glass powders, metal oxides and refractory powders, used to make thick film dielectrics and conductors with the organic components, polymers, photoinitiators, monomers and stabilizers, used to make photoresist films for the printed wiring board industry. This combination results in photoimageable ceramic material that combines the well known reliability of ceramic materials with the ease of processing in conventional equipment, using mild aqueous chemistries, currently used in the printed wiring board industry.
  • the Fodel process is a combination of the conventional thick film and printed wiring board processes.
  • conventional thick or thin film processes and convention printed circuit board processes can be used independently or in any suitable combination to achieve the patterning of the charge plate of the present invention.
  • the Fodel process is described herein for purposes of example only, and is not to be considered as limiting the invention.
  • the Fodel process begins with the application of a photoactive paste, such as a commercially available Fodel paste, to the desired substrate by blank screen printing.
  • a photoactive paste such as a commercially available Fodel paste
  • the paste is allowed to level at room temperature and is then dried, for example at a temperature of 80°C. After drying, the paste is exposed in UV light (with a typical maximum wavelength of approximately 360 nm) through the appropriate photomask to form a latent image.
  • the latent image in the materials is developed such as in a conveyorized, spray processor, for example using 1% aqueous Na 2 CO 3 solution.
  • the developed paste is then fired by conventional thick film methods.
  • the top patterned surface is coated with a material that has a high breakdown voltage and is pinhole free.
  • a preferred material is a dielectric material which sinters to the top patterned surface to make a good dielectric coating.
  • the dielectric coating may be any suitable dielectric such as commercially available DuPont 5704 Dielectric.
  • thick film technology is a method for producing patterned circuity used in the electronics industry.
  • the pattern is silkscreened onto a substrate, then dried and fired.
  • the process starts with a suitable substrate that can withstand the temperatures that are necessary to sinter or "fire" the inks, such as a substrate comprising 96% aluminum oxide.
  • Thick film inks are then silkscreened onto the substrate.
  • various inks are available for different applications.
  • certain conductive inks can be used to form conductive gold traces; a conductive ink that contains palladium-gold can be used as solderable points; a more resistive type of ink could be used to form resistive elements for an electronic circuit or perhaps a resistive type heater; a non-conductive or dielectric ink can be printed to provide a protective coating over a previously formed circuit or a barrier between two circuit layers.
  • These inks mainly consist of three primary elements, including a binder constituent (referred to as frit), a print vehicle and a functional constituent.
  • the next step is to fire the printed and dried substrate.
  • the part is subjected to a specific temperature profile where the part is raised to and dwells at a temperature where all organic matter is burned off, for example, 500°C.
  • the part is then subjected to a temperature where firing actually takes place, such as 850°C.
  • 850°C the functional constituent is sintered into a layer of functional material.
  • the frit sinters and partially diffuses into the substrate, thus providing a means to adhere the functional constituent to the substrate.
  • the temperature is lowered. Additional layers can be placed on top of each other and would follow the same process.
  • ceramic substrate layer 26 is edge printed with edge print layer 28, such as a gold thick film.
  • a wrap around layer 30 is then applied, which may be any suitable material such as gold thick film.
  • a fine line circuity layer 32 is formed using the Fodel process. This layer provides a connecting path between charge driver chips 34 and charge electrodes on edge print 28.
  • a ground plane circuity 36 is then applied to provide an electrical ground path between the connector 38 and the driver chips 34.
  • These two separate layers are then coated with a dielectric layer 40 which sinters to the top of the patterned surfaces and makes a good electrically insulated coating.
  • the control circuity layer 42 provides a path for power, control and data signals between the connector 38 and the driver chips 34.
  • Fig. 6 there is illustrated a block diagram showing the functional relationships between the various layers on the charge plate and connection to supporting electronics remote from the charge plate.
  • power, control and data lines 44, 46, 48, respectively, are connected to power supplies 50, print controller 52 and print data generator 54, respectively, through the connector 38.
  • a second dielectric coating 56 is applied to protect the control circuity as well as to provide a second coating over the fine line circuity 32. It is important that the dielectric coating be free of voids in the area of the fine line circuitry. Otherwise, conductive ink used in the ink-jet printing process could provide a conductive path between two adjacent traces and cause an electrical short which could lead to component failure.
  • the driver chips 34 are silicon devices that accept logic level data in a serial fashion, then latch those signals and output the same data in parallel, but with much higher voltage potential. Logic levels are typically 0 and 12 volts dc. The output voltages can range from 60 to 180 volts dc.
  • the input channels of the driver chips 34 are connected to the ground plane 36 and the control circuity 42 by suitable means such as gold wire ball bonding.
  • the output channels of the driver chips 34 are connected to the fine line circuity 32, also by suitable means such as gold wire ball bonding.
  • An epoxy or other suitable material is used to cover the chips and the wire bonds, to protect the chips and wire bonds from the environment.
  • connector 38 is applied through standard surface mount soldering techniques.
  • a solderable metal layer provides pads where the connector is soldered on, and small holes in the back are plated through to create conductive vias from the top surface to the bottom surface. This provides an electrical path from the top to the bottom of the charge plate, and to a resistive charge plate heater.
  • the resistive charge plate heater comprised of resistive layer 58 and heater circuit layer 60, is integrated onto the bottom surface also using thick film technology.
  • the heater circuit 60 is applied using the solderable ink and provide, the conductive path between the vias and the heater layer 58.
  • the heater layer 58 is then applied using resistive inks. The shape and thickness of this layer determines the resistance desired.
  • the top patterned fine line circuitry layer 32 provides the conductive path between the wrap around pattern and the output of the driver chip. This layer includes pads used in the wire bonding operation.
  • Ground plane circuitry layer 36 provides a conductive path for the ground signals between the driver chips and a surface mount connector. The top patterned surface is coated with dielectric layer 40 which sinters to the top patterned surface to make a good dielectric coating.
  • Control circuitry layer 42 provides a conductive path between the connector and driver chips before second dielectric layer 56 is applied.
  • Charge driver components indicated as layer 34 and surface mounted connector 38 provide a connection between the controller and data source.
  • a resistive charge plate heater comprised of resistor layer 58 and heater circuitry layer 60, is integrated onto the bottom of the charge plate, indicated as reference number 62 in Fig. 6.
  • the present invention is useful in the field of ink jet printing, and has the advantage of allowing for direct formation of a charge face. This provides the advantage of simplification of charge plate fabrication. Once the wrap around is complete, top patterning of the charge plate can be achieved by a variety of techniques such as etchable thick film process, traditional thin film process, hybridization of thick and thin film processes, and photoimageable thick film techniques. The inclusion of driver chips provides the advantage of reducing the size of the interconnect.

Landscapes

  • Particle Formation And Scattering Control In Inkjet Printers (AREA)
EP19960303398 1995-05-26 1996-05-14 Verfahren zur Herstellung von Ladungselektroden Expired - Lifetime EP0744291B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US45123295A 1995-05-26 1995-05-26
US451232 1995-05-26

Publications (3)

Publication Number Publication Date
EP0744291A2 true EP0744291A2 (de) 1996-11-27
EP0744291A3 EP0744291A3 (de) 1998-03-04
EP0744291B1 EP0744291B1 (de) 2000-07-12

Family

ID=23791363

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19960303398 Expired - Lifetime EP0744291B1 (de) 1995-05-26 1996-05-14 Verfahren zur Herstellung von Ladungselektroden

Country Status (4)

Country Link
EP (1) EP0744291B1 (de)
JP (1) JP3945838B2 (de)
CA (1) CA2177052A1 (de)
DE (1) DE69609248T2 (de)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0771655A3 (de) * 1995-10-31 1998-09-16 SCITEX DIGITAL PRINTING, Inc. Kurzschlussnachweisschaltung für Tintenstrahldrucker
FR2763870A1 (fr) * 1997-06-03 1998-12-04 Imaje Sa Systeme de commande de projection de liquide electriquement conducteur
EP1396342A1 (de) * 2002-09-06 2004-03-10 Domino Printing Sciences Plc Aufladungselektrode für einen kontinuierlichen Tintenstrahldrucker
WO2006044588A1 (en) * 2004-10-15 2006-04-27 Eastman Kodak Company Charge plate fabrication technique
US8104170B2 (en) 2004-10-15 2012-01-31 Eastman Kodak Company Charge plate fabrication technique

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4552241B2 (ja) * 1999-09-24 2010-09-29 ブラザー工業株式会社 インクジェットヘッドの製造方法
US6951778B2 (en) * 2002-10-31 2005-10-04 Hewlett-Packard Development Company, L.P. Edge-sealed substrates and methods for effecting the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4223321A (en) * 1979-04-30 1980-09-16 The Mead Corporation Planar-faced electrode for ink jet printer and method of manufacture
DE3480073D1 (en) * 1983-07-27 1989-11-16 Eastman Kodak Co A charge electrode structure for ink jet printers, and a method of fabricating the same
US4622562A (en) * 1985-04-12 1986-11-11 Eastman Kodak Company Ink jet printhead multi-component heating
US5459500A (en) * 1992-03-25 1995-10-17 Scitex Digital Printing, Inc. Charge plate connectors and method of making
EP0613778B1 (de) * 1993-03-01 1998-06-10 SCITEX DIGITAL PRINTING, Inc. Passivierungsschicht für Ladungselektroden auf Basis von Keramik

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0771655A3 (de) * 1995-10-31 1998-09-16 SCITEX DIGITAL PRINTING, Inc. Kurzschlussnachweisschaltung für Tintenstrahldrucker
FR2763870A1 (fr) * 1997-06-03 1998-12-04 Imaje Sa Systeme de commande de projection de liquide electriquement conducteur
WO1998055315A1 (fr) * 1997-06-03 1998-12-10 Imaje Systeme de commande de projection de liquide electriquement conducteur
CN1095752C (zh) * 1997-06-03 2002-12-11 伊马治公司 导电液体的喷射控制系统及具有该控制系统的喷墨打印机
US6511164B1 (en) 1997-06-03 2003-01-28 Imaje S. A. Control system for spraying electrically conductive liquid
EP1396342A1 (de) * 2002-09-06 2004-03-10 Domino Printing Sciences Plc Aufladungselektrode für einen kontinuierlichen Tintenstrahldrucker
WO2006044588A1 (en) * 2004-10-15 2006-04-27 Eastman Kodak Company Charge plate fabrication technique
US7204020B2 (en) 2004-10-15 2007-04-17 Eastman Kodak Company Method for fabricating a charge plate for an inkjet printhead
US8104170B2 (en) 2004-10-15 2012-01-31 Eastman Kodak Company Charge plate fabrication technique

Also Published As

Publication number Publication date
JPH0999561A (ja) 1997-04-15
EP0744291A3 (de) 1998-03-04
EP0744291B1 (de) 2000-07-12
JP3945838B2 (ja) 2007-07-18
DE69609248D1 (de) 2000-08-17
DE69609248T2 (de) 2001-03-08
CA2177052A1 (en) 1996-11-27

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