EP0852809A4 - Metall-schicht-stapel mit zwei dünnen titan-lagen für integrierte schaltung und zugehörige kammerabscheidung - Google Patents

Metall-schicht-stapel mit zwei dünnen titan-lagen für integrierte schaltung und zugehörige kammerabscheidung

Info

Publication number
EP0852809A4
EP0852809A4 EP96933891A EP96933891A EP0852809A4 EP 0852809 A4 EP0852809 A4 EP 0852809A4 EP 96933891 A EP96933891 A EP 96933891A EP 96933891 A EP96933891 A EP 96933891A EP 0852809 A4 EP0852809 A4 EP 0852809A4
Authority
EP
European Patent Office
Prior art keywords
integrated circuit
metal layer
layer stack
thin titanium
titanium layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP96933891A
Other languages
English (en)
French (fr)
Other versions
EP0852809A1 (de
Inventor
Rajiv Rastogi
Peng Bai
Sohail Ahmed
William K Meyer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of EP0852809A1 publication Critical patent/EP0852809A1/de
Publication of EP0852809A4 publication Critical patent/EP0852809A4/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425Barrier, adhesion or liner layers
EP96933891A 1995-09-29 1996-09-25 Metall-schicht-stapel mit zwei dünnen titan-lagen für integrierte schaltung und zugehörige kammerabscheidung Withdrawn EP0852809A4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US53615595A 1995-09-29 1995-09-29
US536155 1995-09-29
PCT/US1996/015351 WO1997012399A1 (en) 1995-09-29 1996-09-25 Metal stack for integrated circuit having two thin layers of titanium with dedicated chamber depositions

Publications (2)

Publication Number Publication Date
EP0852809A1 EP0852809A1 (de) 1998-07-15
EP0852809A4 true EP0852809A4 (de) 1999-09-15

Family

ID=24137384

Family Applications (1)

Application Number Title Priority Date Filing Date
EP96933891A Withdrawn EP0852809A4 (de) 1995-09-29 1996-09-25 Metall-schicht-stapel mit zwei dünnen titan-lagen für integrierte schaltung und zugehörige kammerabscheidung

Country Status (7)

Country Link
EP (1) EP0852809A4 (de)
JP (1) JPH11511593A (de)
KR (1) KR19990063767A (de)
CN (1) CN1198252A (de)
AU (1) AU7245396A (de)
IL (1) IL123751A0 (de)
WO (1) WO1997012399A1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19903195B4 (de) 1999-01-27 2005-05-19 Infineon Technologies Ag Verfahren zur Verbesserung der Qualität von Metalleitbahnen auf Halbleiterstrukturen
US6492281B1 (en) * 2000-09-22 2002-12-10 Advanced Micro Devices, Inc. Method of fabricating conductor structures with metal comb bridging avoidance
DE10053915C2 (de) * 2000-10-31 2002-11-14 Infineon Technologies Ag Herstellungsverfahren für eine integrierte Schaltung
CN1324675C (zh) * 2003-04-02 2007-07-04 旺宏电子股份有限公司 防止微影工艺对准失误的结构与方法
CN1316613C (zh) * 2003-06-19 2007-05-16 旺宏电子股份有限公司 半导体的三明治抗反射结构金属层及其制程
KR100650904B1 (ko) * 2005-12-29 2006-11-28 동부일렉트로닉스 주식회사 알루미늄 배선 형성 방법
CN104221130B (zh) 2012-02-24 2018-04-24 天工方案公司 与化合物半导体的铜互连相关的改善的结构、装置和方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5231053A (en) * 1990-12-27 1993-07-27 Intel Corporation Process of forming a tri-layer titanium coating for an aluminum layer of a semiconductor device
EP0561132A1 (de) * 1992-02-26 1993-09-22 International Business Machines Corporation Mit feuerfestem Metall aus PVD und CVD bedeckte Metalleiterbahnen und Durchgangsleitungen niedrigen Widerstandes
US5470790A (en) * 1994-10-17 1995-11-28 Intel Corporation Via hole profile and method of fabrication
EP0721216A2 (de) * 1995-01-03 1996-07-10 International Business Machines Corporation Weicher Metallleiter und Herstellungsverfahren
WO1997012391A1 (en) * 1995-09-29 1997-04-03 Intel Corporation Improved interface between titanium and aluminum-alloy in metal stack for integrated circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4673623A (en) * 1985-05-06 1987-06-16 The Board Of Trustees Of The Leland Stanford Junior University Layered and homogeneous films of aluminum and aluminum/silicon with titanium and tungsten for multilevel interconnects

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5231053A (en) * 1990-12-27 1993-07-27 Intel Corporation Process of forming a tri-layer titanium coating for an aluminum layer of a semiconductor device
EP0561132A1 (de) * 1992-02-26 1993-09-22 International Business Machines Corporation Mit feuerfestem Metall aus PVD und CVD bedeckte Metalleiterbahnen und Durchgangsleitungen niedrigen Widerstandes
US5470790A (en) * 1994-10-17 1995-11-28 Intel Corporation Via hole profile and method of fabrication
EP0721216A2 (de) * 1995-01-03 1996-07-10 International Business Machines Corporation Weicher Metallleiter und Herstellungsverfahren
WO1997012391A1 (en) * 1995-09-29 1997-04-03 Intel Corporation Improved interface between titanium and aluminum-alloy in metal stack for integrated circuit

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
FINETTI M ET AL: "CORRELATION BETWEEN RESISTANCE BEHAVIOR AND MASS TRANSPORT IN AL -SI/TI MULTILAYER INTERCONNECTS", JOURNAL OF VACUUM SCIENCE AND TECHNOLOGY: PART A, vol. 5, no. 5, SEC. SERIES, 1 September 1987 (1987-09-01), pages 2854 - 2858, XP000005455, ISSN: 0734-2101 *
GARDNER D S ET AL: "HOMOGENEOUS AND LAYERED FILMS OF ALUMINUM/SILICON WITH TITANIUM FORMULTILEVEL INTERCONNECTS", PROCEEDINGS OF THE INTERNATIONAL VLSI MULTILEVEL INTERCONNECTION CONFERENCE, SANTA CLARA, 25 - 26 JUNE, 1985, no. CONF. 2, 25 June 1985 (1985-06-25), INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, pages 102 - 113, XP000010251 *
See also references of WO9712399A1 *
SHEN B W ET AL: "AN EVALUATION OF TITANIUM INTERLAYERED ALUMINUM FILMS FOR VLSI METALLIZATION", PROCEEDINGS OF THE INTERNATIONAL VLSI MULTILEVEL INTERCONNECTION CONFERENCE, SANTA CLARA, 25 - 26 JUNE, 1985, no. CONF. 2, 25 June 1985 (1985-06-25), INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, pages 114 - 120, XP000010250 *

Also Published As

Publication number Publication date
JPH11511593A (ja) 1999-10-05
KR19990063767A (ko) 1999-07-26
EP0852809A1 (de) 1998-07-15
CN1198252A (zh) 1998-11-04
WO1997012399A1 (en) 1997-04-03
AU7245396A (en) 1997-04-17
IL123751A0 (en) 1998-10-30

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