ES2006502A6 - Procedimiento para fabricar dispositivos y dospositivos fabricados por el mismo - Google Patents

Procedimiento para fabricar dispositivos y dospositivos fabricados por el mismo

Info

Publication number
ES2006502A6
ES2006502A6 ES8701744A ES8701744A ES2006502A6 ES 2006502 A6 ES2006502 A6 ES 2006502A6 ES 8701744 A ES8701744 A ES 8701744A ES 8701744 A ES8701744 A ES 8701744A ES 2006502 A6 ES2006502 A6 ES 2006502A6
Authority
ES
Spain
Prior art keywords
procedure
substrate
devices
entities
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES8701744A
Other languages
English (en)
Inventor
Patrick Kent Gallagher
Martin Laurence Green
Roland Albert Levy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Publication of ES2006502A6 publication Critical patent/ES2006502A6/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/43—Chemical deposition, e.g. chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

SE DESCRIBE UN PROCEDIMIENTO PARA FABRICAR UN DISPOSITIVO, V.GR., UN DISPOSITIVO SEMICONDUCTOR, QUE INCLUYE LA FASE DE HACER REACCIONAR POR LO MENOS DOS ENTIDADES REACTIVAS PARA FORMAR UN MATERIAL CON CONTENIDO METALICO SOBRE UNA REGION O REGIONES DE UN SUSTRATO ELABORADO O SIN ELABORAR. ES PROPIO DEL METODO EL RECONOCIMIENTO QUE UNA DE LAS ENTIDADES REACTIVAS REACCIONARA FRECUENTEMENTE CON MATERIAL DEL SUSTRATO PARA PRODUCIR RESULTADOS ANTERIORMENTE NO RECONOCIDOS Y MUY INCONVENIENTES, C.GR., LA EROSION CASI COMPLETA DE COMPONENTES DE DISPOSITIVOS FABRICADOS CON ANTERIORIDAD. POR LO TANTO, Y SEGUN EL PROCEDIMIENTO DE LA INVENCION, SE EMPLEA CUALQUIERA DE UNA VARIEDAD DE TECNICAS PARA REDUCIR EL REGIMEN DE REACCION ENTRE EL MATERIAL DEL SUSTRATO Y LA ENTIDAD QUE REACCIONA CON ESTE MATERIAL, EVITANDO AL MISMO TIEMPO UNA REDUCCION SUSTANCIAL EN EL REGIMEN DE REACCION ENTRE LAS DOS ENTIDADES.
ES8701744A 1986-06-16 1987-06-12 Procedimiento para fabricar dispositivos y dospositivos fabricados por el mismo Expired ES2006502A6 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US87447586A 1986-06-16 1986-06-16

Publications (1)

Publication Number Publication Date
ES2006502A6 true ES2006502A6 (es) 1989-05-01

Family

ID=25363874

Family Applications (1)

Application Number Title Priority Date Filing Date
ES8701744A Expired ES2006502A6 (es) 1986-06-16 1987-06-12 Procedimiento para fabricar dispositivos y dospositivos fabricados por el mismo

Country Status (6)

Country Link
EP (1) EP0268654A1 (es)
JP (1) JPH0680682B2 (es)
KR (1) KR920010125B1 (es)
CA (1) CA1286798C (es)
ES (1) ES2006502A6 (es)
WO (1) WO1987007763A1 (es)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5814545A (en) * 1995-10-02 1998-09-29 Motorola, Inc. Semiconductor device having a phosphorus doped PECVD film and a method of manufacture

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6050920A (ja) * 1983-08-30 1985-03-22 Toshiba Corp 半導体装置の製造方法
EP0178200A1 (en) * 1984-09-10 1986-04-16 FAIRCHILD CAMERA & INSTRUMENT CORPORATION Method of control for chemical vapor deposition
EP0194950B1 (en) * 1985-03-15 1992-05-27 Fairchild Semiconductor Corporation High temperature interconnect system for an integrated circuit

Also Published As

Publication number Publication date
JPH0680682B2 (ja) 1994-10-12
EP0268654A1 (en) 1988-06-01
CA1286798C (en) 1991-07-23
KR880701458A (ko) 1988-07-27
JPS63503581A (ja) 1988-12-22
KR920010125B1 (ko) 1992-11-16
WO1987007763A1 (en) 1987-12-17

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