ES2041757T3 - Cola de espera, constituida por varios elementos de memoria. - Google Patents

Cola de espera, constituida por varios elementos de memoria.

Info

Publication number
ES2041757T3
ES2041757T3 ES198888116010T ES88116010T ES2041757T3 ES 2041757 T3 ES2041757 T3 ES 2041757T3 ES 198888116010 T ES198888116010 T ES 198888116010T ES 88116010 T ES88116010 T ES 88116010T ES 2041757 T3 ES2041757 T3 ES 2041757T3
Authority
ES
Spain
Prior art keywords
memory element
memory elements
memory
nel
field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES198888116010T
Other languages
English (en)
Inventor
Hubert Hulters
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wincor Nixdorf International GmbH
Original Assignee
Siemens Nixdorf Informationssysteme AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Nixdorf Informationssysteme AG filed Critical Siemens Nixdorf Informationssysteme AG
Application granted granted Critical
Publication of ES2041757T3 publication Critical patent/ES2041757T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • G06F5/14—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations for overflow or underflow handling, e.g. full or empty flags
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F2205/06—Indexing scheme relating to groups G06F5/06 - G06F5/16
    • G06F2205/064—Linked list, i.e. structure using pointers, e.g. allowing non-contiguous address segments in one logical buffer or dynamic buffer space allocation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Communication Control (AREA)
  • Shift Register Type Memory (AREA)
  • Debugging And Monitoring (AREA)
  • Complex Calculations (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)

Abstract

LOS ELEMENTOS DE MEMORIA (POR EJEMPLO EL1-EL3) SE CONCATENAN PARA FORMAR UNA CADENA AULAR POR MEDIO DE CAMPOS DE REGISTRO DE DIRECCIONES (AD-NEL Y DA-VEL). ADEMAS, CADA ELEMENTO DE MEMORIA POSEE UN CAMPO DE REGISTRO DE CONTROL (CONTF), CUYO CONTENIDO CONCUERDA CON EL CONTENIDO (AD-NEL) DEL CAMPO DE REGISTRO DE DIRECCIONES DEL ELEMENTODE MEMORIA SIGUIENTE, CUANDO ESTE ELEMENTO DE MEMORIA ESTA PREPARADO PARA RECIBIR INFORMACIONES A MEMORIZAR EN SU CAMPO DE DATOS (DF) O QUE, EN FORMA DE REGISTRO DE CIERRE (F), INDICA EL FINAL DE LA COLA DE ESPERA, LO QUE DA LUGAR AL RECHACE DE DEMANDAS DE MEMORIZACION ULTERIORES. LA ACTIVACION DE LOS ELEMENTOS DE MEMORIA SE REALIZA CON DOS INDICADORES DE DIRECCION CENTRALES, EL DE ENTRADA Y EL DE SALIDA. EL INDICADOR DE ENTRADA SEÑALA SIEMPRE EL CAMPO DE REGISTRO DE CONTROL (CONTF) DEL ELEMENTO DE MEMORIA A TRAVES DEL QUE SE PUEDE ACTIVAR EL ELEMENTO DE MEMORIA SIGUIENTE PARA EL ALMACENAMIENTO DE INFORMACION. EL INDICADOR DE SALIDA SEÑALA SIEMPRE EL PRINCIPIO DEL CAMPO DE DATOS (DF) DEL ELEMENTO DE MEMORIA, QUE CONTIENE LA INFORMACION SALIENTE. DESPUES DE LA ENTRADA Y DE LA SALIDA SE AJUSTAN LOS INDICADORES AL ELEMENTO DE MEMORIA SIGUIENTE SELECCIONADO POR EL CORRESPONDIENTE REGISTRO DE DIRECCIONES (AD-NEL). EL REGISTRO DE CIERRE (F) SE PUEDE UTILIZAR TAMBIEN PARA AMPLIAR LA COLA DE ESPERA POR INCOPRORACION DE ELEMENTOS DE MEMORIA ADICIONALES. IGUALMENTE,ES POSIBLE ELIMINAR ELEMENTOS DE MEMEORIA.
ES198888116010T 1988-09-28 1988-09-28 Cola de espera, constituida por varios elementos de memoria. Expired - Lifetime ES2041757T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP19880116010 EP0360899B1 (de) 1988-09-28 1988-09-28 Warteschlange, bestehend aus mehreren Speicherelementen

Publications (1)

Publication Number Publication Date
ES2041757T3 true ES2041757T3 (es) 1993-12-01

Family

ID=8199384

Family Applications (1)

Application Number Title Priority Date Filing Date
ES198888116010T Expired - Lifetime ES2041757T3 (es) 1988-09-28 1988-09-28 Cola de espera, constituida por varios elementos de memoria.

Country Status (4)

Country Link
EP (1) EP0360899B1 (es)
AT (1) ATE92657T1 (es)
DE (1) DE3882992D1 (es)
ES (1) ES2041757T3 (es)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4038328A1 (de) * 1990-12-01 1992-06-11 Grundig Emv Adress-steuerung fuer einen first in-/first out-speicher
DE4424375C1 (de) 1994-07-11 1995-11-02 Siemens Nixdorf Inf Syst Verfahren zur Behandlung von Unterbrechungsanforderungen und Prozeßaufrufen bei im Echtzeitbetrieb arbeitenden Datenverarbeitungsanlagen
EP0760501B1 (en) * 1995-09-04 2002-02-20 Hewlett-Packard Company, A Delaware Corporation Data handling system with circular queue formed in paged memory

Also Published As

Publication number Publication date
DE3882992D1 (de) 1993-09-09
EP0360899B1 (de) 1993-08-04
EP0360899A1 (de) 1990-04-04
ATE92657T1 (de) 1993-08-15

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