ES2147306T3 - Un sistema de memoria expandida con arquitectura harvard. - Google Patents

Un sistema de memoria expandida con arquitectura harvard.

Info

Publication number
ES2147306T3
ES2147306T3 ES95938788T ES95938788T ES2147306T3 ES 2147306 T3 ES2147306 T3 ES 2147306T3 ES 95938788 T ES95938788 T ES 95938788T ES 95938788 T ES95938788 T ES 95938788T ES 2147306 T3 ES2147306 T3 ES 2147306T3
Authority
ES
Spain
Prior art keywords
store
address
storage
contained
addresses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES95938788T
Other languages
English (en)
Inventor
Edward R Sederlund
Robert J Lindesmith
Larry A Root
Wayne P Dupree
Lowell V Thomas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dow Chemical Co
Original Assignee
Dow Chemical Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dow Chemical Co filed Critical Dow Chemical Co
Application granted granted Critical
Publication of ES2147306T3 publication Critical patent/ES2147306T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System (AREA)
  • Bus Control (AREA)

Abstract

UN SISTEMA DE MEMORIA CON ARQUITECTURA HARVARD EXTENDIDA PERMITE UN ALMACEN DE LOS PUERTOS SE CARACTERICE POR CONTENER UNA SECUENCIA ORDENADA DE DIRECCIONES DE MEMORIA DE PROGRAMAS, Y UN ALMACEN DE VALORES PARA CONTENER UNA SERIE DE CONJUNTOS DE VALORES DE DATOS RELACIONADOS. CADA UNA DE LAS DIRECCIONES CONTENIDAS EN EL ALMACEN DE DIRECCIONES SE ASOCIA CON UN CONJUNTO DISTINTO DE INSTRUCCIONES, COMO, POR EJEMPLO, UNA SUBRUTINA CONTENIDA EN LA MEMORIA DEL PROGRAMA. EL ALMACEN DE DIRECCIONES PUEDE CONTENER TAMBIEN LA DIRECCION DE UNO O MAS ARGUMENTOS DE INSTRUCCIONES QUE, A SU VEZ, ESTAN CONTENIDOS EN EL ALMACEN DE VALORES O EN UNA MEMORIA DE DATOS SEPARADA. EL ALMACEN DE DIRECCIONES Y EL ALMACEN DE VALORES ESTAN CONECTADOS, PREFERIBLEMENTE, CON LA MISMA RUTA DE COMUNICACION DE DATOS QUE ES UTILIZADA POR LA MEMORIA DE DATOS DEL ORDENADOR. EL ALMACEN DE VALORES INCLUYE TAMBIEN UNA INTERFAZ LOGICA PARA PERMITIR QUE UNA PLURALIDAD DE AUMENTOS DE DIRECCIONES DIFERENTES SEA SELECCIONADA PROGRAMABLEMENTE.
ES95938788T 1994-10-06 1995-10-05 Un sistema de memoria expandida con arquitectura harvard. Expired - Lifetime ES2147306T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/319,453 US5555424A (en) 1994-10-06 1994-10-06 Extended Harvard architecture computer memory system with programmable variable address increment

Publications (1)

Publication Number Publication Date
ES2147306T3 true ES2147306T3 (es) 2000-09-01

Family

ID=23242298

Family Applications (1)

Application Number Title Priority Date Filing Date
ES95938788T Expired - Lifetime ES2147306T3 (es) 1994-10-06 1995-10-05 Un sistema de memoria expandida con arquitectura harvard.

Country Status (9)

Country Link
US (1) US5555424A (es)
EP (1) EP0784822B1 (es)
JP (1) JPH10507288A (es)
KR (1) KR970706541A (es)
CA (1) CA2200609A1 (es)
DE (1) DE69516888T2 (es)
ES (1) ES2147306T3 (es)
MX (1) MX9702495A (es)
WO (1) WO1996011443A1 (es)

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US6647301B1 (en) 1999-04-22 2003-11-11 Dow Global Technologies Inc. Process control system with integrated safety control system
US7003475B1 (en) 1999-05-07 2006-02-21 Medcohealth Solutions, Inc. Computer implemented resource allocation model and process to dynamically and optimally schedule an arbitrary number of resources subject to an arbitrary number of constraints in the managed care, health care and/or pharmacy industry
KR100496856B1 (ko) * 1999-05-20 2005-06-22 삼성전자주식회사 어드레스 확장이 가능한 데이터 처리 시스템
KR20010053658A (ko) * 1999-12-01 2001-07-02 윤종용 메모리의 영역 관리 방법
KR100391154B1 (ko) * 2001-05-14 2003-07-12 삼성전자주식회사 불휘발성 반도체 메모리 장치의 프로그램 방법 및 장치
US7003543B2 (en) 2001-06-01 2006-02-21 Microchip Technology Incorporated Sticky z bit
US7007172B2 (en) 2001-06-01 2006-02-28 Microchip Technology Incorporated Modified Harvard architecture processor having data memory space mapped to program memory space with erroneous execution protection
US6985986B2 (en) 2001-06-01 2006-01-10 Microchip Technology Incorporated Variable cycle interrupt disabling
US7467178B2 (en) 2001-06-01 2008-12-16 Microchip Technology Incorporated Dual mode arithmetic saturation processing
US7020788B2 (en) 2001-06-01 2006-03-28 Microchip Technology Incorporated Reduced power option
US6975679B2 (en) 2001-06-01 2005-12-13 Microchip Technology Incorporated Configuration fuses for setting PWM options
US6937084B2 (en) 2001-06-01 2005-08-30 Microchip Technology Incorporated Processor with dual-deadtime pulse width modulation generator
US6976158B2 (en) 2001-06-01 2005-12-13 Microchip Technology Incorporated Repeat instruction with interrupt
US6952711B2 (en) 2001-06-01 2005-10-04 Microchip Technology Incorporated Maximally negative signed fractional number multiplication
US6934728B2 (en) 2001-06-01 2005-08-23 Microchip Technology Incorporated Euclidean distance instructions
US7032082B1 (en) * 2001-08-31 2006-04-18 Juniper Networks, Inc. Centralized memory allocation with write pointer drift correction
US7027062B2 (en) * 2004-02-27 2006-04-11 Nvidia Corporation Register based queuing for texture requests
US8698823B2 (en) 2009-04-08 2014-04-15 Nvidia Corporation System and method for deadlock-free pipelining
US8560807B2 (en) 2011-12-14 2013-10-15 International Business Machines Corporation Accessing a logic device through a serial interface

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DE2028931B2 (de) * 1970-06-12 1972-12-21 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Digitale rechenmaschine mit mehreren akkumulatorregistern
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Also Published As

Publication number Publication date
DE69516888T2 (de) 2001-02-08
MX9702495A (es) 1998-04-30
CA2200609A1 (en) 1996-04-18
EP0784822A1 (en) 1997-07-23
WO1996011443A1 (en) 1996-04-18
US5555424A (en) 1996-09-10
DE69516888D1 (de) 2000-06-15
KR970706541A (ko) 1997-11-03
JPH10507288A (ja) 1998-07-14
EP0784822B1 (en) 2000-05-10

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