ES2155497T3 - Disposicion de memoria de video. - Google Patents

Disposicion de memoria de video.

Info

Publication number
ES2155497T3
ES2155497T3 ES95202185T ES95202185T ES2155497T3 ES 2155497 T3 ES2155497 T3 ES 2155497T3 ES 95202185 T ES95202185 T ES 95202185T ES 95202185 T ES95202185 T ES 95202185T ES 2155497 T3 ES2155497 T3 ES 2155497T3
Authority
ES
Spain
Prior art keywords
location
reading
signal
mechanisms
video memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES95202185T
Other languages
English (en)
Inventor
Johannes F A Koppelmans
Arthur Meijboom
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke KPN NV
Original Assignee
Koninklijke KPN NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke KPN NV filed Critical Koninklijke KPN NV
Application granted granted Critical
Publication of ES2155497T3 publication Critical patent/ES2155497T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/04Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Television Signal Processing For Recording (AREA)
  • Holo Graphy (AREA)
  • Color Television Image Signal Generators (AREA)
  • Closed-Circuit Television Systems (AREA)
  • Apparatus For Radiation Diagnosis (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Television Systems (AREA)
  • Semiconductor Memories (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Memory System (AREA)
  • Dram (AREA)

Abstract

PROPORCIONANDO UNA MONTAJE DE MEMORIA DE VIDEO DIGITAL CON PRIMEROS Y SEGUNDOS MECANISMOS GENERADORES DE LOCALIZACIONES, LAS SEÑALES DE VIDEO DIGITAL PUEDEN SER ESCRITAS EN UNA PRIMERA LOCALIZACION DE UNA MEMORIA NO MECANICA Y (CASI) INMEDIATAMENTE LEIDAS DESDE UNA SEGUNDA LOCALIZACION DE UNA MEMORIA NO MECANICA, SIENDO ESTA LECTURA CAPAZ DE REALIZAR SALTOS HACIA DELANTE Y HACIA ATRAS. COMO CONSECUENCIA DE LA UNION ENTRE LOS MECANISMOS PRIMERO Y SEGUNDO GENERADORES DE LOCALIZACIONES, SE HACE IMPOSIBLE, POR UN LADO, PASAR INJUSTAMENTE CON UN SALTO EN LA SEÑAL DE LECTURA LA SEÑAL DE ESCRITURA EN CURSO O PARALIZADA, Y POR OTRO LADO, PASAR INJUSTAMENTE CON LA SEÑAL DE LECTURA EN FUNCIONAMIENTO LA SEÑAL DE ESCRITURA PARALIZADA. PARA ESTE PROPOSITO, EL SEGUNDO MECANISMO GENERADOR DE LOCALIZACIONES DISPUESTO SOBRE MECANISMOS DETERMINANTES PARA DETERMINAR, EN RESPUESTA AL MENOS UNA SEÑAL DE ESCRITURA Y UNA SEÑAL DE LECTURA, UN SALTO DE LOCALIZACION PERMITIDO.
ES95202185T 1994-08-11 1995-08-10 Disposicion de memoria de video. Expired - Lifetime ES2155497T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL9401301A NL9401301A (nl) 1994-08-11 1994-08-11 Videogeheugeninrichting.

Publications (1)

Publication Number Publication Date
ES2155497T3 true ES2155497T3 (es) 2001-05-16

Family

ID=19864516

Family Applications (1)

Application Number Title Priority Date Filing Date
ES95202185T Expired - Lifetime ES2155497T3 (es) 1994-08-11 1995-08-10 Disposicion de memoria de video.

Country Status (11)

Country Link
US (1) US5822789A (es)
EP (1) EP0697700B1 (es)
JP (1) JPH0895847A (es)
KR (1) KR0177875B1 (es)
AT (1) ATE199610T1 (es)
CA (1) CA2155791C (es)
DE (1) DE69520247T2 (es)
DK (1) DK0697700T3 (es)
ES (1) ES2155497T3 (es)
FI (1) FI112840B (es)
NL (1) NL9401301A (es)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL9401301A (nl) 1994-08-11 1996-03-01 Nederland Ptt Videogeheugeninrichting.
US5940877A (en) * 1997-06-12 1999-08-17 International Business Machines Corporation Cache address generation with and without carry-in

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4623244A (en) * 1976-10-04 1986-11-18 International Business Machines Corporation Copy production machines
US4171538A (en) * 1978-01-23 1979-10-16 Rockwell International Corporation Elastic store slip circuit apparatus for preventing read and write operations interference
JPS58208905A (ja) * 1982-05-31 1983-12-05 Sony Corp タイムベ−スコレクタ
US4584639A (en) * 1983-12-23 1986-04-22 Key Logic, Inc. Computer security system
US4644495A (en) * 1984-01-04 1987-02-17 Activision, Inc. Video memory system
FR2561429B1 (fr) * 1984-03-13 1986-09-19 Trt Telecom Radio Electr Dispositif d'adressage pour fournir a une memoire des codes d'adresse
US4809156A (en) * 1984-03-19 1989-02-28 Trw Inc. Address generator circuit
US4757443A (en) * 1984-06-25 1988-07-12 Data General Corp. Data processing system with unified I/O control and adapted for display of graphics
US4875196A (en) * 1987-09-08 1989-10-17 Sharp Microelectronic Technology, Inc. Method of operating data buffer apparatus
JPH01291321A (ja) * 1988-05-18 1989-11-22 Mitsubishi Electric Corp 論理回路
JP2961792B2 (ja) * 1990-03-16 1999-10-12 日本電気株式会社 Ramアドレス生成回路
US5291275A (en) * 1990-06-20 1994-03-01 International Business Machines Incorporated Triple field buffer for television image storage and visualization on raster graphics display
US5255382A (en) * 1990-09-24 1993-10-19 Pawloski Martin B Program memory expander for 8051-based microcontrolled system
US5237432A (en) * 1991-12-23 1993-08-17 Xerox Corporation Image scaling apparatus
JPH05308544A (ja) * 1992-04-30 1993-11-19 Matsushita Electric Ind Co Ltd 映像信号処理装置
KR940007583B1 (ko) * 1992-08-03 1994-08-20 주식회사 금성사 영상 레이저 디스크 플레이어의 정지화면장치
JPH06215557A (ja) * 1993-01-19 1994-08-05 Fujitsu Ltd 半導体記憶装置
NL9401301A (nl) 1994-08-11 1996-03-01 Nederland Ptt Videogeheugeninrichting.

Also Published As

Publication number Publication date
CA2155791A1 (en) 1996-02-12
EP0697700B1 (en) 2001-03-07
FI953823A7 (fi) 1996-02-12
FI953823A0 (fi) 1995-08-11
ATE199610T1 (de) 2001-03-15
DK0697700T3 (da) 2001-07-02
EP0697700A1 (en) 1996-02-21
KR960008541A (ko) 1996-03-22
US5822789A (en) 1998-10-13
DE69520247T2 (de) 2001-08-09
CA2155791C (en) 1999-10-12
JPH0895847A (ja) 1996-04-12
NL9401301A (nl) 1996-03-01
KR0177875B1 (ko) 1999-05-15
DE69520247D1 (de) 2001-04-12
FI112840B (fi) 2004-01-15

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