ES2171757T3 - Procedimiento de dopado para producir homouniones en sustratos de semiconductores. - Google Patents

Procedimiento de dopado para producir homouniones en sustratos de semiconductores.

Info

Publication number
ES2171757T3
ES2171757T3 ES96943845T ES96943845T ES2171757T3 ES 2171757 T3 ES2171757 T3 ES 2171757T3 ES 96943845 T ES96943845 T ES 96943845T ES 96943845 T ES96943845 T ES 96943845T ES 2171757 T3 ES2171757 T3 ES 2171757T3
Authority
ES
Spain
Prior art keywords
homounions
impurities
mask
produce
semiconductor substrates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES96943845T
Other languages
English (en)
Inventor
Roland Schindler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fraunhofer Gesellschaft zur Foerderung der Angewandten Forschung eV
Original Assignee
Fraunhofer Gesellschaft zur Foerderung der Angewandten Forschung eV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fraunhofer Gesellschaft zur Foerderung der Angewandten Forschung eV filed Critical Fraunhofer Gesellschaft zur Foerderung der Angewandten Forschung eV
Application granted granted Critical
Publication of ES2171757T3 publication Critical patent/ES2171757T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/61—Formation of materials, e.g. in the shape of layers or pillars of insulating materials using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/141—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer comprising oxides only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/038—Diffusions-staged
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12014—All metal or with adjacent metals having metal particles
    • Y10T428/12028—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, etc.]
    • Y10T428/12063—Nonparticulate metal component
    • Y10T428/12104—Particles discontinuous
    • Y10T428/12111—Separated by nonmetal matrix or binder [e.g., welding electrode, etc.]
    • Y10T428/12125—Nonparticulate component has Fe-base
    • Y10T428/12132—Next to Fe-containing particles

Landscapes

  • Photovoltaic Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Led Devices (AREA)

Abstract

LA INVENCION DESCRIBE UN METODO DE IMPURIFICACION PARA FABRICAR HOMOUNIONES EN SUSTRATOS DE SEMICONDUCTORES EN LOS QUE LAS SUSTANCIAS DE IMPURIFICACION PENETRAN POR DIFUSION, QUE INCLUYE UNA FUENTE LUMINOSA CUYO ESPECTRO DE EMISION CONTIENE COMPONENTES ULTRAVIOLETAS Y QUE INCIDE SOBRE LA SUPERFICIE DEL SUSTRATO DE SEMICONDUCTOR. LA INVENCION SE CARACTERIZA PORQUE ENTRE EL SUSTRATO DE SEMICONDUCTOR A IMPURIFICAR Y LA FUENTE LUMINOSA SE INTRODUCE UNA MASCARA QUE, DEPENDIENDO DE LAS ZONAS A IMPURIFICAR CON SIMILAR CONCENTRACION DE IMPUREZAS, PRESENTA AREAS DE GROSOR VARIABLE HASTA LOS ORIFICIOS DE PASO DE LA MISMA; ENTRE LA MASCARA Y EL SUSTRATO DE SEMICONDUCTOR A IMPURIFICAR SE INSERTAN ATOMOS DE IMPUREZAS; Y PARA INTRODUCIR LAS IMPUREZAS POR DIFUSION EN EL SUSTRATO DE SEMICONDUCTOR SE ILUMINA LA SUPERFICIE DE LA MASCARA CON LA FUENTE LUMINOSA UTILIZANDO RAPID THERMAL PROCESSING (TRATAMIENTO TERMICO RAPIDO).
ES96943845T 1995-09-18 1996-08-28 Procedimiento de dopado para producir homouniones en sustratos de semiconductores. Expired - Lifetime ES2171757T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19534574A DE19534574C2 (de) 1995-09-18 1995-09-18 Dotierverfahren zur Herstellung von Homoübergängen in Halbleitersubstraten

Publications (1)

Publication Number Publication Date
ES2171757T3 true ES2171757T3 (es) 2002-09-16

Family

ID=7772477

Family Applications (1)

Application Number Title Priority Date Filing Date
ES96943845T Expired - Lifetime ES2171757T3 (es) 1995-09-18 1996-08-28 Procedimiento de dopado para producir homouniones en sustratos de semiconductores.

Country Status (7)

Country Link
US (1) US6232207B1 (es)
EP (1) EP0852062B1 (es)
JP (1) JPH11512566A (es)
AT (1) ATE213093T1 (es)
DE (2) DE19534574C2 (es)
ES (1) ES2171757T3 (es)
WO (1) WO1997011481A2 (es)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100273318B1 (ko) * 1998-11-04 2001-01-15 김영환 반도체 기판의 열처리 장치 및 열처리 방법
DE10018371B4 (de) * 2000-04-13 2005-07-21 Infineon Technologies Ag Verfahren zum Herstellen eines Halbleitersubstrats
DE10141352A1 (de) * 2001-08-23 2003-06-05 Osram Opto Semiconductors Gmbh Verfahren zur Oberflächenbehandlung eines Halbleiters
DE102005032807A1 (de) * 2005-07-12 2007-01-18 Merck Patent Gmbh Kombinierte Ätz- und Dotiermedien für Siliziumdioxidschichten und darunter liegendes Silizium
WO2007099042A1 (en) * 2006-02-28 2007-09-07 Ciba Holding Inc. Antimicrobial compounds
DE502006005702D1 (de) * 2006-05-04 2010-01-28 Elektrobit Wireless Comm Ltd Verfahren zur Inbetriebnahme eines RFID-Netzwerks
US20090239363A1 (en) * 2008-03-24 2009-09-24 Honeywell International, Inc. Methods for forming doped regions in semiconductor substrates using non-contact printing processes and dopant-comprising inks for forming such doped regions using non-contact printing processes
DE102008019402A1 (de) * 2008-04-14 2009-10-15 Gebr. Schmid Gmbh & Co. Verfahren zur selektiven Dotierung von Silizium sowie damit behandeltes Silizium-Substrat
TW200945596A (en) * 2008-04-16 2009-11-01 Mosel Vitelic Inc A method for making a solar cell with a selective emitter
US8053867B2 (en) 2008-08-20 2011-11-08 Honeywell International Inc. Phosphorous-comprising dopants and methods for forming phosphorous-doped regions in semiconductor substrates using phosphorous-comprising dopants
US7951696B2 (en) 2008-09-30 2011-05-31 Honeywell International Inc. Methods for simultaneously forming N-type and P-type doped regions using non-contact printing processes
US7820532B2 (en) * 2008-12-29 2010-10-26 Honeywell International Inc. Methods for simultaneously forming doped regions having different conductivity-determining type element profiles
US8518170B2 (en) 2008-12-29 2013-08-27 Honeywell International Inc. Boron-comprising inks for forming boron-doped regions in semiconductor substrates using non-contact printing processes and methods for fabricating such boron-comprising inks
DE102009041546A1 (de) * 2009-03-27 2010-10-14 Bosch Solar Energy Ag Verfahren zur Herstellung von Solarzellen mit selektivem Emitter
US8324089B2 (en) 2009-07-23 2012-12-04 Honeywell International Inc. Compositions for forming doped regions in semiconductor substrates, methods for fabricating such compositions, and methods for forming doped regions using such compositions
IT1396367B1 (it) * 2009-10-14 2012-11-19 Italcementi Spa Procedimento per la preparazione di biossido di titanio dopato con carbonio.
US8629294B2 (en) 2011-08-25 2014-01-14 Honeywell International Inc. Borate esters, boron-comprising dopants, and methods of fabricating boron-comprising dopants
US8975170B2 (en) 2011-10-24 2015-03-10 Honeywell International Inc. Dopant ink compositions for forming doped regions in semiconductor substrates, and methods for fabricating dopant ink compositions
DE102012018746A1 (de) * 2012-09-21 2014-03-27 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zur Dotierung von Halbleitersubstraten

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4273950A (en) 1979-05-29 1981-06-16 Photowatt International, Inc. Solar cell and fabrication thereof using microwaves
GB2131608B (en) 1982-11-26 1987-01-14 Gen Electric Plc Fabricating semiconductor circuits
DE3402653A1 (de) 1984-01-26 1985-08-01 Siemens AG, 1000 Berlin und 8000 München Verfahren zur herstellung speziell dotierter bereiche in halbleitermaterial
US4619036A (en) * 1984-09-28 1986-10-28 Texas Instruments Incorporated Self-aligned low-temperature emitter drive-in
KR930702095A (ko) * 1990-10-02 1993-09-08 죤, 씨. 울훼 고체 도핑제 소스와 신속한 열처리를 사용한 실리콘 웨이퍼 도핑장치 및 방법
DE4223403C1 (de) 1992-07-16 1993-12-09 Fraunhofer Ges Forschung Verfahren zur Erzeugung von strukturierten, dotierten Bereichen auf Festkörpern
JP3562590B2 (ja) * 1993-12-01 2004-09-08 株式会社半導体エネルギー研究所 半導体装置作製方法
US5510271A (en) * 1994-09-09 1996-04-23 Georgia Tech Research Corporation Processes for producing low cost, high efficiency silicon solar cells

Also Published As

Publication number Publication date
EP0852062B1 (de) 2002-02-06
DE59608710D1 (de) 2002-03-21
DE19534574A1 (de) 1997-03-20
EP0852062A2 (de) 1998-07-08
ATE213093T1 (de) 2002-02-15
DE19534574C2 (de) 1997-12-18
US6232207B1 (en) 2001-05-15
WO1997011481A3 (de) 1997-05-09
JPH11512566A (ja) 1999-10-26
WO1997011481A2 (de) 1997-03-27

Similar Documents

Publication Publication Date Title
ES2171757T3 (es) Procedimiento de dopado para producir homouniones en sustratos de semiconductores.
KR960026980A (ko) 반도체 장치 및 그 제조 방법
KR920010884A (ko) 반도체 전계효과 트랜지스터 및 그 제조방법과 박막트랜지스터
WO2002004858A3 (en) Backlight with structured sufaces
ES2154850T3 (es) Formacion de contactos en sustratos semiconductores para detectores de radiacion y dispositivos de creacion de imagenes.
WO2003010831A1 (fr) Dispositif electroluminescent a semi-conducteur presentant un substrat irregulier
TW335503B (en) Semiconductor thin film and manufacturing method and semiconductor device and its manufacturing method
DE59911615D1 (de) Fluoreszierende, strukturierte formkörper
US3573568A (en) Light emitting semiconductor chips mounted in a slotted substrate forming a display apparatus
CA2223167A1 (en) Organic light emitting element and producing method thereof
GB1313829A (en) Transistors and aproduction thereof
IT1247438B (it) Dispositivo a semiconduttore avente well (pozzo) retrogrado e well (pozzo) diffuso e procedimento per la sua fabbricazione
GB1011615A (en) Electro-optical display devices
FR2807909B1 (fr) COUCHE MINCE SEMI-CONDUCTRICE DE GaInN, SON PROCEDE DE PREPARATION; DEL COMPRENANT CETTE COUCHE ET DISPOSITIF D'ECLAIRAGE COMPRENANT CETTE DEL
SE9000245L (sv) Halvledarkomponent och foerfarande foer dess framstaellning
AU4232697A (en) Light-insensitive resistor for current-limiting of field emission displays
ATE87768T1 (de) Herstellungsverfahren fuer eine ueberdeckungsschicht.
WO2002029904A1 (en) Receiving optics and photosemiconductor device having the same
GB1093822A (en) Improvements in or relating to the manufacture of semiconductor devices
KR940002933A (ko) Tft의 이온 도핑방법
ATE133007T1 (de) Diamantdiodenstruktur
JPS6428809A (en) Laser annealing device
DE50014588D1 (de) Flache beleuchtungsvorrichtung
KR900002665A (ko) 박막 전장 발광 표시소자의 제조방법
TW200510841A (en) Method for making thin-film semiconductor device, thin-film semiconductor device, method for making optoelectronic device, optoelectronic device, and electronic equipment

Legal Events

Date Code Title Description
FG2A Definitive protection

Ref document number: 852062

Country of ref document: ES