ES295772U - Un encapsulado plano para pastillas de memoria de circuito integrado, de aplicacion especial a circuitos de aviacion - Google Patents

Un encapsulado plano para pastillas de memoria de circuito integrado, de aplicacion especial a circuitos de aviacion

Info

Publication number
ES295772U
ES295772U ES1984295772U ES295772U ES295772U ES 295772 U ES295772 U ES 295772U ES 1984295772 U ES1984295772 U ES 1984295772U ES 295772 U ES295772 U ES 295772U ES 295772 U ES295772 U ES 295772U
Authority
ES
Spain
Prior art keywords
integrated circuit
flat package
circuit board
printed circuit
circuit memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
ES1984295772U
Other languages
English (en)
Other versions
ES295772Y (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of ES295772U publication Critical patent/ES295772U/es
Application granted granted Critical
Publication of ES295772Y publication Critical patent/ES295772Y/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Semiconductor Memories (AREA)
  • Credit Cards Or The Like (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

Un encapsulado plano para pastillas de memoria de circuito integrado, de aplicación especial a circuitos de aviación, que comprende: una base que tiene una cavidad en ella, siendo la citada base y la citada cavidad de forma rectangular, y teniendo una longitud entre sus extremos mayor que la anchura entre sus lados; asientos de conexión en los extremos de la citada cavidad, accesibles desde la citada cavidad; asientos de conexión en los bordes de la citada base accesibles desde el exterior de la citada base; y conectadores entre asientos interiores individuales y asientos exteriores individuales, de forma que una pastilla de memoria de circuito integrado puede ser situada dentro de la citada cavidad y conectada a los citados asientos interiores, y el citado encapsulado plano puede situadas sobre una placa de circuito impreso y conectarse a ésta mediante los citados asientos exteriores a lo largo del borde de la citada base.
ES1984295772U 1983-12-28 1984-12-27 Un encapsulado plano para pastillas de memoria de circuito integrado, de aplicacion especial a circuitos de aviacion Expired ES295772Y (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US56636483A 1983-12-28 1983-12-28

Publications (2)

Publication Number Publication Date
ES295772U true ES295772U (es) 1987-11-01
ES295772Y ES295772Y (es) 1988-05-16

Family

ID=24262576

Family Applications (1)

Application Number Title Priority Date Filing Date
ES1984295772U Expired ES295772Y (es) 1983-12-28 1984-12-27 Un encapsulado plano para pastillas de memoria de circuito integrado, de aplicacion especial a circuitos de aviacion

Country Status (9)

Country Link
EP (1) EP0167538B1 (es)
JP (1) JPS61500879A (es)
KR (1) KR920007209B1 (es)
AU (1) AU568416B2 (es)
CA (1) CA1232082A (es)
DE (1) DE3476297D1 (es)
ES (1) ES295772Y (es)
IL (1) IL73562A (es)
WO (1) WO1985002941A1 (es)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4676571A (en) * 1985-07-23 1987-06-30 Thomas & Betts Corporation Leaded chip carrier connector
GB2190555B (en) * 1986-05-03 1990-03-28 Burr Brown Ltd Surface mounted single package data acquisition system
US4961633A (en) * 1988-02-22 1990-10-09 Xerox Corporation VLSI optimized modulator
EP0689241A2 (en) * 1991-10-17 1995-12-27 Fujitsu Limited Carrier for carrying semiconductor device
KR100218291B1 (ko) * 1991-12-11 1999-09-01 구본준 세라믹 패들을 이용한 반도체 패키지 및 그 제작방법

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5471572A (en) * 1977-11-18 1979-06-08 Fujitsu Ltd Semiconductor device
GB2083285B (en) * 1980-02-12 1984-08-15 Mostek Corp Over/under dual in-line chip package
US4296456A (en) * 1980-06-02 1981-10-20 Burroughs Corporation Electronic package for high density integrated circuits
JPS5923044Y2 (ja) * 1980-08-28 1984-07-10 栗山ゴム株式会社 覆工板における着脱調節式ストツパ−装置
US4371912A (en) * 1980-10-01 1983-02-01 Motorola, Inc. Method of mounting interrelated components

Also Published As

Publication number Publication date
IL73562A (en) 1988-07-31
DE3476297D1 (en) 1989-02-23
IL73562A0 (en) 1985-02-28
EP0167538B1 (en) 1989-01-18
KR920007209B1 (ko) 1992-08-27
EP0167538A1 (en) 1986-01-15
AU3509084A (en) 1985-07-12
JPS61500879A (ja) 1986-05-01
WO1985002941A1 (en) 1985-07-04
CA1232082A (en) 1988-01-26
AU568416B2 (en) 1987-12-24
KR850005150A (ko) 1985-08-21
ES295772Y (es) 1988-05-16

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Legal Events

Date Code Title Description
PC1K Transfer of utility model
FD1K Utility model lapsed

Effective date: 20040202