ES8405171A1 - "una disposicion de circuito para el control de la transmision sincrona de datos" - Google Patents

"una disposicion de circuito para el control de la transmision sincrona de datos"

Info

Publication number
ES8405171A1
ES8405171A1 ES523534A ES523534A ES8405171A1 ES 8405171 A1 ES8405171 A1 ES 8405171A1 ES 523534 A ES523534 A ES 523534A ES 523534 A ES523534 A ES 523534A ES 8405171 A1 ES8405171 A1 ES 8405171A1
Authority
ES
Spain
Prior art keywords
data
circuit arrangement
controlling
processor
synchronous transmission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES523534A
Other languages
English (en)
Other versions
ES523534A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Voestalpine AG
Original Assignee
Voestalpine AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Voestalpine AG filed Critical Voestalpine AG
Publication of ES523534A0 publication Critical patent/ES523534A0/es
Publication of ES8405171A1 publication Critical patent/ES8405171A1/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/14—Two-way operation using the same type of signal, i.e. duplex
    • H04L5/143—Two-way operation using the same type of signal, i.e. duplex for modulated signals
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Communication Control (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Communication Cables (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

DISPOSICION DE CIRCUITOS PARA EL CONTROL DE LA TRANSMISION SINCRONA DE DATOS.LA DISPOSICION SE ENCUENTRA UBICADA ENTRE UNA UNIDAD EMISORA O RECEPTORA DE DATOS, TAL COMO UN ORDENADOR O UN TERMINAL (2), Y UN MODEM (5). LA DISPOSICION ESTA CONECTADA A LA UNIDAD EMISORA O RECEPTORA DE DATOS MEDIANTE UN ENLACE NORMALIZADO (4), TIPO V 24 O SIMILAR. LA SALIDA EN PARALELO DEL PROCESADOR, QUE TIENE UNA MEMORIA DE ALMACENAMIENTO INTERMEDIO DE DATOS, TAL COMO UN MICROORDENADOR (10) CON UN GENERADOR PROPIO DE SINCRONISMO (9), ESTA CONECTADA DIRECTAMENTE AL MODEM.EN EL CASO DE ENLACE NORMALIZADO EN SERIE, EL PROCESADOR O EL MICROORDENADOR SE ENCUENTRA CONECTADO CON DICHO ENLACE MEDIANTE UN EMISOR-RECEPTOR ASINCRONO.
ES523534A 1982-06-24 1983-06-23 "una disposicion de circuito para el control de la transmision sincrona de datos" Expired ES8405171A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
AT245882 1982-06-24

Publications (2)

Publication Number Publication Date
ES523534A0 ES523534A0 (es) 1984-05-16
ES8405171A1 true ES8405171A1 (es) 1984-05-16

Family

ID=3534724

Family Applications (1)

Application Number Title Priority Date Filing Date
ES523534A Expired ES8405171A1 (es) 1982-06-24 1983-06-23 "una disposicion de circuito para el control de la transmision sincrona de datos"

Country Status (6)

Country Link
EP (1) EP0098260B1 (es)
DE (1) DE3377763D1 (es)
ES (1) ES8405171A1 (es)
FI (1) FI832298L (es)
NO (1) NO832297L (es)
PT (1) PT76883B (es)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4700358A (en) * 1985-11-18 1987-10-13 Hayes Microcomputer Products, Inc. Synchronous/asynchronous modem

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1021004B (it) * 1973-11-09 1978-01-30 Honeywell Inf Systems Apparecchiatura elettronica di co mando di periferica per il collega mento locale e remoto della stessa ad un sistema di elaborazione dati
FR2404970A1 (fr) * 1977-10-03 1979-04-27 Sfena Systeme de couplage pour transmission en duplex de donnees numeriques entre deux unites de traitement
IT1146176B (it) * 1980-02-07 1986-11-12 Italdata Spa Dispositivo interfacciale per la gestione automatica di una linea telefonica commutata

Also Published As

Publication number Publication date
EP0098260A2 (de) 1984-01-11
FI832298A7 (fi) 1983-12-25
NO832297L (no) 1983-12-27
EP0098260B1 (de) 1988-08-17
PT76883A (en) 1983-07-01
FI832298A0 (fi) 1983-06-22
DE3377763D1 (en) 1988-09-22
EP0098260A3 (en) 1985-10-30
ES523534A0 (es) 1984-05-16
FI832298L (fi) 1983-12-25
PT76883B (en) 1986-01-27

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 19980102