FR2417852A1 - Substrat semi-conducteur et methode de fabrication de ce dernier - Google Patents

Substrat semi-conducteur et methode de fabrication de ce dernier

Info

Publication number
FR2417852A1
FR2417852A1 FR7903823A FR7903823A FR2417852A1 FR 2417852 A1 FR2417852 A1 FR 2417852A1 FR 7903823 A FR7903823 A FR 7903823A FR 7903823 A FR7903823 A FR 7903823A FR 2417852 A1 FR2417852 A1 FR 2417852A1
Authority
FR
France
Prior art keywords
semiconductor substrate
manufacturing
wafer
back surface
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7903823A
Other languages
English (en)
Other versions
FR2417852B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of FR2417852A1 publication Critical patent/FR2417852A1/fr
Application granted granted Critical
Publication of FR2417852B1 publication Critical patent/FR2417852B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12—Preparing bulk and homogeneous wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P36/00—Gettering within semiconductor bodies
    • H10P36/03—Gettering within semiconductor bodies within silicon bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/061—Gettering-armorphous layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/974—Substrate surface preparation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31—Surface property or characteristic of web, sheet or block

Landscapes

  • Mechanical Treatment Of Semiconductor (AREA)
  • Weting (AREA)

Abstract

Description d'un substrat semi-conducteur et méthode de fabrication de ce dernier. Dans un procédé de fabrication semi-conducteur d'une pastille à cristal unique en Si ou analogue, avant l'étape du polissage, la surface arrière d'une pastille en Si est meulée pour former une couche endommagée à épaisseur fixe, la pastille en Si est ensuite attaquée de façon chimique, et la surface arrière est de plus formée avec une pellicule d'oxyde par oxydation thermique, de façon à fabriquer un substrat semi-conducteur à effet d'obtention intense.
FR7903823A 1978-02-20 1979-02-15 Substrat semi-conducteur et methode de fabrication de ce dernier Granted FR2417852A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1826078A JPS54110783A (en) 1978-02-20 1978-02-20 Semiconductor substrate and its manufacture

Publications (2)

Publication Number Publication Date
FR2417852A1 true FR2417852A1 (fr) 1979-09-14
FR2417852B1 FR2417852B1 (fr) 1984-05-04

Family

ID=11966700

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7903823A Granted FR2417852A1 (fr) 1978-02-20 1979-02-15 Substrat semi-conducteur et methode de fabrication de ce dernier

Country Status (7)

Country Link
US (1) US4276114A (fr)
JP (1) JPS54110783A (fr)
CA (1) CA1121521A (fr)
DE (1) DE2906470A1 (fr)
FR (1) FR2417852A1 (fr)
GB (1) GB2014790B (fr)
NL (1) NL7901334A (fr)

Families Citing this family (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4321747A (en) * 1978-05-30 1982-03-30 Tokyo Shibaura Denki Kabushiki Kaisha Method of manufacturing a solid-state image sensing device
JPS5655052A (en) * 1979-10-11 1981-05-15 Nippon Telegr & Teleph Corp <Ntt> Mechanical and chemical polishing
US4247579A (en) * 1979-11-30 1981-01-27 General Electric Company Method for metallizing a semiconductor element
JPS56173527U (fr) * 1980-05-23 1981-12-22
US4390392A (en) * 1980-09-16 1983-06-28 Texas Instruments Incorporated Method for removal of minute physical damage to silicon wafers by employing laser annealing
JPS57115824A (en) * 1981-01-10 1982-07-19 Nec Home Electronics Ltd Removing epitaxial layer mound
DE3148957C2 (de) * 1981-12-10 1987-01-02 Wacker-Chemitronic Gesellschaft für Elektronik-Grundstoffe mbH, 8263 Burghausen Verfahren zum Herstellen rückseitig oberflächengestörter Halbleiterscheiben
US4401505A (en) * 1982-03-31 1983-08-30 The United States Of America As Represented By The Administrator National Aeronautics And Space Administration Method of increasing minority carrier lifetime in silicon web or the like
JPS58191422A (ja) * 1982-05-04 1983-11-08 Nec Corp 半導体装置の製造方法
US4410395A (en) * 1982-05-10 1983-10-18 Fairchild Camera & Instrument Corporation Method of removing bulk impurities from semiconductor wafers
DE3246480A1 (de) * 1982-12-15 1984-06-20 Wacker-Chemitronic Gesellschaft für Elektronik-Grundstoffe mbH, 8263 Burghausen Verfahren zur herstellung von halbleiterscheiben mit getternder scheibenrueckseite
US4631804A (en) * 1984-12-10 1986-12-30 At&T Bell Laboratories Technique for reducing substrate warpage springback using a polysilicon subsurface strained layer
JPS6296400A (ja) * 1985-10-23 1987-05-02 Mitsubishi Metal Corp ウエハの製造方法
DE3737815A1 (de) * 1987-11-06 1989-05-18 Wacker Chemitronic Siliciumscheiben zur erzeugung von oxidschichten hoher durchschlagsfestigkeit und verfahren zur ihrer herstellung
JPH06103678B2 (ja) * 1987-11-28 1994-12-14 株式会社東芝 半導体基板の加工方法
US4878988A (en) * 1988-10-03 1989-11-07 Motorola, Inc. Gettering process for semiconductor wafers
JPH03116820A (ja) * 1989-09-29 1991-05-17 Shin Etsu Handotai Co Ltd ミスフィット転位制御方法
JPH0817163B2 (ja) * 1990-04-12 1996-02-21 株式会社東芝 エピタキシャルウェーハの製造方法
JP2575545B2 (ja) * 1990-07-05 1997-01-29 株式会社東芝 半導体装置の製造方法
JP2763204B2 (ja) * 1991-02-21 1998-06-11 株式会社東芝 半導体基板及びその製造方法
JPH08760B2 (ja) * 1991-03-14 1996-01-10 信越半導体株式会社 シリコンウェーハの品質検査方法
JP2853506B2 (ja) * 1993-03-24 1999-02-03 信越半導体株式会社 ウエーハの製造方法
JP2894153B2 (ja) * 1993-05-27 1999-05-24 信越半導体株式会社 シリコンウエーハの製造方法、およびその装置
JP2910507B2 (ja) * 1993-06-08 1999-06-23 信越半導体株式会社 半導体ウエーハの製造方法
US5733175A (en) * 1994-04-25 1998-03-31 Leach; Michael A. Polishing a workpiece using equal velocity at all points overlapping a polisher
US5622875A (en) * 1994-05-06 1997-04-22 Kobe Precision, Inc. Method for reclaiming substrate from semiconductor wafers
US5607341A (en) * 1994-08-08 1997-03-04 Leach; Michael A. Method and structure for polishing a wafer during manufacture of integrated circuits
US5635414A (en) * 1995-03-28 1997-06-03 Zakaluk; Gregory Low cost method of fabricating shallow junction, Schottky semiconductor devices
JP3534207B2 (ja) * 1995-05-16 2004-06-07 コマツ電子金属株式会社 半導体ウェーハの製造方法
JP3134719B2 (ja) * 1995-06-23 2001-02-13 信越半導体株式会社 半導体ウェーハ研磨用研磨剤及び研磨方法
JPH0945643A (ja) * 1995-07-31 1997-02-14 Komatsu Electron Metals Co Ltd 半導体ウェハ及びその製造方法
JP3534213B2 (ja) * 1995-09-30 2004-06-07 コマツ電子金属株式会社 半導体ウェハの製造方法
US5855735A (en) * 1995-10-03 1999-01-05 Kobe Precision, Inc. Process for recovering substrates
JP3317330B2 (ja) * 1995-12-27 2002-08-26 信越半導体株式会社 半導体鏡面ウェーハの製造方法
JPH09270396A (ja) * 1996-03-29 1997-10-14 Komatsu Electron Metals Co Ltd 半導体ウェハの製法
US5821166A (en) * 1996-12-12 1998-10-13 Komatsu Electronic Metals Co., Ltd. Method of manufacturing semiconductor wafers
JP3620683B2 (ja) * 1996-12-27 2005-02-16 信越半導体株式会社 半導体ウエーハの製造方法
CN1272222A (zh) * 1997-08-21 2000-11-01 Memc电子材料有限公司 处理半导体晶片的方法
JPH11135474A (ja) * 1997-10-30 1999-05-21 Komatsu Electron Metals Co Ltd 半導体鏡面ウェハおよびその製造方法
US6214704B1 (en) 1998-12-16 2001-04-10 Memc Electronic Materials, Inc. Method of processing semiconductor wafers to build in back surface damage
JP2000260738A (ja) * 1999-03-10 2000-09-22 Hitachi Ltd 半導体基板の研削加工方法ならびに半導体装置および半導体装置の製造方法
WO2001034877A1 (fr) * 1999-11-10 2001-05-17 Memc Electronic Materials, Inc. Solution alcaline de gravure et procede permettant de graver des plaquettes de semi-conducteurs
US6257954B1 (en) 2000-02-23 2001-07-10 Memc Electronic Materials, Inc. Apparatus and process for high temperature wafer edge polishing
JP4840629B2 (ja) * 2001-05-23 2011-12-21 信越半導体株式会社 シリコンウェーハの評価方法
JP4575628B2 (ja) * 2001-08-23 2010-11-04 株式会社リコー 光偏向器及びその製造方法、光走査モジュール、光走査装置、画像形成装置、画像表示装置
US7593029B2 (en) 2001-08-20 2009-09-22 Ricoh Company, Ltd. Optical scanning device and image forming apparatus using the same
JP4544876B2 (ja) * 2003-02-25 2010-09-15 三洋電機株式会社 半導体装置の製造方法
US20050011860A1 (en) * 2003-07-15 2005-01-20 Masatoshi Ishii Substrate for magnetic recording medium, method for manufacturing the same and magnetic recording medium
JP4878738B2 (ja) * 2004-04-30 2012-02-15 株式会社ディスコ 半導体デバイスの加工方法
US20060194441A1 (en) * 2005-02-25 2006-08-31 Sakae Koyata Method for etching a silicon wafer and method for performing differentiation between the obverse and the reverse of a silicon wafer using the same method
JP4942329B2 (ja) * 2005-11-02 2012-05-30 信越ポリマー株式会社 半導体ウェーハの処理用治具及び半導体ウェーハの処理方法
US8261730B2 (en) * 2008-11-25 2012-09-11 Cambridge Energy Resources Inc In-situ wafer processing system and method
JP5287982B2 (ja) * 2009-04-13 2013-09-11 株式会社Ｓｕｍｃｏ シリコンエピタキシャルウェーハの製造方法
US8602845B2 (en) * 2011-09-23 2013-12-10 United Technologies Corporation Strengthening by machining
DE102012202099A1 (de) 2012-02-13 2013-08-14 Siltronic Ag Verfahren zum Abkühlen von Scheiben aus Halbleitermaterial
KR101347027B1 (ko) * 2012-03-21 2014-01-07 주식회사 케이엔제이 반도체 패키지 슬리밍장치 및 방법
JP6540430B2 (ja) * 2015-09-28 2019-07-10 東京エレクトロン株式会社 基板処理方法及び基板処理装置

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3041226A (en) * 1958-04-02 1962-06-26 Hughes Aircraft Co Method of preparing semiconductor crystals
US3009841A (en) * 1959-03-06 1961-11-21 Westinghouse Electric Corp Preparation of semiconductor devices having uniform junctions
NL271850A (fr) * 1961-02-03
US3128213A (en) * 1961-07-20 1964-04-07 Int Rectifier Corp Method of making a semiconductor device
DE1216651B (de) * 1963-03-28 1966-05-12 Siemens Ag Verfahren zum polierenden Abtragen von einkristallinen Halbleiterkoerpern, insbesondere Halbleiterscheiben
US3342652A (en) * 1964-04-02 1967-09-19 Ibm Chemical polishing of a semi-conductor substrate
US3615955A (en) * 1969-02-28 1971-10-26 Ibm Method for polishing a silicon surface
US3888053A (en) * 1973-05-29 1975-06-10 Rca Corp Method of shaping semiconductor workpiece
JPS5028753A (fr) * 1973-07-13 1975-03-24
JPS5051665A (fr) * 1973-09-07 1975-05-08
JPS5828731B2 (ja) * 1973-12-28 1983-06-17 テキサス インストルメンツ インコ−ポレ−テツド ゼツエンキバンジヨウヘノ シリコンソウサクセイホウホウ
US3905162A (en) * 1974-07-23 1975-09-16 Silicon Material Inc Method of preparing high yield semiconductor wafer
US3923567A (en) * 1974-08-09 1975-12-02 Silicon Materials Inc Method of reclaiming a semiconductor wafer
JPS51148355A (en) * 1975-06-14 1976-12-20 Fujitsu Ltd Single crystal semiconductor base plate
US3997368A (en) * 1975-06-24 1976-12-14 Bell Telephone Laboratories, Incorporated Elimination of stacking faults in silicon devices: a gettering process
DE2537464A1 (de) * 1975-08-22 1977-03-03 Wacker Chemitronic Verfahren zur entfernung spezifischer kristallbaufehler aus halbleiterscheiben
JPS5242366A (en) * 1975-09-30 1977-04-01 Sony Corp Method of preventing occurence of crystal defects of silicon wafers
JPS5242367A (en) * 1975-09-30 1977-04-01 Sony Corp Method of preventing occurence of crystal defects of silicon wafers
JPS52123169A (en) * 1976-04-07 1977-10-17 Ibm Method of making semiconductor devices using acoustic vibration
DE2625438A1 (de) * 1976-06-05 1977-12-15 Ibm Halbleiterplaettchen mit defekten und verfahren zu seiner herstellung
US4144099A (en) * 1977-10-31 1979-03-13 International Business Machines Corporation High performance silicon wafer and fabrication process

Also Published As

Publication number Publication date
NL7901334A (nl) 1979-08-22
FR2417852B1 (fr) 1984-05-04
JPS54110783A (en) 1979-08-30
CA1121521A (fr) 1982-04-06
GB2014790A (en) 1979-08-30
DE2906470A1 (de) 1979-08-23
US4276114A (en) 1981-06-30
GB2014790B (en) 1982-06-16

Similar Documents

Publication Publication Date Title
FR2417852A1 (fr) Substrat semi-conducteur et methode de fabrication de ce dernier
JPS6444065A (en) Manufacture of reverse silicon on insulator semiconductor device with pedestal structure
JPS6459866A (en) Manufacture of mos transistor
JPS5678155A (en) Semiconductor device and manufacture thereof
JPS5583229A (en) Producing semiconductor device
JPS57128942A (en) Manufacture of insulation isolating substrate
JPS57204146A (en) Manufacture of semiconductor device
JPS55132042A (en) Manufacture of bevel semiconductor device
JPS57187941A (en) Manufacture of semiconductor substrate
JPS57211747A (en) Manufacture of semiconductor device
JPS6430270A (en) Manufacture of insulated-gate semiconductor device
JPS57138162A (en) Manufacture of semiconductor device
JPS5735368A (en) Manufacture of semiconductor device
JPS5673476A (en) Manufacture of variable capacity diode
JPS57102045A (en) Manufacture of semiconductor device
JPS551117A (en) Manufacture of semiconductor device
JPS57113251A (en) Manufacture of semiconductor device
JPS57104224A (en) Forming method of insulating thin film
JPS5783025A (en) Manufacture of semiconductor substrate
JPS57121225A (en) Formation of contact
JPS57208156A (en) Manufacture of semiconductor device
JPS5619672A (en) Manufacture of semiconductor device
JPS6412544A (en) Manufacture of dielectric isolation substrate
JPS6430244A (en) Manufacture of semiconductor device
JPS5694651A (en) Manufacture of material for electronic parts

Legal Events

Date Code Title Description
ST Notification of lapse