FR3132789B1 - Contact pour composant électronique - Google Patents

Contact pour composant électronique Download PDF

Info

Publication number
FR3132789B1
FR3132789B1 FR2201326A FR2201326A FR3132789B1 FR 3132789 B1 FR3132789 B1 FR 3132789B1 FR 2201326 A FR2201326 A FR 2201326A FR 2201326 A FR2201326 A FR 2201326A FR 3132789 B1 FR3132789 B1 FR 3132789B1
Authority
FR
France
Prior art keywords
electronic component
contact
polysilicon
layer
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR2201326A
Other languages
English (en)
Other versions
FR3132789A1 (fr
Inventor
Christian Rivero
Pascal Fornara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR2201326A priority Critical patent/FR3132789B1/fr
Priority to US18/109,569 priority patent/US20230260835A1/en
Publication of FR3132789A1 publication Critical patent/FR3132789A1/fr
Application granted granted Critical
Publication of FR3132789B1 publication Critical patent/FR3132789B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0112—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/034—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics bottomless barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/047—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by introducing additional elements therein
    • H10W20/049—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by introducing additional elements therein by diffusing alloying elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers

Landscapes

  • Electrodes Of Semiconductors (AREA)

Abstract

Contact pour composant électronique La présente description concerne un procédé de fabrication d’un contact (250) sur une région semiconductrice (124, 126) d’un composant électronique (200), ledit procédé comprenant :- une étape de formation d’un empilement de couches adaptées à être électriquement conductrices sur les parois latérales et au fond d’un orifice (251) traversant une région diélectrique (142) du composant électronique, à partir d’une première surface (142A) de ladite région diélectrique, le fond de l’orifice débouchant au droit de la région semiconductrice, ladite étape de formation comprenant la formation d’une couche (253) de polysilicium et d’une couche d’un premier métal en contact avec la couche de polysilicium, ledit premier métal étant choisi dans le groupe des terres rares, et étant adapté à former avec le polysilicium un siliciure de métal ; puis- une étape de recuit thermique adaptée à faire réagir le premier métal et le polysilicium, conduisant à la formation d’une couche (256) de siliciure de métal comprenant au moins une portion s’étendant dans la direction longitudinale de l’orifice. Figure pour l'abrégé : Fig. 2G
FR2201326A 2022-02-15 2022-02-15 Contact pour composant électronique Active FR3132789B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR2201326A FR3132789B1 (fr) 2022-02-15 2022-02-15 Contact pour composant électronique
US18/109,569 US20230260835A1 (en) 2022-02-15 2023-02-14 Contact for electronic component

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2201326A FR3132789B1 (fr) 2022-02-15 2022-02-15 Contact pour composant électronique
FR2201326 2022-02-15

Publications (2)

Publication Number Publication Date
FR3132789A1 FR3132789A1 (fr) 2023-08-18
FR3132789B1 true FR3132789B1 (fr) 2025-01-03

Family

ID=82594586

Family Applications (1)

Application Number Title Priority Date Filing Date
FR2201326A Active FR3132789B1 (fr) 2022-02-15 2022-02-15 Contact pour composant électronique

Country Status (2)

Country Link
US (1) US20230260835A1 (fr)
FR (1) FR3132789B1 (fr)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5504038A (en) * 1995-05-25 1996-04-02 United Microelectronics Corporation Method for selective tungsten sidewall and bottom contact formation
US5985749A (en) * 1997-06-25 1999-11-16 Vlsi Technology, Inc. Method of forming a via hole structure including CVD tungsten silicide barrier layer
US6194315B1 (en) * 1999-04-16 2001-02-27 Micron Technology, Inc. Electrochemical cobalt silicide liner for metal contact fills and damascene processes
KR100715267B1 (ko) * 2005-06-09 2007-05-08 삼성전자주식회사 스택형 반도체 장치 및 그 제조 방법
US8338265B2 (en) * 2008-11-12 2012-12-25 International Business Machines Corporation Silicided trench contact to buried conductive layer
DE102010064288B4 (de) * 2010-12-28 2012-12-06 GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG Halbleiterbauelement mit Kontaktelementen mit silizidierten Seitenwandgebieten

Also Published As

Publication number Publication date
FR3132789A1 (fr) 2023-08-18
US20230260835A1 (en) 2023-08-17

Similar Documents

Publication Publication Date Title
EP0174185B1 (fr) Dispositif semi-conducteur et procédé pour sa fabrication
US4910578A (en) Semiconductor device having a metal electrode interconnection film with two layers of silicide
US6114207A (en) Method of producing a semiconductor device
US20100187601A1 (en) Semiconductor device
EP1983576A2 (fr) Dispositif métal-oxyde-semi-conducteur à tranchée et son procédé de fabrication
US5559047A (en) Method of reliably manufacturing a semiconductor device having a titanium silicide nitride
JP2008034805A (ja) 半導体装置および半導体装置の製造方法
KR900005589A (ko) 반도체 집적회로 장치 및 그 제조방법
JPH05206451A (ja) Ｍｏｓｆｅｔおよびその製造方法
FR3132789B1 (fr) Contact pour composant électronique
JP2001298022A (ja) 半導体装置及びその製造方法
US7586152B2 (en) Semiconductor structure
TWI298175B (en) Gate structure and fabricating method thereof
JPH02290019A (ja) 電極配線構造体と半導体集積回路装置の製造方法
US5576242A (en) Method of forming self-aligned buried contact
JP2001015748A5 (fr)
JPH0311552B2 (fr)
Lutzen et al. Integration of capacitor for sub-100-nm DRAM trench technology
JP2001077362A (ja) 半導体装置およびその製造方法
US11824114B2 (en) Transistor device having a field plate in an elongate active trench
CA2238128A1 (fr) Gravure a trois etapes pour fenetre de contact
JP2538269B2 (ja) 半導体装置の製造方法
CN111627911B (zh) 字线结构及其制造方法
JPH0685175A (ja) 半導体装置
US20030098478A1 (en) Field effect transistor and fabrication method

Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 2

PLSC Publication of the preliminary search report

Effective date: 20230818

PLFP Fee payment

Year of fee payment: 3

PLFP Fee payment

Year of fee payment: 4

PLFP Fee payment

Year of fee payment: 5