HK20793A - Electronic device having a multi-layer wiring structure - Google Patents

Electronic device having a multi-layer wiring structure

Info

Publication number
HK20793A
HK20793A HK207/93A HK20793A HK20793A HK 20793 A HK20793 A HK 20793A HK 207/93 A HK207/93 A HK 207/93A HK 20793 A HK20793 A HK 20793A HK 20793 A HK20793 A HK 20793A
Authority
HK
Hong Kong
Prior art keywords
film
wiring
resin
semiconductor
cvd
Prior art date
Application number
HK207/93A
Other languages
German (de)
English (en)
Inventor
Kazumichi Fujioka
Tokio Kato
Eiichi Takahashi
Original Assignee
Hitachi Microcomputer System Ltd.
Hitachi, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Microcomputer System Ltd., Hitachi, Ltd. filed Critical Hitachi Microcomputer System Ltd.
Publication of HK20793A publication Critical patent/HK20793A/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H10P14/6923—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/121—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Claims (6)

1. Dispositif à semiconducteurs enrobé dans une résine et possédant une structure de câblage à couches multiples comprenant une pellicule isolante minérale (14) disposée entre un câblage inférieur (13) et un câblage supérieur (15), une pellicule de résine organique (17b) formée sur ledit câblage supérieur (15), et une résine époxy utilisée comme résine d'enrobage (19), caractérisé en ce qu'une pellicule de verre aux phosphosilicates (17a) est formée entre ledit câblage supérieur et ladite pellicule de résine organique.
2. Dispositif à semiconducteurs selon la revendication 1, dans lequel ladite pellicule de résine organique (17b) est une pellicule de résine polyimide.
3. Dispositif à semiconducteurs selon la revendication 1 ou 2, dans lequel ledit enrobage en résine (19) est formé au moyen d'une technique de moulage par transfert.
4. Dispositif à semiconducteurs selon l'une quelconque des revendications 1 à 3, dans lequel ladite pellicule isolante minérale (14) est constituée par une pellicule isolante de plasma, une pellicule isolante en verre et une pellicule de verre aux phosphosilicates.
5. Dispositif à semiconducteurs selon l'une quelconque des revendications 1 à 4, dans lequel une pellicule isolante en verre (17c) est intercalée entre ladite pellicule de résine organique (17b) et ladite pellicule de verre aux phosphosilicates (17a).
6. Dispositif à semiconducteurs selon l'une quelconque des revendications 1 à 5, dans lequel .une pellicule de Si02 ou une pellicule de SiN ou une pellicule de verre avec spin est formée entre la pellicule de verre aux phosphosilicates (17a) et la pellicule de résine organique (17b).
HK207/93A 1983-04-15 1993-03-11 Electronic device having a multi-layer wiring structure HK20793A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58065337A JPS59191353A (ja) 1983-04-15 1983-04-15 多層配線構造を有する電子装置

Publications (1)

Publication Number Publication Date
HK20793A true HK20793A (en) 1993-03-19

Family

ID=13284011

Family Applications (1)

Application Number Title Priority Date Filing Date
HK207/93A HK20793A (en) 1983-04-15 1993-03-11 Electronic device having a multi-layer wiring structure

Country Status (6)

Country Link
EP (1) EP0122631B1 (fr)
JP (1) JPS59191353A (fr)
KR (1) KR870000350B1 (fr)
DE (1) DE3483488D1 (fr)
HK (1) HK20793A (fr)
SG (1) SG102492G (fr)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4693780A (en) * 1985-02-22 1987-09-15 Siemens Aktiengesellschaft Electrical isolation and leveling of patterned surfaces
JPH0652732B2 (ja) * 1985-08-14 1994-07-06 三菱電機株式会社 パツシベ−シヨン膜の形成方法
ATE67897T1 (de) * 1985-10-22 1991-10-15 Siemens Ag Integrierte halbleiterschaltung mit einem elektrisch leitenden flaechenelement.
EP0275588B1 (fr) * 1986-12-19 1993-11-10 Koninklijke Philips Electronics N.V. Procédé de fabrication d'un dispositif semi-conducteur avec une contrainte à l'emballage réduite
US5171716A (en) * 1986-12-19 1992-12-15 North American Philips Corp. Method of manufacturing semiconductor device with reduced packaging stress
JP2631659B2 (ja) * 1987-07-09 1997-07-16 富士通株式会社 半導体装置
JPH01214141A (ja) * 1988-02-23 1989-08-28 Nec Corp フリップチップ型半導体装置
US5252844A (en) * 1988-11-17 1993-10-12 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a redundant circuit and method of manufacturing thereof
JPH02256258A (ja) * 1988-11-17 1990-10-17 Mitsubishi Electric Corp 半導体装置の製造方法
NL8900989A (nl) * 1989-04-20 1990-11-16 Philips Nv Halfgeleiderinrichting met een in een kunststof omhulling ingebed halfgeleiderlichaam.
NL9100337A (nl) * 1991-02-26 1992-09-16 Philips Nv Halfgeleiderinrichting.
GB2279804A (en) * 1993-07-02 1995-01-11 Plessey Semiconductors Ltd Insulating layers for multilayer wiring
US5438022A (en) 1993-12-14 1995-08-01 At&T Global Information Solutions Company Method for using low dielectric constant material in integrated circuit fabrication
KR100582371B1 (ko) * 1999-12-24 2006-05-23 주식회사 하이닉스반도체 반도체 소자의 금속배선 및 그 형성방법
JP2001284499A (ja) * 2000-03-09 2001-10-12 Lucent Technol Inc 半導体デバイスとその製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4001871A (en) * 1968-06-17 1977-01-04 Nippon Electric Company, Ltd. Semiconductor device
JPS5851425B2 (ja) * 1975-08-22 1983-11-16 株式会社日立製作所 ハンドウタイソウチ
EP0021818B1 (fr) * 1979-06-21 1983-10-05 Fujitsu Limited Dispositif électronique comprenant une structure d'interconnexion multicouche
US4433004A (en) * 1979-07-11 1984-02-21 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor device and a method for manufacturing the same
JPS5768059A (en) * 1980-10-15 1982-04-26 Mitsubishi Electric Corp Semiconductor device

Also Published As

Publication number Publication date
DE3483488D1 (de) 1990-12-06
KR840008535A (ko) 1984-12-15
EP0122631A3 (en) 1986-09-10
JPS59191353A (ja) 1984-10-30
KR870000350B1 (ko) 1987-03-04
EP0122631A2 (fr) 1984-10-24
EP0122631B1 (fr) 1990-10-31
SG102492G (en) 1992-12-24

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)