IT1065959B - Procedimento per fabbricare un wafer semiconduttore o piastrina - Google Patents
Procedimento per fabbricare un wafer semiconduttore o piastrinaInfo
- Publication number
- IT1065959B IT1065959B IT25519/76A IT2551976A IT1065959B IT 1065959 B IT1065959 B IT 1065959B IT 25519/76 A IT25519/76 A IT 25519/76A IT 2551976 A IT2551976 A IT 2551976A IT 1065959 B IT1065959 B IT 1065959B
- Authority
- IT
- Italy
- Prior art keywords
- semiconductor
- procedure
- manufacturing
- plate wafer
- wafer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US59925675A | 1975-07-25 | 1975-07-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IT1065959B true IT1065959B (it) | 1985-03-04 |
Family
ID=24398900
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT25519/76A IT1065959B (it) | 1975-07-25 | 1976-07-20 | Procedimento per fabbricare un wafer semiconduttore o piastrina |
Country Status (7)
| Country | Link |
|---|---|
| JP (1) | JPS5216174A (it) |
| CA (1) | CA1076266A (it) |
| DE (1) | DE2632942A1 (it) |
| FR (1) | FR2319198A1 (it) |
| GB (1) | GB1522755A (it) |
| IT (1) | IT1065959B (it) |
| NL (1) | NL7608227A (it) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5031222A (it) * | 1973-07-19 | 1975-03-27 | ||
| JPS5941870A (ja) * | 1982-08-25 | 1984-03-08 | Toshiba Corp | 半導体装置の製造方法 |
-
1976
- 1976-07-07 GB GB28230/76A patent/GB1522755A/en not_active Expired
- 1976-07-15 CA CA257,051A patent/CA1076266A/en not_active Expired
- 1976-07-20 IT IT25519/76A patent/IT1065959B/it active
- 1976-07-22 DE DE19762632942 patent/DE2632942A1/de not_active Ceased
- 1976-07-23 NL NL7608227A patent/NL7608227A/xx not_active Application Discontinuation
- 1976-07-23 FR FR7622468A patent/FR2319198A1/fr active Granted
- 1976-07-23 JP JP51087396A patent/JPS5216174A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| CA1076266A (en) | 1980-04-22 |
| DE2632942A1 (de) | 1977-02-03 |
| FR2319198B1 (it) | 1980-07-25 |
| FR2319198A1 (fr) | 1977-02-18 |
| JPS5216174A (en) | 1977-02-07 |
| GB1522755A (en) | 1978-08-31 |
| NL7608227A (nl) | 1977-01-27 |
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