IT1398204B1 - Sistema e metodo per eseguire il test elettrico di vie passanti nel silicio (tsv - through silicon vias). - Google Patents

Sistema e metodo per eseguire il test elettrico di vie passanti nel silicio (tsv - through silicon vias).

Info

Publication number
IT1398204B1
IT1398204B1 ITTO2010A000109A ITTO20100109A IT1398204B1 IT 1398204 B1 IT1398204 B1 IT 1398204B1 IT TO2010A000109 A ITTO2010A000109 A IT TO2010A000109A IT TO20100109 A ITTO20100109 A IT TO20100109A IT 1398204 B1 IT1398204 B1 IT 1398204B1
Authority
IT
Italy
Prior art keywords
silicon
tsv
perform
electric test
vias
Prior art date
Application number
ITTO2010A000109A
Other languages
English (en)
Inventor
Alberto Pagani
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to ITTO2010A000109A priority Critical patent/IT1398204B1/it
Priority to US13/579,562 priority patent/US9111895B2/en
Priority to PCT/EP2011/052319 priority patent/WO2011101393A1/en
Priority to CN201180008062.1A priority patent/CN102782839B/zh
Priority to CN201510316863.4A priority patent/CN104916622B/zh
Publication of ITTO20100109A1 publication Critical patent/ITTO20100109A1/it
Application granted granted Critical
Publication of IT1398204B1 publication Critical patent/IT1398204B1/it
Priority to US14/827,796 priority patent/US9874598B2/en
Priority to US15/841,585 priority patent/US10775426B2/en

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/27—Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements
    • G01R31/275—Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements for testing individual semiconductor components within integrated circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27—Structural arrangements therefor
    • H10P74/277—Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0245—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising use of blind vias during the manufacture
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/212—Top-view shapes or dispositions, e.g. top-view layouts of the vias
    • H10W20/2125—Top-view shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/212—Top-view shapes or dispositions, e.g. top-view layouts of the vias
    • H10W20/2125—Top-view shapes
    • H10W20/2128—Coaxial through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/217—Through-semiconductor vias, e.g. TSVs comprising ring-shaped isolation structures outside of the via holes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Automation & Control Theory (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
ITTO2010A000109A 2010-02-16 2010-02-16 Sistema e metodo per eseguire il test elettrico di vie passanti nel silicio (tsv - through silicon vias). IT1398204B1 (it)

Priority Applications (7)

Application Number Priority Date Filing Date Title
ITTO2010A000109A IT1398204B1 (it) 2010-02-16 2010-02-16 Sistema e metodo per eseguire il test elettrico di vie passanti nel silicio (tsv - through silicon vias).
US13/579,562 US9111895B2 (en) 2010-02-16 2011-02-16 System and method for electrical testing of through silicon vias (TSVs)
PCT/EP2011/052319 WO2011101393A1 (en) 2010-02-16 2011-02-16 SYSTEM AND METHOD FOR ELECTRICAL TESTING OF THROUGH SILICON VIAS (TSVs)
CN201180008062.1A CN102782839B (zh) 2010-02-16 2011-02-16 用于硅通孔(tsv)的电测试的系统和方法
CN201510316863.4A CN104916622B (zh) 2010-02-16 2011-02-16 半导体材料的主体和用于制造半导体材料的主体的方法
US14/827,796 US9874598B2 (en) 2010-02-16 2015-08-17 System and method for electrical testing of through silicon vias (TSVs)
US15/841,585 US10775426B2 (en) 2010-02-16 2017-12-14 System and method for electrical testing of through silicon vias (TSVs)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITTO2010A000109A IT1398204B1 (it) 2010-02-16 2010-02-16 Sistema e metodo per eseguire il test elettrico di vie passanti nel silicio (tsv - through silicon vias).

Publications (2)

Publication Number Publication Date
ITTO20100109A1 ITTO20100109A1 (it) 2011-08-17
IT1398204B1 true IT1398204B1 (it) 2013-02-14

Family

ID=42648051

Family Applications (1)

Application Number Title Priority Date Filing Date
ITTO2010A000109A IT1398204B1 (it) 2010-02-16 2010-02-16 Sistema e metodo per eseguire il test elettrico di vie passanti nel silicio (tsv - through silicon vias).

Country Status (4)

Country Link
US (3) US9111895B2 (it)
CN (2) CN104916622B (it)
IT (1) IT1398204B1 (it)
WO (1) WO2011101393A1 (it)

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US20150355267A1 (en) 2015-12-10
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US20130057312A1 (en) 2013-03-07
US9111895B2 (en) 2015-08-18
CN104916622B (zh) 2019-01-04
US9874598B2 (en) 2018-01-23
ITTO20100109A1 (it) 2011-08-17
US10775426B2 (en) 2020-09-15
CN102782839A (zh) 2012-11-14
US20180106854A1 (en) 2018-04-19

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