JP3884805B2 - 集積回路用出力バッファ - Google Patents

集積回路用出力バッファ Download PDF

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Publication number
JP3884805B2
JP3884805B2 JP34049796A JP34049796A JP3884805B2 JP 3884805 B2 JP3884805 B2 JP 3884805B2 JP 34049796 A JP34049796 A JP 34049796A JP 34049796 A JP34049796 A JP 34049796A JP 3884805 B2 JP3884805 B2 JP 3884805B2
Authority
JP
Japan
Prior art keywords
pair
devices
output
charge
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP34049796A
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English (en)
Japanese (ja)
Other versions
JPH09191578A (ja
Inventor
ジョン ウィルコックス デイヴィッド
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microchip Technology Caldicot Ltd
Original Assignee
Zarlink Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zarlink Semiconductor Ltd filed Critical Zarlink Semiconductor Ltd
Publication of JPH09191578A publication Critical patent/JPH09191578A/ja
Application granted granted Critical
Publication of JP3884805B2 publication Critical patent/JP3884805B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507Interface arrangements
    • H03K19/018521Interface arrangements of complementary type, e.g. CMOS
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Supply And Distribution Of Alternating Current (AREA)
  • Direct Current Feeding And Distribution (AREA)
JP34049796A 1995-12-06 1996-12-05 集積回路用出力バッファ Expired - Lifetime JP3884805B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9524957.9 1995-12-06
GB9524957A GB2308027B (en) 1995-12-06 1995-12-06 Integrated circuit output buffer

Publications (2)

Publication Number Publication Date
JPH09191578A JPH09191578A (ja) 1997-07-22
JP3884805B2 true JP3884805B2 (ja) 2007-02-21

Family

ID=10785009

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34049796A Expired - Lifetime JP3884805B2 (ja) 1995-12-06 1996-12-05 集積回路用出力バッファ

Country Status (4)

Country Link
US (1) US5982207A (fr)
EP (1) EP0778672A3 (fr)
JP (1) JP3884805B2 (fr)
GB (1) GB2308027B (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6154075A (en) * 1999-05-18 2000-11-28 Level One Communications, Inc. Error correcting programmable pulse generator
KR100412134B1 (ko) * 2001-06-27 2003-12-31 주식회사 하이닉스반도체 넓은 범위의 전원전압에서 동작하는 데이터 출력 버퍼 및이를 이용하는 반도체 메모리 장치
US6605982B2 (en) * 2001-06-29 2003-08-12 Stmicroelectronics Inc. Bias circuit for a transistor of a storage cell
JP3666423B2 (ja) * 2001-07-06 2005-06-29 日本電気株式会社 駆動回路
US20100102873A1 (en) * 2008-10-23 2010-04-29 Chen-Yu Huang Output Driving Circuit for an Ethernet Transceiver

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4573177A (en) * 1984-02-06 1986-02-25 The United States Of America As Represented By The Secretary Of The Air Force Bi-directional current differencer for complementary charge coupled device (CCD) outputs
JPS6350209A (ja) * 1986-08-20 1988-03-03 Matsushita Electric Ind Co Ltd レベルシフト回路
US4791326A (en) * 1987-01-22 1988-12-13 Intel Corporation Current controlled solid state switch
US5105102A (en) * 1990-02-28 1992-04-14 Nec Corporation Output buffer circuit
JPH04127703A (ja) * 1990-09-19 1992-04-28 Sony Corp 演算増幅回路
US5089723A (en) * 1990-11-15 1992-02-18 National Semiconductor Corporation CMOS-based pseudo ECL output buffer
EP0509113B1 (fr) * 1991-04-16 1998-10-07 Siemens Aktiengesellschaft Amplificateur de sortie tampon à signal d'amplitude élevée
US5351012A (en) * 1993-04-02 1994-09-27 Elantec, Inc. Low input resistance current-mode feedback operational amplifier input stage
US5517148A (en) * 1994-10-31 1996-05-14 Sgs-Thomson Microelectronics, Inc. Low current differential level shifter
JP3033673B2 (ja) * 1995-04-21 2000-04-17 日本電気株式会社 電力増幅用の演算増幅回路
US5559476A (en) * 1995-05-31 1996-09-24 Cirrus Logic, Inc. Voltage controlled oscillator including voltage controlled delay circuit with power supply noise isolation

Also Published As

Publication number Publication date
GB2308027B (en) 2000-05-10
EP0778672A2 (fr) 1997-06-11
EP0778672A3 (fr) 1998-10-21
US5982207A (en) 1999-11-09
JPH09191578A (ja) 1997-07-22
GB2308027A (en) 1997-06-11
GB9524957D0 (en) 1996-02-07

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