JP3949193B2 - 絶縁ゲイト型半導体装置 - Google Patents

絶縁ゲイト型半導体装置 Download PDF

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Publication number
JP3949193B2
JP3949193B2 JP23255296A JP23255296A JP3949193B2 JP 3949193 B2 JP3949193 B2 JP 3949193B2 JP 23255296 A JP23255296 A JP 23255296A JP 23255296 A JP23255296 A JP 23255296A JP 3949193 B2 JP3949193 B2 JP 3949193B2
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Japan
Prior art keywords
region
channel
impurity
semiconductor device
insulated gate
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Expired - Fee Related
Application number
JP23255296A
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English (en)
Japanese (ja)
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JPH1065163A (ja
JPH1065163A5 (2
Inventor
舜平 山崎
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP23255296A priority Critical patent/JP3949193B2/ja
Priority to US08/907,579 priority patent/US6218714B1/en
Priority to KR1019970039449A priority patent/KR100443436B1/ko
Publication of JPH1065163A publication Critical patent/JPH1065163A/ja
Priority to US09/811,238 priority patent/US6617647B2/en
Priority to KR1020020047936A priority patent/KR100453400B1/ko
Publication of JPH1065163A5 publication Critical patent/JPH1065163A5/ja
Application granted granted Critical
Publication of JP3949193B2 publication Critical patent/JP3949193B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/141—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer comprising oxides only
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
    • H10D62/815—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW]
    • H10D62/8181—Structures having no potential periodicity in the vertical direction, e.g. lateral superlattices or lateral surface superlattices [LSS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
JP23255296A 1996-08-13 1996-08-13 絶縁ゲイト型半導体装置 Expired - Fee Related JP3949193B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP23255296A JP3949193B2 (ja) 1996-08-13 1996-08-13 絶縁ゲイト型半導体装置
US08/907,579 US6218714B1 (en) 1996-08-13 1997-08-08 Insulated gate semiconductor device and method of manufacturing the same
KR1019970039449A KR100443436B1 (ko) 1996-08-13 1997-08-13 절연게이트형반도체장치
US09/811,238 US6617647B2 (en) 1996-08-13 2001-03-16 Insulated gate semiconductor device and method of manufacturing the same
KR1020020047936A KR100453400B1 (ko) 1996-08-13 2002-08-13 반도체 장치 제작 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23255296A JP3949193B2 (ja) 1996-08-13 1996-08-13 絶縁ゲイト型半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2006344148A Division JP4896699B2 (ja) 2006-12-21 2006-12-21 絶縁ゲイト型半導体装置およびその作製方法

Publications (3)

Publication Number Publication Date
JPH1065163A JPH1065163A (ja) 1998-03-06
JPH1065163A5 JPH1065163A5 (2) 2004-10-21
JP3949193B2 true JP3949193B2 (ja) 2007-07-25

Family

ID=16941122

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23255296A Expired - Fee Related JP3949193B2 (ja) 1996-08-13 1996-08-13 絶縁ゲイト型半導体装置

Country Status (3)

Country Link
US (2) US6218714B1 (2)
JP (1) JP3949193B2 (2)
KR (2) KR100443436B1 (2)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4103968B2 (ja) * 1996-09-18 2008-06-18 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置
US6590230B1 (en) 1996-10-15 2003-07-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US6118148A (en) 1996-11-04 2000-09-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP4017706B2 (ja) 1997-07-14 2007-12-05 株式会社半導体エネルギー研究所 半導体装置
US6686623B2 (en) 1997-11-18 2004-02-03 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and electronic apparatus
JP4236722B2 (ja) * 1998-02-05 2009-03-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7015546B2 (en) * 2000-02-23 2006-03-21 Semiconductor Research Corporation Deterministically doped field-effect devices and methods of making same
US6724037B2 (en) 2000-07-21 2004-04-20 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and semiconductor device
JP4275336B2 (ja) 2001-11-16 2009-06-10 株式会社半導体エネルギー研究所 半導体装置の作製方法
KR100493018B1 (ko) * 2002-06-12 2005-06-07 삼성전자주식회사 반도체 장치의 제조방법
US7052966B2 (en) * 2003-04-09 2006-05-30 Newport Fab, Llc Deep N wells in triple well structures and method for fabricating same
US7829394B2 (en) * 2005-05-26 2010-11-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method of the same
US8304783B2 (en) * 2009-06-03 2012-11-06 Cree, Inc. Schottky diodes including polysilicon having low barrier heights and methods of fabricating the same
WO2012006890A1 (zh) * 2010-07-15 2012-01-19 电子科技大学 一种利用应力集中效应增强沟道应力的mos晶体管
US8916867B2 (en) 2011-01-20 2014-12-23 Semiconductor Energy Laboratory Co., Ltd. Oxide semiconductor element and semiconductor device
TWI491050B (zh) * 2011-11-25 2015-07-01 Sony Corp 電晶體，顯示器及電子裝置
FR3011678B1 (fr) * 2013-10-07 2017-01-27 St Microelectronics Crolles 2 Sas Procede de relaxation des contraites mecaniques transversales dans la region active d'un transistor mos, et circuit integre correspondant
JP2016029719A (ja) * 2014-07-17 2016-03-03 出光興産株式会社 薄膜トランジスタ
CN111788663A (zh) * 2018-03-09 2020-10-16 堺显示器制品株式会社 薄膜晶体管及其制造方法
US20200194555A1 (en) * 2018-12-18 2020-06-18 United Microelectronics Corp. Semiconductor device with reduced floating body effects and fabrication method thereof

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JPS55151363A (en) * 1979-05-14 1980-11-25 Chiyou Lsi Gijutsu Kenkyu Kumiai Mos semiconductor device and fabricating method of the same
US5350940A (en) * 1984-02-02 1994-09-27 Fastran, Inc. Enhanced mobility metal oxide semiconductor devices
US4697198A (en) * 1984-08-22 1987-09-29 Hitachi, Ltd. MOSFET which reduces the short-channel effect
IT1213234B (it) * 1984-10-25 1989-12-14 Sgs Thomson Microelectronics Procedimento perfezionato per la fabbricazione di dispositivi a semiconduttore dmos.
JPS61256769A (ja) * 1985-05-10 1986-11-14 Toshiba Corp 半導体装置
EP0287658A1 (en) 1986-10-27 1988-10-26 Hughes Aircraft Company Striped-channel transistor and method of forming the same
JPH0231464A (ja) * 1988-07-21 1990-02-01 Mitsubishi Electric Corp 半導体装置
JPH02105467A (ja) * 1988-10-13 1990-04-18 Nec Corp Ｍｏｓ型半導体装置
JPH02159070A (ja) * 1988-12-13 1990-06-19 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法
JPH02196468A (ja) * 1989-01-25 1990-08-03 Nec Corp 半導体装置
JPH0738447B2 (ja) * 1989-02-02 1995-04-26 松下電器産業株式会社 Ｍｏｓ型半導体装置
JPH036863A (ja) * 1989-06-05 1991-01-14 Takehide Shirato 半導体装置
US5210437A (en) * 1990-04-20 1993-05-11 Kabushiki Kaisha Toshiba MOS device having a well layer for controlling threshold voltage
JPH05283687A (ja) * 1992-03-31 1993-10-29 Oki Electric Ind Co Ltd 半導体素子の製造方法

Also Published As

Publication number Publication date
US6617647B2 (en) 2003-09-09
US6218714B1 (en) 2001-04-17
JPH1065163A (ja) 1998-03-06
KR100443436B1 (ko) 2004-10-20
KR100453400B1 (ko) 2004-10-20
US20010023105A1 (en) 2001-09-20
KR19980018784A (ko) 1998-06-05

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