JPH01107143U - - Google Patents

Info

Publication number
JPH01107143U
JPH01107143U JP1988000551U JP55188U JPH01107143U JP H01107143 U JPH01107143 U JP H01107143U JP 1988000551 U JP1988000551 U JP 1988000551U JP 55188 U JP55188 U JP 55188U JP H01107143 U JPH01107143 U JP H01107143U
Authority
JP
Japan
Prior art keywords
resin
semiconductor chip
sealing
island
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988000551U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988000551U priority Critical patent/JPH01107143U/ja
Publication of JPH01107143U publication Critical patent/JPH01107143U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第１図は本考案の一実施例の下方からの斜視図
、第２図は従来半導体装置の一例の断面図、第３
図は従来半導体装置の他の例の断面図、第４図は
第３図の装置の故障の一例を示す断面図、第５図
は第４図の部分拡大図、第６図は第１図の実施例
のＡ―Ａ断面図、第７図は本考案の他の実施例の
底面図、第８図及び第９図は本考案の更に他の実
施例を示すＢ―Ｂ断面図である。 ２１…アイランド部、２２…半導体チツプ、２
３…封止樹脂、２３ａ…封止樹脂下部、２４…開
口部、２５，２７…突出部、２６…アイランド底
面、２８…チツプ保護層、２９…ゴム状樹脂。

Claims (1)

  1. 【実用新案登録請求の範囲】 リードフレームのアイランド部の一面上に半導
    体チツプを設け、その半導体チツプ表面の電極を
    リードフレームの外部導出リードに配線し、その
    配線部と半導体チツプ部をモールド成形の封止樹
    脂で封止するようにして形成された封止部を有す
    る樹脂封止半導体装置において、 前記アイランド部の他面に該アイランド部が突
    出部を除いて露出させる開口部を形成したことを
    特徴とする樹脂封止半導体装置。
JP1988000551U 1988-01-08 1988-01-08 Pending JPH01107143U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988000551U JPH01107143U (ja) 1988-01-08 1988-01-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988000551U JPH01107143U (ja) 1988-01-08 1988-01-08

Publications (1)

Publication Number Publication Date
JPH01107143U true JPH01107143U (ja) 1989-07-19

Family

ID=31199682

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988000551U Pending JPH01107143U (ja) 1988-01-08 1988-01-08

Country Status (1)

Country Link
JP (1) JPH01107143U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2021186657A1 (ja) * 2020-03-19 2021-09-23

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2021186657A1 (ja) * 2020-03-19 2021-09-23
WO2021186657A1 (ja) * 2020-03-19 2021-09-23 三菱電機株式会社 半導体装置および半導体装置の製造方法
US12334408B2 (en) 2020-03-19 2025-06-17 Mitsubishi Electric Corporation Semiconductor device and method for manufacturing semiconductor device

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