JPH01138683A - Semiconductor memory device - Google Patents

Abstract

PURPOSE:To eliminate an influence due to noise of the ground level by providing an input buffer whose threshold potential is higher than an external signal and an input buffer whose threshold potential is lower than it and switching them by the timing of an internal circuit. CONSTITUTION:In the period till termination of sensing when the noise of the ground level is large, a signal 15 which is generated after termination of sensing is in the low level as it is, and at this time, an input buffer 12 whose threshold potential is set to a low value is activated to fetch an external input signal 13. After termination of sensing, an input buffer 11 whose threshold potential is set to a high value is activated because the noise of the ground level is reduced, and the input buffer 11 fetches the external input signal 13. By this constitution, input buffers are obtained which have the same threshold potential as the absence of noise even in case of the rise of the ground level due to noise.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor memory device, and particularly to a semiconductor memory device having an input buffer such as a dynamic memory where ground level noise becomes large during sensing.

[Conventional technology]

FIG. 5 is a diagram showing a conventional input buffer, in which 1 is an n-type transistor, 2 is an n-type transistor,
13 is an external input signal, and 14 is a signal transmitted to the internal circuit.

Next, the operation will be explained.

When the external signal 13 is LOW, the signal 14 is HIGH g--h
Therefore, when the external signal 13 is High, the signal 14 is Low.
It becomes w. At this time, the input buffer used for dynamic memory etc. is designed to be able to handle TTL input signals.
At the TTL level, the threshold voltage is 2.4■ or higher for High and 0.4cm for Low. Since it is specified to be 8V or less, it is set to 1.6■. Therefore, the input signal 13 is 2
．． The configuration is such that when the input signal 13 is 0.8 V or less, the signal 14 becomes Low level, and vice versa, when the input signal 13 is 0.8 V or less, the signal 14 becomes High level.

[Problem that the invention seeks to solve]

Since the large substrate in a conventional semiconductor memory device is configured as described above, when the ground level of the input substrate rises due to noise as shown in FIG. 6, the threshold potential becomes high and the high input signal is There was a problem that it became difficult to take in.

This invention was made to solve the above-mentioned problems, and provides a semiconductor memory device that provides an input buffer that has the same threshold potential as in the absence of noise even when the ground level rises due to noise. The purpose is to provide

[Means for solving problems]

A semiconductor memory device according to the present invention includes two input buffers having two types of threshold potentials for one external input signal, and one of the input buffers is set depending on the magnitude of ground level noise. It is designed so that it can be selected.

[Effect]

The semiconductor memory device according to the present invention includes two input buffers having two types of threshold potentials, and is configured such that one of the input buffers is selected depending on the magnitude of ground level noise. The input buffer threshold potential for signals is not affected by ground level noise.

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be explained below with reference to the drawings.

In FIG. 1, 1. 3. 6. 7. 9 is an n-type transistor, 2, 4, 5, 8.10 is an n-type transistor, 11.12 is an input buffer, 13 is an external input signal, 1
4 is a signal transmitted to the internal circuit, and 15 is a signal generated after sensing is completed.

The input buffer 1 is set to have a high threshold potential as shown in FIG. 2, and the input buffer 12 is set to have a low threshold potential as shown in FIG.

Next, the operation will be explained.

In dynamic memory, the address buffer is often laid out on the side opposite to the ground pad side due to the bin arrangement of the package, and the noise of the ground wiring is also larger than on the ground pad side.

Particularly in a large-capacity dynamic memory, the peak current during sensing also increases, and the rise in the ground level on the address buffer side also increases. Therefore, during the period until the end of sensing when the ground noise is large, the signal 15
remains at a low level, and at this time, the input buffer 12 whose threshold potential is set low is activated, and the external signal 13 is activated.
Incorporate. After the sensing is completed, ground level noise becomes smaller, so the input buffer 11 whose threshold potential is set high is activated and takes in the external signal 13.

Since the present embodiment is configured as described above, even if the ground level rises due to noise, an input buffer having the same threshold potential as in the case without noise can be obtained.

〔Effect of the invention〕

As described above, according to the semiconductor memory device according to the present invention,
The input buffer that takes in external signals is configured to select one of two input buffers with different threshold potentials depending on the level of ground-level noise. This has the effect that the threshold potential is not affected by ground level noise.

[Brief explanation of the drawing]

1 is a block diagram of an input buffer of a semiconductor memory device according to an embodiment of the present invention, FIG. 2 is a diagram showing the threshold potential of the input buffer 11 in FIG. 1, and FIG. 3 is a diagram showing the input buffer 11 in FIG. FIG. 4 is a diagram showing the relationship between the signal 15 and extRAS, FIG. 5 is a diagram showing the configuration of a large-power buffer of a conventional semiconductor memory device, and FIG. 6 is a diagram showing a conventional semiconductor memory device. FIG. 3 is a diagram showing the ground noise level of the device. In the figure, 1. 3. 6. 7. 9 is an n-type transistor, 2, 4, 5, 8.10 is an n-type transistor, 1
1.12 is an input buffer, 13 is an external input signal, 14.
15 is a signal. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] (1) An input buffer with a high threshold potential relative to the external signal and an input buffer with a low threshold potential relative to the external signal are provided, and the two input buffers are switched according to the timing of the internal circuit. Characteristic semiconductor memory device.