JPH01140848U - - Google Patents

Info

Publication number
JPH01140848U
JPH01140848U JP1988037460U JP3746088U JPH01140848U JP H01140848 U JPH01140848 U JP H01140848U JP 1988037460 U JP1988037460 U JP 1988037460U JP 3746088 U JP3746088 U JP 3746088U JP H01140848 U JPH01140848 U JP H01140848U
Authority
JP
Japan
Prior art keywords
integrated circuit
lead pin
molded resin
conductive film
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988037460U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988037460U priority Critical patent/JPH01140848U/ja
Publication of JPH01140848U publication Critical patent/JPH01140848U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【図面の簡単な説明】
第１図は、この考案の一実施例を示すＩＣの外
観斜視図、第２図は、同ＩＣの断面図、第３図は
、同ＩＣの内部構成を示す平面図、第４図は、実
施例ＩＣを用いて、マザーボード用に配置する場
合の一例を示す図、第５図は、従来のＩＣを用い
てマザーボード上に回路構成の配置例を示す図で
ある。 ３ａ，３ｂ，…，３ｒ：リードピン、６：モー
ルド被覆部、７：導電性被膜、８：パスコン用の
チツプコンデンサ。

Claims (1)

  1. 【実用新案登録請求の範囲】 複数のリードピンを有し、内部で集積回路チツ
    プの各パツドが、前記リードピンに接続され、前
    記集積回路チツプ及び前記各リードピンの各パツ
    ドとの接続部が、モールド樹脂で被覆されてなる
    集積回路装置において、 前記モールド樹脂部の上面を導電膜で被覆して
    、この被導電膜をアース用のリードピンに接続す
    る一方、前記モールド樹脂内に、所定のリードピ
    ンとアース間に接続したコンデンサを内蔵したこ
    とを特徴とする集積回路装置。
JP1988037460U 1988-03-22 1988-03-22 Pending JPH01140848U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988037460U JPH01140848U (ja) 1988-03-22 1988-03-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988037460U JPH01140848U (ja) 1988-03-22 1988-03-22

Publications (1)

Publication Number Publication Date
JPH01140848U true JPH01140848U (ja) 1989-09-27

Family

ID=31264039

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988037460U Pending JPH01140848U (ja) 1988-03-22 1988-03-22

Country Status (1)

Country Link
JP (1) JPH01140848U (ja)

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