JPS6316455U - - Google Patents

Info

Publication number
JPS6316455U
JPS6316455U JP1986110466U JP11046686U JPS6316455U JP S6316455 U JPS6316455 U JP S6316455U JP 1986110466 U JP1986110466 U JP 1986110466U JP 11046686 U JP11046686 U JP 11046686U JP S6316455 U JPS6316455 U JP S6316455U
Authority
JP
Japan
Prior art keywords
wiring board
cutout
insulating film
lead frame
island
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986110466U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986110466U priority Critical patent/JPS6316455U/ja
Publication of JPS6316455U publication Critical patent/JPS6316455U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第1図は本考案の一実施例の断面図、第2図は
従来の混成集積回路装置の断面図である。 1……リードフレームのアイランド、2……絶
縁膜、3……リード端子、4,5……配線基板、
6……ICペレツト、7……金属細線、8……外
装樹脂。

Claims (1)

    【実用新案登録請求の範囲】
  1. 絶縁膜で被われたリードフレームのアイランド
    上面に切抜き加工された配線基板が接合され、こ
    の配線基板の切抜き部に能動および受動回路素子
    が搭載されていることを特徴とする混成集積回路
    装置。
JP1986110466U 1986-07-17 1986-07-17 Pending JPS6316455U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986110466U JPS6316455U (ja) 1986-07-17 1986-07-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986110466U JPS6316455U (ja) 1986-07-17 1986-07-17

Publications (1)

Publication Number Publication Date
JPS6316455U true JPS6316455U (ja) 1988-02-03

Family

ID=30989491

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986110466U Pending JPS6316455U (ja) 1986-07-17 1986-07-17

Country Status (1)

Country Link
JP (1) JPS6316455U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02196450A (ja) * 1989-01-25 1990-08-03 Nec Corp 樹脂封止型半導体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61136249A (ja) * 1984-12-06 1986-06-24 Nec Kansai Ltd ハイブリツドic

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61136249A (ja) * 1984-12-06 1986-06-24 Nec Kansai Ltd ハイブリツドic

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02196450A (ja) * 1989-01-25 1990-08-03 Nec Corp 樹脂封止型半導体装置

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