JPH0140438B2 - - Google Patents
Info
- Publication number
- JPH0140438B2 JPH0140438B2 JP58119211A JP11921183A JPH0140438B2 JP H0140438 B2 JPH0140438 B2 JP H0140438B2 JP 58119211 A JP58119211 A JP 58119211A JP 11921183 A JP11921183 A JP 11921183A JP H0140438 B2 JPH0140438 B2 JP H0140438B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- bit line
- transistor
- switch transistor
- memory cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
Landscapes
- Non-Volatile Memory (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58119211A JPS6010497A (ja) | 1983-06-29 | 1983-06-29 | 不揮発性半導体メモリ装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58119211A JPS6010497A (ja) | 1983-06-29 | 1983-06-29 | 不揮発性半導体メモリ装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6010497A JPS6010497A (ja) | 1985-01-19 |
| JPH0140438B2 true JPH0140438B2 (da) | 1989-08-29 |
Family
ID=14755684
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58119211A Granted JPS6010497A (ja) | 1983-06-29 | 1983-06-29 | 不揮発性半導体メモリ装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6010497A (da) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2604555B1 (fr) * | 1986-09-30 | 1988-11-10 | Eurotechnique Sa | Circuit integre du type circuit logique comportant une memoire non volatile programmable electriquement |
| US5519654A (en) * | 1990-09-17 | 1996-05-21 | Kabushiki Kaisha Toshiba | Semiconductor memory device with external capacitor to charge pump in an EEPROM circuit |
| EP0549795B1 (en) * | 1990-09-17 | 1999-04-14 | Kabushiki Kaisha Toshiba | Semiconductor storing device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5693A (en) * | 1979-06-15 | 1981-01-06 | Nec Corp | Write-in circuit for non-volatile semiconductor memory |
-
1983
- 1983-06-29 JP JP58119211A patent/JPS6010497A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6010497A (ja) | 1985-01-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0467928B1 (en) | Improved novram cell using two differential, decouplable nonvolatile memory elements | |
| US5095461A (en) | Erase circuitry for a non-volatile semiconductor memory device | |
| US6178116B1 (en) | Memory cell of non-volatile semiconductor memory device | |
| JP3892612B2 (ja) | 半導体装置 | |
| US8017994B2 (en) | Nonvolatile semiconductor memory | |
| US4207615A (en) | Non-volatile ram cell | |
| KR100219331B1 (ko) | 비휘발성 반도체 메모리 디바이스 및 이의 소거 및 생산방법 | |
| JPH0732241B2 (ja) | 不揮発性半導体メモリ・ユニット | |
| US6288941B1 (en) | Electrically erasable semiconductor non-volatile memory device having memory cell array divided into memory blocks | |
| JPS62117196A (ja) | 電気的に消去可能なプログラム可能なメモリ・セルとその製法 | |
| TWI777588B (zh) | 反熔絲裝置及反熔絲單元的編程方法 | |
| JPS5833638B2 (ja) | メモリ装置 | |
| JP3914340B2 (ja) | フラッシュメモリ装置 | |
| US5572464A (en) | Semiconductor memory device and method of using the same | |
| EP1012846B1 (en) | Channel fn program/erase recovery scheme | |
| US7164606B1 (en) | Reverse fowler-nordheim tunneling programming for non-volatile memory cell | |
| JP3806402B2 (ja) | マルチレベルフラッシュメモリセルセンス回路 | |
| JPH04105368A (ja) | 不揮発性半導体記憶装置及びその書き込み・消去方法 | |
| JPS6228518B2 (da) | ||
| US4897815A (en) | High-speed write type nonvolatile semiconductor memory | |
| JP2002043448A (ja) | 集積回路とメモリセルのトラップチャージ層のチャージ方法 | |
| JPH0140438B2 (da) | ||
| JPH0512889A (ja) | 不揮発性半導体記憶装置 | |
| US8174884B2 (en) | Low power, single poly EEPROM cell with voltage divider | |
| JPS5929448A (ja) | プログラマブル・リ−ド・オンリ−・メモリ− |