JPH02161718A - エピタキシャル層を形成する方法 - Google Patents

エピタキシャル層を形成する方法

Info

Publication number
JPH02161718A
JPH02161718A JP1191228A JP19122889A JPH02161718A JP H02161718 A JPH02161718 A JP H02161718A JP 1191228 A JP1191228 A JP 1191228A JP 19122889 A JP19122889 A JP 19122889A JP H02161718 A JPH02161718 A JP H02161718A
Authority
JP
Japan
Prior art keywords
gaas
layer
lattice
growth
superlattice
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1191228A
Other languages
English (en)
Japanese (ja)
Inventor
Hisashi Shichijo
七条　恒
Richard J Matyi
リチャード　ジェイ．マットイ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of JPH02161718A publication Critical patent/JPH02161718A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3214—Materials thereof being Group IIIA-VA semiconductors
    • H10P14/3221—Arsenides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
    • H10P14/3251—Layer structure consisting of three or more layers
    • H10P14/3252—Alternating layers, e.g. superlattice
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3421—Arsenides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/36—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done before the formation of the materials

Landscapes

  • Recrystallisation Techniques (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
JP1191228A 1988-07-25 1989-07-24 エピタキシャル層を形成する方法 Pending JPH02161718A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US22442888A 1988-07-25 1988-07-25
US224428 1988-07-25

Publications (1)

Publication Number Publication Date
JPH02161718A true JPH02161718A (ja) 1990-06-21

Family

ID=22840636

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1191228A Pending JPH02161718A (ja) 1988-07-25 1989-07-24 エピタキシャル層を形成する方法

Country Status (2)

Country Link
EP (1) EP0352472A3 (de)
JP (1) JPH02161718A (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009177168A (ja) * 2007-12-28 2009-08-06 Sumitomo Chemical Co Ltd 半導体基板、半導体基板の製造方法および電子デバイス

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5256594A (en) * 1989-06-16 1993-10-26 Intel Corporation Masking technique for depositing gallium arsenide on silicon
JP3286920B2 (ja) * 1992-07-10 2002-05-27 富士通株式会社 半導体装置の製造方法
US6201262B1 (en) 1997-10-07 2001-03-13 Cree, Inc. Group III nitride photonic devices on silicon carbide substrates with conductive buffer interlay structure
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
WO2007112066A2 (en) 2006-03-24 2007-10-04 Amberwave Systems Corporation Lattice-mismatched semiconductor structures and related methods for device fabrication
EP2062290B1 (de) 2006-09-07 2019-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Defektreduzierung durch kontrolle des aspektverhältnisses
US7875958B2 (en) 2006-09-27 2011-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
WO2008051503A2 (en) 2006-10-19 2008-05-02 Amberwave Systems Corporation Light-emitter-based devices with lattice-mismatched semiconductor structures
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
US8304805B2 (en) 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
WO2008124154A2 (en) 2007-04-09 2008-10-16 Amberwave Systems Corporation Photovoltaics on silicon
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
JP2010538495A (ja) 2007-09-07 2010-12-09 アンバーウェーブ・システムズ・コーポレーション 多接合太陽電池
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
EP2335273A4 (de) 2008-09-19 2012-01-25 Taiwan Semiconductor Mfg Formierung von geräten durch übermässiges wachstum der epitaxialschicht
US20100072515A1 (en) 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
US8629446B2 (en) 2009-04-02 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Devices formed from a non-polar plane of a crystalline material and method of making the same

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2132017B (en) * 1982-12-16 1986-12-03 Secr Defence Semiconductor device array

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009177168A (ja) * 2007-12-28 2009-08-06 Sumitomo Chemical Co Ltd 半導体基板、半導体基板の製造方法および電子デバイス
US8772830B2 (en) 2007-12-28 2014-07-08 Sumitomo Chemical Company, Limited Semiconductor wafer including lattice matched or pseudo-lattice matched buffer and GE layers, and electronic device

Also Published As

Publication number Publication date
EP0352472A3 (de) 1991-02-06
EP0352472A2 (de) 1990-01-31

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