JPH02266567A - Switching element - Google Patents

Abstract

PURPOSE:To form a cascode BI-MOS element in one chip and reduce cost by providing a semiconductor layer on a bipolar transistor through an insulating layer, forming a MOSFET on the semiconductor layer, and then connecting a drain region of the MOSFET to an emitter of the bipolar transistor. CONSTITUTION:A semiconductor layer is provided on a bipolar transistor through an insulating layer 15, a drain region 16, a channel region 17, and a source region 18 are formed on the semiconductor layer, and then a gate electrode 25 is formed on the channel region 17 through a gate insulating film 19. Also, the drain region 16 is connected to an emitter region 14 of the bipolar transistor at the opening of the insulating layer 15. Thus, it becomes possible to produce the bipolar transistor and power MOSFET in one chip and to reduce cost drastically.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a self-extinguishing switching element used in switching power supplies and the like.

[Conventional technology]

Conventionally, bipolar transistors and power MO5FETs are known as self-extinguishing switching elements used in switching power supplies and the like.

However, although bipolar transistors can provide a large current density, they have the disadvantage that their switching speed is slow and cannot be used at high frequencies. On the other hand, power MO5FETs can be used at high frequencies because of their fast switching speeds, but they have the drawbacks of low current density, especially in high-voltage devices, and large chip sizes and high costs for devices with the same capacity. ing.

For this reason, in recent years bipolar transistors and MOSFE
A method has been devised to obtain high breakdown voltage, high speed, and large current density by combining T.

FIG. 2 shows an example of such a switching element, which is called a cascode bimos.

In Figure 2, bipolar transistor l and power MO
3FET2 is connected in series, base 4 and source 7
A plurality of diodes are connected in series between them. In the blocking state, a potential below the threshold is applied to the gate 6 of the power MO3FET2, and the power MO3FET2
is in the OFF state. Therefore, the emitter of the bipolar transistor 1 is in an open state, and therefore the bipolar transistor 1 is equivalent to a diode having only a collector-base junction. Diode 3 connected to the base of bipolar transistor 1 is collector 5
When a positive potential is applied to the bipolar transistor 1 and a negative potential is applied to the source 7, the bipolar transistor 1 is forward biased. is applied to a reverse biased diode by a junction between. Therefore, the breakdown voltage of this composite element is as high as that of bipolar transistor 1.
, which is higher than the withstand voltage V cio· when a bipolar transistor is used alone. In addition, since no high voltage is applied to the power MO3FET2, it is a low-voltage MOS FET that can obtain a large current density.
ET can be used. In order to turn on this switching element, a voltage equal to or higher than the threshold voltage may be applied to the gate 6 of the power MOSFET 2 to turn the power MOSFET 2 on.

When the power MO3FET 2 is turned on, the base-emitter of the bipolar transistor 1 is forward biased by the base power supply 8, and the base current flows, turning the bipolar transistor 1 on. In this state, the bipolar transistor, whose ON voltage is extremely low due to conductivity modulation, and the power MO3FET2, which has a low withstand voltage and low ON voltage, are connected in series, so the ON voltage of this device as a whole is low, which means that a large current density can be obtained. It will be done. Next, when this element is to be turned off again, the potential of the gate 6 of the power MO3FET 2 may be set below the threshold value again. This allows power MO3FET2
is in the OFF state. For this reason, Collector 5 → Emitsuta →
The current path that used to flow from the drain to the source 7 disappears, and the current flows from the collector 5 to the base 4 to the diode 3 to the source 7. This current forcibly pulls out the excess carriers in the bipolar transistor 1 that have caused conductivity modulation, and the junction between the collector and base of the bipolar transistor 1 reversely recovers, turning it off completely.
state. Therefore, this device can switch much faster than when a bipolar transistor is used alone. Note that the diode 3 is inserted to have a forward voltage higher than the voltage of the base power supply 8 and to allow a current to flow during turn-off without bypassing the base power supply 8. This device, which is a combination of the bipolar transistor 1 and the power MO3FET 2, has the great features of high breakdown voltage, high current density, and high-speed switching operation.

[Problem to be solved by the invention]

However, the above device is a bipolar transistor 1
Since the power MO3FET 2 and the power MO3FET 2 are manufactured as separate chips and combined, the cost is extremely high.

The present invention has been made in view of the above points, and has the great advantages of high withstand voltage, high current density, and high-speed switching operation, but it is possible to reduce the cost by integrating the high-cost cascode bimos element into a single chip. The problem to be solved is to aim for

[Means to solve the problem]

According to the present invention, a semiconductor layer is provided on a bipolar transistor via an insulating layer, a drain region, a channel region, and a source region are formed in the semiconductor layer, and a gate electrode is formed on the channel region via a gate insulating film. and the drain region is connected to the emitter region of the bipolar transistor through an opening in the insulating layer.

[Effect]

In the switching element of the present invention, a semiconductor layer is provided on a bipolar transistor via an insulating layer, a MOSFET is formed on the semiconductor layer, and the drain region of the MOSFET is connected to the emitter of the bipolar transistor. A cascode bimos type element can be formed with one chip.

〔Example〕

The present invention will be described below with reference to embodiments shown in the drawings.

FIG. 1 is a sectional view showing one embodiment of the present invention. In this embodiment, an n-collector layer 12 is formed on the collector layer 11, and a p- An oxide film 15 is formed on a semiconductor substrate in which a base region 13 is formed and an n emitter region Fa 14 is formed within the p base region 13.
A drain region 16, a channel region 17 and a source region 18 are formed thereon. These drain regions 16,
The channel region 17 and the source region 18 can be formed by forming a poly-5i film on the oxide film 15, converting this poly-5i film into a single crystal by laser annealing, and then diffusing predetermined impurities. In addition, a drain region 16, a channel region 17, and a source region 18
There is a gate oxide film 19 on top of the gate oxide film 19.
A 3i film 20 is formed, which constitutes a MOSFET.

Here, the drain region 16 is connected to the emitter region 14 through the opening of the oxide film 15, and the base region 13, source region 18, and gate poiy-3i film 20 are insulated by a PSG (phosphorous glass) layer 21. has been done.

In addition, a base electrode 23, a source electrode 24, a gate electrode 2
5 passes through the openings formed in the PSG film 21 to the base region 13, source region 18 and gate poly-
It is connected to the Si film 20.

In this example, since the drain region 16, channel region 17, and source region 18 are formed using a Si film obtained by monocrystalizing the pOIy-3i film, the carrier mobility can be increased, and therefore the carrier mobility can be increased. MOSFE with ON resistance
Although it has the advantage of being able to form a T, the drain region 16
, the channel region 17 and the source region 1B are made of poiy-Si.
It goes without saying that a similar element can be manufactured even if it is not made into a single crystal.

Furthermore, although this embodiment has been described using an element that combines an NPN transistor and an N-channel MO5, the present invention can also be applied to an element whose conductivity type is reversed.

〔Effect of the invention〕

According to the present invention, a bipolar transistor and a power MO
Since 3FETs can be made on one chip, costs can be significantly reduced.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional switching element. l bipolar transistor, 2 power MO5FET
, 3 diode, 4 base, 5 collector, 6
gate, 7 source, 8 base power supply, +i n'' collector layer, 12 n-collector layer, 13 p base region,
14-n+ emitter region, 15 oxide film, 16 drain region, 17 channel region, 18 source region,
19 gate oxide film, 20 gate poly-3i
Membrane, 21- PSG layer, 22 Collector electrode, 2
3 base electrode, 24 source electrode, 25 gate electrode Figure 1

Claims (1)

[Claims] 1) A semiconductor layer is provided on the bipolar transistor via an insulating layer, and the semiconductor layer has a drain region, a channel region,
A switching device characterized in that a source region is formed, a gate electrode is formed on the channel region via a gate insulating film, and the drain region is connected to the emitter region of the bipolar transistor at an opening in the insulating layer. element.