JPH0227746U - - Google Patents

Info

Publication number
JPH0227746U
JPH0227746U JP10618488U JP10618488U JPH0227746U JP H0227746 U JPH0227746 U JP H0227746U JP 10618488 U JP10618488 U JP 10618488U JP 10618488 U JP10618488 U JP 10618488U JP H0227746 U JPH0227746 U JP H0227746U
Authority
JP
Japan
Prior art keywords
tape carrier
metal substrate
semiconductor chip
lead
polyimide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10618488U
Other languages
Japanese (ja)
Other versions
JPH0749804Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988106184U priority Critical patent/JPH0749804Y2/en
Publication of JPH0227746U publication Critical patent/JPH0227746U/ja
Application granted granted Critical
Publication of JPH0749804Y2 publication Critical patent/JPH0749804Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の実施例の断面図、第２図は本
考案の組立を説明する図、第３図は本考案の他の
実施例の断面図、第４図は従来例の断面図である
。 図において、１は半導体チツプ、２は回路部品
、３は入出力パツド、５はセラミツク基板、１０
は金属基板、１１はバンプ、１３は接着金属、１
５は接着剤、１９は凹部、２０はテープキヤリア
、２１はポリイミドフイルム、２２はパツド、２
３はチツプ用ホール、２５はリードをそれぞれ示
す。 Fig. 1 is a cross-sectional view of an embodiment of the present invention, Fig. 2 is a diagram explaining the assembly of the present invention, Fig. 3 is a cross-sectional view of another embodiment of the present invention, and Fig. 4 is a cross-sectional view of a conventional example. It is. In the figure, 1 is a semiconductor chip, 2 is a circuit component, 3 is an input/output pad, 5 is a ceramic substrate, 10 is a
is a metal substrate, 11 is a bump, 13 is an adhesive metal, 1
5 is an adhesive, 19 is a recess, 20 is a tape carrier, 21 is a polyimide film, 22 is a pad, 2
3 indicates a hole for a chip, and 25 indicates a lead.

Claims (1)

【実用新案登録請求の範囲】 回路部品２が表面実装され、ポリイミドフイル
ム２１の一方の面が、金属基板１０の表面に貼着
されたテープキヤリア２０と、 入出力パツドと該テープキヤリア２０のリード
２５とが接続して、該テープキヤリア２０に実装
され、底面が該金属基板１０の表面に密着マウン
トされた半導体チツプ１とを、具備したことを特
徴とする半導体装置。[Claims for Utility Model Registration] A tape carrier 20 on which a circuit component 2 is surface-mounted and one side of a polyimide film 21 is adhered to the surface of a metal substrate 10, an input/output pad, and a lead of the tape carrier 20. 1. A semiconductor device comprising: a semiconductor chip 1 connected to a semiconductor chip 25, mounted on the tape carrier 20, and having a bottom surface closely mounted on the surface of the metal substrate 10.
JP1988106184U 1988-08-11 1988-08-11 Semiconductor device Expired - Lifetime JPH0749804Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988106184U JPH0749804Y2 (en) 1988-08-11 1988-08-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988106184U JPH0749804Y2 (en) 1988-08-11 1988-08-11 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH0227746U true JPH0227746U (en) 1990-02-22
JPH0749804Y2 JPH0749804Y2 (en) 1995-11-13

Family

ID=31339468

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988106184U Expired - Lifetime JPH0749804Y2 (en) 1988-08-11 1988-08-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0749804Y2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08228071A (en) * 1994-11-10 1996-09-03 Vlt Corp Electrical component package
JP2008171894A (en) * 2007-01-09 2008-07-24 Matsushita Electric Ind Co Ltd Power device device
WO2014065288A1 (en) * 2012-10-22 2014-05-01 株式会社ユーシン Door lock actuator, component mounting structure, and component mounting method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63131561A (en) * 1986-11-18 1988-06-03 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Electronic package

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63131561A (en) * 1986-11-18 1988-06-03 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Electronic package

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08228071A (en) * 1994-11-10 1996-09-03 Vlt Corp Electrical component package
JP2008171894A (en) * 2007-01-09 2008-07-24 Matsushita Electric Ind Co Ltd Power device device
WO2014065288A1 (en) * 2012-10-22 2014-05-01 株式会社ユーシン Door lock actuator, component mounting structure, and component mounting method
JPWO2014065288A1 (en) * 2012-10-22 2016-09-08 株式会社ユーシン Door lock actuator and component mounting structure

Also Published As

Publication number Publication date
JPH0749804Y2 (en) 1995-11-13

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