【発明の詳細な説明】[Detailed description of the invention]
１産業上の利用分野１
本発明は４Ｎ以上の多層プリント配線板に関し、詳しく
は内層の電源層やアース層と表面の電子部品や回路とを
接続する技術に関するものである。1. Field of Industrial Application 1 The present invention relates to a multilayer printed wiring board of 4N or more, and more specifically to a technique for connecting the power supply layer and ground layer on the inner layer to the electronic components and circuits on the surface.
【従米の技術］
従米、多層プリント配線板の一例である４層プリント配
線板は第３図に示すように３屑の絶縁屑１ ａ． １
ｂ． １ ｃの２つの層間に夫々電源ｍ（ＶＣＣ／１）
２とアース層（Ｇ Ｎ Ｄ層）３とを夫々別々に設けて
いる。つまり絶縁Ｍ１ａと絶縁層１ｂとの間に電源層２
を設け、絶緑ｍｌｂと絶縁層ＩＣとの間に７一スＮ３を
設けてある。そして絶縁層１ａ及び絶縁層１ｃの表面側
に配置した電子部品４と電源層２及びアース層３とを夫
々ヴアイアホール５ａ’＋５ｂ′を介して接続している
。
［発明が解決しようとする課題ｌ
ところで、上記従米例にあっては、２つの層間ゝに別々
に電源層２とアース層３とを設けてあるため、絶緑Ｍ１
ａの表面側に設けた電子部品４と７一スＭ３とは電源層
２を貫通してヴＴイアホール５ｂ′にて接続しなければ
ならなく、絶縁ＮＩＣの表面側に設けた電子部品４と電
源層２とはアース層３を貫通してヴァイアホール５ａ’
にて接続しなければならない。このためヴＴイアホール
５ａ，５ｂ′ を電ＷＸＭ２やアース層３に貫通させる
部分には電ａ［２やアースＭ３に絶縁のためのクリアラ
ンス６を設けなければならなく、構造が複雑になると共
に配線密度が低くなるという問題があった．
本発明は叙述の，貞に鑑みてなされたものであって、本
発明の目的とするところは簡単な構造で電源層やアース
層と表面の電子部品や回路とを接続できると共に配線密
度を上げることができる多層プリント配線板を提供する
にある。
［課題を解決するための手段１
上記目的を達成するため本発明多層プリント配線板は、
複数層の絶縁／ｉｌｌａ，ｌｂ，ｌｃの層間において同
一の層間に電源層２とアース屑３とを分離して設け、表
面の電子部品４や回路７と−Ｌ記電源燗２やアースＭ３
とをヴＴイ７ホール５ ｍ， ５ ｂを介して夫々接続
した．
［作用１
同一の層間に形成された電ｉ’！Ｎ２やアース屑３と表
面の電子部品４や回路７とを夫々ヴアイアホール５ ａ
． Ｓ ｂにて接続でき、従米のように電源屑２やアー
ス屑３を貫通するヴアイアホールを要せず接続できて構
造を簡単にできると共に配線密度を上げることができる
。
［実施例］
以ド本発明の多層プリント配線板の一例としての４層プ
リント配線板の実施例により説明する。
両面金属箔張り積層板Ａの上下両面に片面金属箔張り積
層板Ｂを積層して３者をブリブレグＣにて接着して４層
積層板が形成され、第１図に示すように３Ｎの絶縁ＮＪ
ｌａ，ｌｂ，ｌｃと４層の金属箔層を有している。両面
金属箔張り積層板Ａは両面銅張り〃フスエボキシや両面
銅張りガラスポリイミドなど樹脂積層板を基板として両
面に金属箔を積層したものであり、片面金属箔張り積層
板Ｂは片面銅張りグラスエボキシや片面銅張りグラスポ
リイミドなど樹脂積層板を基板として片面に金属箔を積
層したものである．絶ａ層１ａと絶縁層１ｂどの間の金
属箔のし２層は左右に分割されて右側に電源屑（ＶＣＣ
層）２を左側にアースＭ（ＧＮＤ層）３を設けてある．
絶緑Ｍｌｂと絶縁層１ｃとの間の金属箔のＬｓ層も左右
に分割されて左側に電源屑２を、右側に７一スＮ３を設
けてある。絶縁Ｍ１ａ及び絶縁，Ｑｌ １ ｅの表面側
の金属箔のＬ ＋ ，Ｌ ４には適宜パターンの回路７
を設けてあり、表面側の適所に電子部品４を搭載してあ
る。この電子部品４は例えばメモリー素子のようなサー
７エイスマウントデバイスであり、メモリー素子の場合
には多数個並行に列設される。Ｌ，層の電子部品４と１
、２屑の７ｒｌ源／１２やアース／１３とは夫々電気的
に接続され、Ｌｌ／Ｗの電子部品４とＬ３７１の電源屑
２やアースＭ３とは夫々電気的に接続されている。つま
りＬｌ層の電子部品４の電源側端子とＬ２層の電源ＷＪ
２とは絶縁７ｌ １ ａを貫通ｒるヴＴイアホール（
ｖｉａ ｂｏｌｅ） ５ ａにて接続され、Ｌ１層の電
′ｆ一部品４のアース側端子とＬ２層のアース層３とは
絶縁／ｌ １ ａを貫通するヴγイアホール（ｖｉａ
ｂｏｌｅ） ５ ｂにて接続され、Ｉ−４Ｍの電子部品
４の電源側端子とＬ，層の電源Ｎ２とは絶縁層１ｃを貫
通するヴＴイ７ホール５ａにて接続され、Ｌ，層の電子
部品４の７ース＃Ｉ端子とＬ．Ｍの７一スＭ ３とは絶
縁ＭＩＣを貫通するヴアイアホール５ｂにて接続されて
いる。
本実施例の場合ヴアイアホール５ ａ． ５ ｂとして
■Ｖ Ｈ （ｉｎｔｅｒｓＬｉｔｉａｌ ｖｉａ ｈｏ
ｌｅ）を用いているが、ＩＶＨ以外にヴＴイアホールと
して通常のスルーホール（スルーホールを穿孔してスル
ーホールメッキした）にて接続してもその池のこれと同
種の方法で接続してもよい。Ｌ．／Ｉ及びＬ．／１に搭
載された電子部品４は適宜表面の回路７と接続される。
また第２図は他の実施例を示すものである．本実施例の
場合、絶縁Ｍ１ａと絶縁ＮＪｌｂとの間のし２Ｍ′ｃ右
側に電源層２を、左側にアース層３を設けてあり、絶縁
層１ｂと絶縁層１ｃとの開のＬ３／Ｆｌで右側に？ｒＬ
源Ｎ２を、左側にアース層３を設けてある。つまり、Ｌ
２層でもし，層でも右側にｒＩＬ源層２を、左側に７一
ス４３を設けてある。この場合も上記実施例と同様にＬ
１Ｎの電子部品４とＬ２／！１の電源Ｍ２及びアース層
３とをヴＴイアホール５ａ．５ｂにて夫々接続してあり
、１−４層の電子部品４とＬ３層の電源層２及びアース
屑３とをヴＴイアホール５ ａ． ５ ｂにで夫々接続
してある。
なお上記実施例では電源ＪｖＪ２やアースＭ３を電子部
品４にヴＴイ７ホール５ ａ＋ ５ ｂにて接続する実
施例について述べたが、電源層２やアース層３と表面の
回路７とを接続する必要がある場合には同様にヴアイア
ホールにて接続できる．また上記実施例では４Ｍプリン
ト配線板の実施例について述べたが、４Ｍより多い多層
の多層プリント配線板にも同様に実施できる．
［発明の効果】
本発明は叙述の如く複数層の絶縁層の層間において同一
の層間に電源層と７一ス層とを分離しで設け、表面の電
子部品や回路と上記電ａｍや７ース層とをヴ１イアホー
ルを介して夫々接続しているので、内層の同一の層に設
けた電源層やアース層と表面側の電子部品や回路とを同
一の絶縁層に貫通１るヴＴイアホールにて接続できるも
のであって、従米のように電．ａ層やアースｌｍを貫通
するヴＴイアホールを要せず接続できて従米に比べて構
造を簡単にできるものであると共に従米のように電源層
やアース層に貫通する部分に絶縁のためのクリアフンス
を設けたりする必要がなくて配線密度を上げることがで
きるものである。[Jubei's technology] Jubei's 4-layer printed wiring board, which is an example of a multilayer printed wiring board, is made by using 3 pieces of insulating scraps and 1 a. 1
b. A power supply m (VCC/1) between the two layers of 1c
2 and a ground layer (GND layer) 3 are provided separately. In other words, the power supply layer 2 is provided between the insulation layer M1a and the insulation layer 1b.
A 7-strip N3 is provided between the MLB and the insulating layer IC. The electronic component 4 disposed on the surface side of the insulating layer 1a and the insulating layer 1c is connected to the power supply layer 2 and the earth layer 3 through via holes 5a'+5b', respectively. [Problems to be Solved by the Invention] Incidentally, in the above-mentioned example, since the power layer 2 and the earth layer 3 are provided separately between the two layers,
The electronic components 4 and 7 provided on the surface side of the insulated NIC must be connected to each other through the power supply layer 2 through the VT ear hole 5b', and the electronic components 4 and 7 provided on the surface side of the insulated NIC The power layer 2 is a via hole 5a' that penetrates the ground layer 3.
Must be connected at For this reason, it is necessary to provide a clearance 6 for insulating the electric wire A[2 and the earth M3 at the part where the VT ear holes 5a and 5b' penetrate the electric wire WXM2 and the earth layer 3, which makes the structure complicated and the wiring. The problem was that the density was low. The present invention has been made with the above-mentioned considerations in mind, and the purpose of the present invention is to connect the power supply layer and the ground layer to the electronic components and circuits on the surface with a simple structure, and to increase the wiring density. The aim is to provide a multilayer printed wiring board that can be used. [Means for Solving the Problems 1 To achieve the above object, the multilayer printed wiring board of the present invention has the following features:
Multiple layers of insulation/Illa, lb, lc, the power supply layer 2 and ground scrap 3 are provided separately between the same layers, and the electronic components 4 and circuits 7 on the surface are connected to the -L power supply 2 and ground M3.
and were connected via VT7 holes 5 m and 5 b, respectively. [Action 1 Electricity i' formed between the same layers! Connect N2 and ground debris 3 to electronic components 4 and circuits 7 on the surface through via holes 5a, respectively.
．． The connection can be made at Sb, and the connection can be made without requiring a via hole that penetrates the power supply scrap 2 and the ground scrap 3 as in the conventional case, simplifying the structure and increasing the wiring density. [Example] An example of a four-layer printed wiring board as an example of the multilayer printed wiring board of the present invention will be described below. A 4-layer laminate is formed by laminating the single-sided metal foil laminate B on the upper and lower surfaces of the double-sided metal foil clad laminate A, and bonding the three members together with a brimbreg C. As shown in Fig. 1, a 4-layer laminate is formed. N.J.
It has four metal foil layers: la, lb, and lc. Double-sided metal foil-clad laminate A is a double-sided copper-clad laminate made of a resin laminate such as fiberglass epoxy or double-sided copper-clad glass polyimide as a substrate, and metal foil is laminated on both sides. Single-sided metal foil-clad laminate B is one-sided copper-clad glass epoxy. The substrate is a resin laminate, such as glass polyimide with copper cladding on one side, and metal foil is laminated on one side. The two metal foil layers between the absolute a layer 1a and the insulating layer 1b are divided into left and right parts, and the power supply scrap (VCC) is placed on the right side.
A ground M (GND layer) 3 is provided on the left side of the layer) 2.
The metal foil Ls layer between Mlb and the insulating layer 1c is also divided into left and right parts, with the power supply chip 2 on the left side and the 71s N3 on the right side. A circuit 7 with an appropriate pattern is placed on the metal foil L + and L 4 on the surface side of the insulation M1a and the insulation Ql 1 e.
is provided, and an electronic component 4 is mounted at an appropriate position on the front side. This electronic component 4 is, for example, a circuit mount device such as a memory device, and in the case of a memory device, a large number of electronic components 4 are arranged in parallel. L, layer electronic components 4 and 1
, 2 scraps 7rl source /12 and ground /13 are electrically connected, respectively, and the electronic component 4 of Ll/W and the power supply scrap 2 of L371 and ground M3 are electrically connected, respectively. In other words, the power supply side terminal of the electronic component 4 in the Ll layer and the power supply WJ in the L2 layer
2 is a VT ear hole that penetrates the insulation 7l 1a (
The ground side terminal of the electric component 4 of the L1 layer and the ground layer 3 of the L2 layer are connected at a via hole (via bole) 5 a that penetrates the insulation/l 1 a.
The power supply side terminal of the electronic component 4 of the I-4M and the power supply N2 of the L layer are connected through the V T7 hole 5a that penetrates the insulating layer 1c, and the 7th #I terminal of electronic component 4 and L. It is connected to the 7th path M3 through a via hole 5b passing through the insulating MIC. In this embodiment, via hole 5 a. 5 b as ■V H (intersLitial via ho
(le), but in addition to IVH, it can be connected with a normal through hole (through hole is drilled and through hole plated) or by the same method as this one. good. L. /I and L. The electronic component 4 mounted on /1 is appropriately connected to the circuit 7 on the surface. Moreover, FIG. 2 shows another embodiment. In the case of this embodiment, the power layer 2 is provided on the right side of the insulation layer 2M'c between the insulation layer M1a and the insulation layer NJlb, and the ground layer 3 is provided on the left side, and the open L3/Fl layer between the insulation layer 1b and the insulation layer 1c is provided. And on the right side? rL
A ground layer 3 is provided on the left side of the source N2. In other words, L
In case of two layers, the rIL source layer 2 is provided on the right side, and the 7th layer 43 is provided on the left side. In this case as well, L
1N electronic components 4 and L2/! 1 power supply M2 and ground layer 3 through the ear holes 5a. 5b, and connect the electronic components 4 of the 1st to 4th layers and the power supply layer 2 and grounding material 3 of the L3 layer through the earholes 5a. 5b are connected to each other. In the above embodiment, the power supply JvJ2 and the ground M3 are connected to the electronic component 4 through the VT7 hole 5a+5b, but the power supply layer 2 and the ground layer 3 are connected to the circuit 7 on the surface. If you need to do so, you can also connect at Viaia Hall. Further, in the above embodiment, an example of a 4M printed wiring board has been described, but the same can be applied to a multilayer printed wiring board with more than 4M layers. [Effects of the Invention] As described above, the present invention separately provides a power supply layer and a 7-layer between the same layers of a plurality of insulating layers, and connects electronic components and circuits on the surface with the above-mentioned electric am and 7-layers. Since the power supply layer and ground layer provided on the same inner layer and the electronic components and circuits on the surface side are connected to each other through the via holes in the same insulating layer, It can be connected through an ear hole, and it can be connected to a power source like the conventional one. It can be connected without requiring a VT ear hole that penetrates the A layer and the ground lm, and the structure is simpler than that of the conventional type. In addition, unlike the conventional type, there is a clear fence for insulation at the part that penetrates the power layer and the ground layer. There is no need to provide a wire, and the wiring density can be increased.
【図面の簡単な説明】[Brief explanation of drawings]
第１図は本発明の一実施例の断面図、第２図は同上の他
の実施例の断面図、第３図は従未例の断面図であって、
ｌａｒｌｂ−１ｃは絶縁層、２は電源層、３はアース屑
、４は電子部品、５ ａ， ５ ｂはヴァイアホールで
ある。
代理人 弁理士 石 田 氏 七
！
妊
塚
滞FIG. 1 is a cross-sectional view of one embodiment of the present invention, FIG. 2 is a cross-sectional view of another embodiment same as above, and FIG. 3 is a cross-sectional view of a conventional example,
larlb-1c is an insulating layer, 2 is a power supply layer, 3 is ground scrap, 4 is an electronic component, and 5a and 5b are via holes. Agent Patent Attorney Mr. Ishida Seven! pregnancy retention