JPH0614599B2 - Multilayer printed wiring board - Google Patents
Multilayer printed wiring boardInfo
- Publication number
- JPH0614599B2 JPH0614599B2 JP1116620A JP11662089A JPH0614599B2 JP H0614599 B2 JPH0614599 B2 JP H0614599B2 JP 1116620 A JP1116620 A JP 1116620A JP 11662089 A JP11662089 A JP 11662089A JP H0614599 B2 JPH0614599 B2 JP H0614599B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- layer
- circuit layer
- power
- via hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【発明の詳細な説明】 [産業上の利用分野] 本発明は4層以上の多層プリント配線板に関し、詳しく
は内層の電源回路層やアース回路層と表面の電子部分や
回路とを接続したり、給電端子と電源回路層とを接続し
たりする技術に関するものである。TECHNICAL FIELD The present invention relates to a multilayer printed wiring board having four or more layers, and more specifically, connecting a power circuit layer or an earth circuit layer as an inner layer to an electronic part or circuit on the surface. , A technique for connecting a power supply terminal and a power supply circuit layer.
[従来の技術] 従来、多層プリント配線板の一例である4層プリント配
線板は第5図に示すように3層の絶縁層1a,1b,1
cの2つの層間に夫々電源回路層(VCC層)2とアー
ス回路層(GND層)3とを別々に設けている。つまり
絶縁層1aと絶縁層1bとの間に電源回路層2を設け、
絶縁層1bと絶縁層1cとの間にアース回路層3を設け
てある。そして絶縁層1a及び絶縁層1cの表面側に配
置した電子部分4と電源回路層2及びアース回路層3と
を夫々電源用ヴァイアホール5a′及びアース用ヴァイ
アホール5b′を介して接続している。また上の表面に
給電端子8と連続するように給電路9′を設け、給電路
9′と電源回路層2とを給電用ヴァイアホール10′に
て接続している。[Prior Art] Conventionally, a four-layer printed wiring board, which is an example of a multilayer printed wiring board, has three insulating layers 1a, 1b, 1 as shown in FIG.
A power supply circuit layer (VCC layer) 2 and a ground circuit layer (GND layer) 3 are separately provided between the two layers c. That is, the power supply circuit layer 2 is provided between the insulating layer 1a and the insulating layer 1b,
The ground circuit layer 3 is provided between the insulating layer 1b and the insulating layer 1c. The electronic portion 4 disposed on the surface side of the insulating layer 1a and the insulating layer 1c is connected to the power circuit layer 2 and the ground circuit layer 3 via the power via hole 5a 'and the ground via hole 5b', respectively. . Further, a power feeding path 9'is provided on the upper surface so as to be continuous with the power feeding terminal 8, and the power feeding path 9'and the power supply circuit layer 2 are connected by a power feeding via hole 10 '.
[発明が解決しようとする課題] ところで、上記従来例にあっては、2つの層間に別々に
電源回路層2とアース回路層3とを設けてあるため、絶
縁層1aの表面側に設けた電子部品4とアース回路層3
とは電源回路層2を貫通してアース用ヴァイアホール5
b′にて接続しなければならなく、絶縁層1cの表面側
に設けた電子部品4と電源回路層2とはアース回路層3
を貫通して電源用ヴァイアホール5a′にて接続しなけ
ればならない。このためヴァイアホール5a′,5b′
を電源回路層2やアース回路層3に貫通させる部分には
電源回路層2やアース回路層3に絶縁のためクリアラン
ス6を設けなければならなく、構造が複雑になると共に
配線密度が低くなるという問題がある。また給電端子8
から給電路9′及び給電用ヴァイアホール10′を介し
て電源回路層2に給電され、電源回路層2から電源用ヴ
ァイアホール5a′を介して電子部品4に給電されるよ
うになっているが、上下の電子部品4に給電する両面実
装の仕様にしかできなく、片面の電子部品4に給電する
片面実装の仕様にはできないという問題がある。[Problems to be Solved by the Invention] In the above-mentioned conventional example, since the power supply circuit layer 2 and the ground circuit layer 3 are separately provided between the two layers, they are provided on the surface side of the insulating layer 1a. Electronic component 4 and earth circuit layer 3
Is a via hole 5 for grounding through the power supply circuit layer 2.
The electronic component 4 and the power supply circuit layer 2 provided on the front surface side of the insulating layer 1c must be connected to each other by the ground circuit layer 3
Must be connected through the power supply via hole 5a '. Therefore, the via holes 5a ', 5b'
It is necessary to provide a clearance 6 for insulating the power supply circuit layer 2 and the ground circuit layer 3 at a portion where the power circuit layer 2 and the ground circuit layer 3 are penetrated, which makes the structure complicated and lowers the wiring density. There's a problem. In addition, the power supply terminal 8
Power is supplied to the power supply circuit layer 2 from the power supply path 9'and the power supply via hole 10 ', and from the power supply circuit layer 2 to the electronic component 4 via the power supply via hole 5a'. However, there is a problem in that it can only be specified for double-sided mounting in which power is supplied to the upper and lower electronic components 4, and cannot be specified in single-sided mounting for supplying power to the single-sided electronic component 4.
本発明は叙述の点に鑑みてなされたものであって、本発
明の目的とするところは簡単な構造で電源回路層やアー
ス回路層と表面の電子部品が回路とを接続できると共に
配線密度を上げることができ、しかも両面実装の仕様以
外に簡単に片面実装の仕様にもできる多層プリント配線
板を提供するにある。The present invention has been made in view of the above-mentioned points, and the object of the present invention is to provide a simple structure with which a power circuit layer or an earth circuit layer and electronic components on the surface can connect a circuit and wiring density. (EN) It is possible to provide a multilayer printed wiring board which can be raised and can be easily mounted on one side in addition to the specification on both sides.
[課題を解決するための手段] 上記目的を達成するため本発明多層プリント配線板は、
3層以上の複数層の絶縁層1a,1b,1cの少なくと
も2つの層間において同一の層間に電源回路層2とアー
ス回路層3とを分離して設け、上下の各表面の電子部品
4や回路7と上記電源回路層2やアース回路層3とを電
源用ヴァイアホール5a及びアース用ヴァイアホール5
bを介して夫々接続し、上下の表面のうち一方の表面に
給電端子8を設けると共に給電端子8に導通する給電路
9をその表面に設け、複数層の電源回路層2と給電路9
とを給電用ヴァイホール10a,10bにて導通させ、
上記給電路9を表面の適宣位置で切断可能にして成るこ
とを特徴とする。[Means for Solving the Problems] In order to achieve the above object, the multilayer printed wiring board of the present invention comprises:
The power circuit layer 2 and the ground circuit layer 3 are provided separately in at least two layers of the plurality of insulating layers 1a, 1b, 1c of three layers or more, and the electronic components 4 and the circuits on the upper and lower surfaces are provided. 7 and the power supply circuit layer 2 and the ground circuit layer 3 are connected to the power supply via hole 5a and the grounding via hole 5
b, the power supply terminals 8 are provided on one of the upper and lower surfaces, and a power supply path 9 that conducts to the power supply terminals 8 is provided on the surface, and the power supply circuit layer 2 and the power supply path 9 are formed of a plurality of layers.
Are conducted with the power supply via holes 10a and 10b,
It is characterized in that the feeding path 9 can be cut at an appropriate position on the surface.
[作用] 同一の層間に形成された電源回路層2やアース回路層3
と表面の電子部品4や回路7とを夫々電源用ヴァイアホ
ール5a及びアース用ヴァイアホール5bにて接続で
き、従来のように電源回路層2やアース回路層3を貫通
する電源用ヴァイアホールやアース用ヴァイアホールを
要せず接続できて構造を簡単にできる。また給電端子8
から複数の電源回路層2に給電することにより両面実装
の仕様にでき、また給電路9を適宣位置で切断して一方
の電源回路層2に給電するだけにできて簡単に片面実装
の仕様にできる。[Operation] Power supply circuit layer 2 and ground circuit layer 3 formed between the same layers
And the electronic component 4 and the circuit 7 on the surface can be connected to each other through the power supply via hole 5a and the ground via hole 5b, respectively, and the power supply via hole and the ground penetrating the power supply circuit layer 2 and the ground circuit layer 3 as in the conventional case. The structure can be simplified by connecting without the need for via holes. In addition, the power supply terminal 8
By supplying power from a plurality of power supply circuit layers 2 to a double-sided mounting specification, it is possible to cut the power supply path 9 at an appropriate position to supply power to one power supply circuit layer 2 and to easily mount on one side. You can
[実施例] 以下本発明の多層プリント配線板の一例としての4層プ
リント配線板の実施例により説明する。両面金属箔張り
積層板Aの上下両面に片面金属箔張り積層板Bを積層し
て3者をプリプレグCにて接着して4層積層板が形成さ
れ、第1図に示すように3層の絶縁層1a,1b,1c
と4層の金属箔層を有している。両面金属箔張り積層板
Aは両面銅張りガラスエポキシや両面銅張りガラスポリ
イミド樹脂積層板を基板として両面に金沿箔を積層した
ものであり、片面金属箔張り積層板Bは片面張りガラス
エポキシや片面銅張りガラスポリイミドなど樹脂積層板
を基板として片面に金属箔を積層したものである。絶縁
層1aと絶縁層1bとの間の金属箔のL2層は左右に分
割されて右側に電源回路(VCC層)2を左側にアース
回路層(GND層)3を設けてある。絶縁層1bと絶縁
層1cとの間の金属箔のL3層も左右に分割されて右側
に電源回路層2を、左側にアース回路層3を設けてあ
る。絶縁層1a及び絶縁層1cの表面側の金属箔の
L1,L4層には適宣パターンの回路7を設けてあり、
表面側の適所に電子部品4を搭載してある。この電子部
品4は例えばメモリー素子のようなサーフェイスマウン
トデバイスであり、メモリー素子の場合には多数個並行
に列設される。L1層の電子部品4とL2層の電源回路
層2やアース回路層3とは夫々電気的に接続され、L4
層の電子部品4とL3層の電源回路層2やアース回路層
3とは夫々電気的に接続されている。つまりL1層の電
子部品4の電源側端子とL2層の電源回路層2とは絶縁
層1aを貫通する電源用ヴァイアホール(via ho
le)5aにて接続され、L1層の電子部品4のアース
側端子L2層のアース回路層3とは絶縁層1aを貫通す
るアース用ヴァイアホール(via hole)5bにて接続さ
れ、L4層の電子部品4の電源側端子とL3層の電源回
路層2とは絶縁層1cを貫通する電源用ヴァイアホール
5aにて接続され、L4層の電子部品4のアース側端子
とL3層のアース回路層3ととは絶縁層1cを貫通する
アース用ヴァイアホール5bにて接続されている。本実
施例の場合電源用のヴァイアホール5aやアース用ヴァ
イアホール5bとしてIVH(interstitial via hole)
を用いているが、IVH以外にヴァイアホールとして通
常のスルーホール(スルーホールの穿孔してスルーホー
ルメッキした)を用いても、その他のこれと同種の接続
方法を用いてもよい。L1層及びL4層に搭載された電
子部品4は適宣表面の回路7と接続される。またL1層
である表面には給電端子8を設けてあり、この給電端子
8に連続するように給電路9を設けてある。L2層の電
源回路層2及びL3層の電源回路層2と上記給電路9と
は給電用ヴァイアホール10a,10bにて接続してあ
る。この給電用ヴァイアホール10a,10bも本実施
例の場合、IVHを用いているが、IVH以外にヴァイ
アホールとして通常のスルーホール(スルーホールを穿
孔してスルーホールメッキした)を用いても、その他の
これと同種の接続方法を用いてもよい。しかして給電端
子8から給電路9及び給電用ヴァイアホール10a,1
0bを介してL2層及びL3層の電源回路層2に給電さ
れ、電源回路層2からL1層及びL4層の電子部品4に
給電されて両面実装の仕様にできる。このとき給電路9
の給電用ヴァイアホール10a,10bに接続する部分
の間を第2図、第3図に示すようにドリル11にて切断
することにより給電端子8と給電用ヴァイアホール10
bとの通電を遮断し、給電端子8からL2層の電源回路
層2だけ給電するようにしてL1層の電子部品4にだけ
給電して片面実装の仕様にできる。また第4図は他の実
施例を示し、給電用ヴァイアホール10a,10bと給
電端子8とを接続する給電路9を第1給電路9aと第2
給電路9bで構成してあり、第1給電路9aと第2給電
路9bのうち一方をドリル11で切断することによりL
2層の電源回路層2に給電したり、L3層の電源回路層
2に給電したりする片面実装の仕様にできるようになっ
ている。[Examples] Examples of a four-layer printed wiring board as an example of the multilayer printed wiring board of the present invention will be described below. A single-sided metal foil-clad laminate B is laminated on the upper and lower surfaces of the double-sided metal foil-clad laminate A, and the three members are adhered by a prepreg C to form a four-layer laminate plate. As shown in FIG. Insulating layers 1a, 1b, 1c
And 4 metal foil layers. The double-sided metal foil-clad laminate A is a double-sided copper-clad glass epoxy or double-sided copper-clad glass-polyimide resin laminate plate laminated with gold foil on both sides. A resin laminate such as copper-clad glass polyimide on one side is used as a substrate and metal foil is laminated on one side. The L 2 layer of the metal foil between the insulating layer 1a and the insulating layer 1b is divided into left and right, and a power supply circuit (VCC layer) 2 is provided on the right side and a ground circuit layer (GND layer) 3 is provided on the left side. The L 3 layer of the metal foil between the insulating layer 1b and the insulating layer 1c is also divided into left and right, and the power circuit layer 2 is provided on the right side and the ground circuit layer 3 is provided on the left side. A circuit 7 having an appropriate pattern is provided on the L 1 and L 4 layers of the metal foil on the surface side of the insulating layer 1a and the insulating layer 1c.
The electronic component 4 is mounted at a proper position on the front surface side. The electronic component 4 is, for example, a surface mount device such as a memory element, and in the case of a memory element, a plurality of electronic components 4 are arranged in parallel. The L 1 layer electronic component 4 and a power supply circuit of the L 2 layer layer 2 and the ground circuit layer 3 are electrically connected respectively, L 4
The electronic component 4 of the layer and the power circuit layer 2 and the ground circuit layer 3 of the L 3 layer are electrically connected to each other. That is, the power supply side terminal of the electronic component 4 of the L 1 layer and the power supply circuit layer 2 of the L 2 layer pass through the insulating layer 1a, and a via hole for power supply (via ho)
le) 5a, and the ground side terminal of the electronic component 4 of the L 1 layer is connected to the ground circuit layer 3 of the L 2 layer by a ground via hole 5b penetrating the insulating layer 1a. four layers of the supply-side terminal and the L 3 layer power circuit layer 2 of the electronic component 4 is connected at the power supply via-hole 5a penetrating the insulating layer 1c, the ground terminal and L of the electronic component 4 L 4 layer The three ground circuit layers 3 are connected to each other by a ground via hole 5b penetrating the insulating layer 1c. In the case of this embodiment, an IVH (interstitial via hole) is used as the via hole 5a for power supply and the via hole 5b for grounding.
However, in addition to IVH, a normal through hole (through hole is perforated and plated through) may be used as a via hole, or another connection method similar to this may be used. The electronic components 4 mounted on the L 1 layer and the L 4 layer are connected to the circuit 7 on the appropriate surface. A power supply terminal 8 is provided on the surface of the L 1 layer, and a power supply path 9 is provided so as to be continuous with the power supply terminal 8. The power supply circuit layer 2 of the L 2 layer and the power supply circuit layer 2 of the L 3 layer and the power supply path 9 are connected by power supply via holes 10a and 10b. In the present embodiment, the IVH is also used for the power feeding via holes 10a and 10b. However, other than the IVH, a normal through hole (through hole is plated by through hole) may be used as well. The same connection method as this may be used. Therefore, from the power feeding terminal 8 to the power feeding path 9 and the power feeding via holes 10a, 1
Power is supplied to the power supply circuit layers 2 of the L 2 layer and the L 3 layer through 0b, and power is supplied from the power supply circuit layer 2 to the electronic components 4 of the L 1 layer and the L 4 layer, so that double-sided mounting can be achieved. At this time, power supply line 9
2 and 3 are cut by a drill 11 between the portions connected to the power feeding via holes 10a and 10b of the power feeding terminal 8 and the power feeding via hole 10 of FIG.
Power supply to the power supply circuit layer 2 of the L 2 layer is stopped from the power supply terminal 8 and power is supplied only to the electronic component 4 of the L 1 layer so that the single-sided mounting can be achieved. Further, FIG. 4 shows another embodiment, in which a power feeding path 9 connecting the power feeding via holes 10a and 10b and the power feeding terminal 8 is connected to the first power feeding path 9a and the second power feeding path 9a.
It is configured by the power feeding path 9b, and by cutting one of the first power feeding path 9a and the second power feeding path 9b with the drill 11, L
Two layers or to power the power supply circuit layer 2, which is to be the specification of one side implementation or to power the power supply circuit layer 2 of the L 3 layer.
なお上記実施例では電源回路層2やアース回路層3を電
子部品4に電源用ヴァイアホール5aやアース用ヴァイ
アホール5bにて接続する実施例について述べたが、電
源回路層2やアース回路層3と表面の回路7とを接続す
る必要がある場合には同様に電源用ヴァイアホール用ヴ
ァイアホールにて接続できる。また上記実施例では4層
プリント配線板の実施例について述べたが、4層より多
い多層の多層プリント配線板にも同様に実施できる。In the above embodiment, the power circuit layer 2 and the ground circuit layer 3 are connected to the electronic component 4 through the power via hole 5a and the ground via hole 5b, but the power circuit layer 2 and the ground circuit layer 3 are described. If it is necessary to connect the circuit 7 on the front side to the circuit 7 on the surface, the connection can be made similarly by the via hole for the power supply via hole. Further, in the above-mentioned embodiment, the embodiment of the four-layer printed wiring board is described, but the same can be applied to a multilayer printed wiring board having more than four layers.
[発明の効果] 本発明は叙述の如く複数層の絶縁層の層間において同一
の層間に電源回路層とアース回路層とを分離して設け、
表面の電子部品や回路と上記電源回路層やアース回路層
とを電源用ヴァイアホール及びアース用ヴァイアホール
を介して夫々接続しているので、内層の同一の層に設け
た電源回路層やアース回路層と表面側の電子部品や回路
とを同一の絶縁層に貫通する電源用ヴァイアホール及び
アース用ヴァイアホールにて接続できるものであって、
従来のように電源回路層やアース回路層を貫通する電源
用ヴァイアホールやアース用ヴァイアホールを要せず接
続できて従来に比べて構造を簡単にできるものと共に従
来のように電源回路層やアース回路層に貫通する部分に
絶縁のためのクリアランスを設けたりする必要がなくて
配線密度を上げることができるものであり、また上下の
表面にうち一方の表面に給電端子を設けると共に給電端
子に導通する給電路をその表面に設け、複数層の電源回
路層と給電路とを給電用ヴァイアホールにて導通させて
いるので、給電端子から給電路及び給電用ヴァイアホー
ルを介して複数層の電源回路層に給電して両面実装の仕
様にできるのは勿論、上記給電路を表面の適宣位置で切
断可能にしているので、給電路の適宣位置を表面でドリ
ル等で切断することにより簡単に適宣の電源回路層にだ
け給電する構造にできて片面実装の仕様にできるもので
ある。[Effects of the Invention] As described above, the present invention provides a power circuit layer and a ground circuit layer separately between the same layers among a plurality of insulating layers,
Since the electronic components and circuits on the surface are connected to the power supply circuit layer and the ground circuit layer through the power supply via hole and the grounding via hole, respectively, the power supply circuit layer and the ground circuit provided on the same inner layer are provided. A layer and a surface side electronic component or circuit can be connected by a power via hole and a ground via hole penetrating the same insulating layer,
The power supply circuit layer and the ground can be connected without the need for power supply via holes and ground via holes that pass through the power supply circuit layer or the ground circuit layer as in the past, and the structure can be simpler than in the past. It is possible to increase the wiring density without the need to provide a clearance for insulation in the part that penetrates the circuit layer, and also to provide a power supply terminal on one of the upper and lower surfaces and to connect to the power supply terminal. Since the power supply path is provided on the surface and the power supply circuit layers of the plurality of layers are electrically connected to the power supply path through the power supply via hole, the power supply circuit of the plurality of layers is formed from the power supply terminal through the power supply path and the power supply via hole. In addition to being able to supply power to the layers for double-sided mounting, the power feed path can be cut at appropriate positions on the surface, so the power supply path can be cut at the appropriate position with a drill or the like. Those that can be the specification of one side mounted easily to the structure just to power the power supply circuit layer of Tekisen by.
第1図は本発明の一実施例の断面図、第2図は同上のド
リルで切断する状態の断面図、第3図は同上の切断する
状態を説明する概略平面図、第4図は同上の他の実施例
の概略平面図、第5図は従来例の断面図であって、1
a,1b,1cは絶縁層、2は電源回路層、3はアース
回路層、4は電子部品、5aは電源用ヴァイアホール、
5bはアース用ヴァイアホール、7は回路、8は給電端
子、9は給電路、10a,10bは給電用ヴァイアホー
ルである。FIG. 1 is a cross-sectional view of an embodiment of the present invention, FIG. 2 is a cross-sectional view showing a state in which the same is cut with a drill, FIG. 3 is a schematic plan view explaining the same state as the cutting, and FIG. FIG. 5 is a schematic plan view of another embodiment of the present invention, and FIG.
a, 1b and 1c are insulating layers, 2 is a power circuit layer, 3 is a ground circuit layer, 4 is an electronic component, 5a is a power via hole,
Reference numeral 5b is a ground via hole, 7 is a circuit, 8 is a feeding terminal, 9 is a feeding path, and 10a and 10b are feeding via holes.
Claims (1)
つの層間において同一の層間に電源回路層とアース回路
層とを分離して設け、上下の各表面の電子部品や回路と
上記電源回路層やアース回路層とを電源用ヴァイアホー
ル及びアース用ヴァイアホールを介して夫々接続し、上
下の表面のうち一方の表面に給電端子を設けると共に給
電端子を導通する給電路をその表面に設け、複数層の電
源回路層と給電路とを給電用ヴァイアホールにて導通さ
せ、上記給電路を表面の適宣位置で切断可能にして成る
ことを特徴とする多層プリント配線板。1. At least two of three or more insulating layers.
A power circuit layer and a ground circuit layer are separately provided between the two layers, and electronic parts and circuits on the upper and lower surfaces and the power circuit layer and the ground circuit layer are connected to the power via hole and the ground via hole. And the power supply terminal on one surface of the upper and lower surfaces and the power supply path that conducts the power supply terminal is provided on the surface, and the power supply circuit layer and the power supply path of the plurality of layers are used as a power supply via hole. A multi-layer printed wiring board, characterized in that the power supply path can be cut at an appropriate position on the surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1116620A JPH0614599B2 (en) | 1989-05-10 | 1989-05-10 | Multilayer printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1116620A JPH0614599B2 (en) | 1989-05-10 | 1989-05-10 | Multilayer printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02295193A JPH02295193A (en) | 1990-12-06 |
| JPH0614599B2 true JPH0614599B2 (en) | 1994-02-23 |
Family
ID=14691697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1116620A Expired - Lifetime JPH0614599B2 (en) | 1989-05-10 | 1989-05-10 | Multilayer printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0614599B2 (en) |
-
1989
- 1989-05-10 JP JP1116620A patent/JPH0614599B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02295193A (en) | 1990-12-06 |
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